Revision 73b01960 hw/ppc405_uc.c
| b/hw/ppc405_uc.c | ||
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| 107 | 107 |
uint32_t besr; |
| 108 | 108 |
}; |
| 109 | 109 |
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| 110 |
static target_ulong dcr_read_plb (void *opaque, int dcrn)
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| 110 |
static uint32_t dcr_read_plb (void *opaque, int dcrn)
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| 111 | 111 |
{
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| 112 | 112 |
ppc4xx_plb_t *plb; |
| 113 |
target_ulong ret;
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| 113 |
uint32_t ret;
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| 114 | 114 |
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| 115 | 115 |
plb = opaque; |
| 116 | 116 |
switch (dcrn) {
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| ... | ... | |
| 132 | 132 |
return ret; |
| 133 | 133 |
} |
| 134 | 134 |
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| 135 |
static void dcr_write_plb (void *opaque, int dcrn, target_ulong val)
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| 135 |
static void dcr_write_plb (void *opaque, int dcrn, uint32_t val)
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| 136 | 136 |
{
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| 137 | 137 |
ppc4xx_plb_t *plb; |
| 138 | 138 |
|
| ... | ... | |
| 189 | 189 |
uint32_t besr[2]; |
| 190 | 190 |
}; |
| 191 | 191 |
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| 192 |
static target_ulong dcr_read_pob (void *opaque, int dcrn)
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static uint32_t dcr_read_pob (void *opaque, int dcrn)
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| 193 | 193 |
{
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| 194 | 194 |
ppc4xx_pob_t *pob; |
| 195 |
target_ulong ret;
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uint32_t ret;
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| 196 | 196 |
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| 197 | 197 |
pob = opaque; |
| 198 | 198 |
switch (dcrn) {
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| ... | ... | |
| 212 | 212 |
return ret; |
| 213 | 213 |
} |
| 214 | 214 |
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| 215 |
static void dcr_write_pob (void *opaque, int dcrn, target_ulong val)
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| 215 |
static void dcr_write_pob (void *opaque, int dcrn, uint32_t val)
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| 216 | 216 |
{
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| 217 | 217 |
ppc4xx_pob_t *pob; |
| 218 | 218 |
|
| ... | ... | |
| 410 | 410 |
EBC0_CFGDATA = 0x013, |
| 411 | 411 |
}; |
| 412 | 412 |
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| 413 |
static target_ulong dcr_read_ebc (void *opaque, int dcrn)
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| 413 |
static uint32_t dcr_read_ebc (void *opaque, int dcrn)
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| 414 | 414 |
{
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| 415 | 415 |
ppc4xx_ebc_t *ebc; |
| 416 |
target_ulong ret;
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| 416 |
uint32_t ret;
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| 417 | 417 |
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| 418 | 418 |
ebc = opaque; |
| 419 | 419 |
switch (dcrn) {
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| ... | ... | |
| 494 | 494 |
return ret; |
| 495 | 495 |
} |
| 496 | 496 |
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| 497 |
static void dcr_write_ebc (void *opaque, int dcrn, target_ulong val)
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| 497 |
static void dcr_write_ebc (void *opaque, int dcrn, uint32_t val)
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| 498 | 498 |
{
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| 499 | 499 |
ppc4xx_ebc_t *ebc; |
| 500 | 500 |
|
| ... | ... | |
| 627 | 627 |
uint32_t pol; |
| 628 | 628 |
}; |
| 629 | 629 |
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| 630 |
static target_ulong dcr_read_dma (void *opaque, int dcrn)
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| 630 |
static uint32_t dcr_read_dma (void *opaque, int dcrn)
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| 631 | 631 |
{
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| 632 | 632 |
ppc405_dma_t *dma; |
| 633 | 633 |
|
| ... | ... | |
| 636 | 636 |
return 0; |
| 637 | 637 |
} |
| 638 | 638 |
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| 639 |
static void dcr_write_dma (void *opaque, int dcrn, target_ulong val)
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| 639 |
static void dcr_write_dma (void *opaque, int dcrn, uint32_t val)
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| 640 | 640 |
{
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| 641 | 641 |
ppc405_dma_t *dma; |
| 642 | 642 |
|
| ... | ... | |
| 914 | 914 |
} |
| 915 | 915 |
} |
| 916 | 916 |
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| 917 |
static target_ulong dcr_read_ocm (void *opaque, int dcrn)
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static uint32_t dcr_read_ocm (void *opaque, int dcrn)
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| 918 | 918 |
{
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| 919 | 919 |
ppc405_ocm_t *ocm; |
| 920 |
target_ulong ret;
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| 920 |
uint32_t ret;
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| 921 | 921 |
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| 922 | 922 |
ocm = opaque; |
| 923 | 923 |
switch (dcrn) {
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| ... | ... | |
| 941 | 941 |
return ret; |
| 942 | 942 |
} |
| 943 | 943 |
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| 944 |
static void dcr_write_ocm (void *opaque, int dcrn, target_ulong val)
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static void dcr_write_ocm (void *opaque, int dcrn, uint32_t val)
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| 945 | 945 |
{
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| 946 | 946 |
ppc405_ocm_t *ocm; |
| 947 | 947 |
uint32_t isarc, dsarc, isacntl, dsacntl; |
| ... | ... | |
| 1578 | 1578 |
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| 1579 | 1579 |
static void ppc40x_mal_reset (void *opaque); |
| 1580 | 1580 |
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| 1581 |
static target_ulong dcr_read_mal (void *opaque, int dcrn)
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static uint32_t dcr_read_mal (void *opaque, int dcrn)
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| 1582 | 1582 |
{
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| 1583 | 1583 |
ppc40x_mal_t *mal; |
| 1584 |
target_ulong ret;
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uint32_t ret;
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| 1585 | 1585 |
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| 1586 | 1586 |
mal = opaque; |
| 1587 | 1587 |
switch (dcrn) {
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| ... | ... | |
| 1650 | 1650 |
return ret; |
| 1651 | 1651 |
} |
| 1652 | 1652 |
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static void dcr_write_mal (void *opaque, int dcrn, target_ulong val)
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static void dcr_write_mal (void *opaque, int dcrn, uint32_t val)
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| 1654 | 1654 |
{
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| 1655 | 1655 |
ppc40x_mal_t *mal; |
| 1656 | 1656 |
int idx; |
| ... | ... | |
| 1951 | 1951 |
clk_setup(&cpc->clk_setup[PPC405CR_UART_CLK], UART_clk); |
| 1952 | 1952 |
} |
| 1953 | 1953 |
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| 1954 |
static target_ulong dcr_read_crcpc (void *opaque, int dcrn)
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static uint32_t dcr_read_crcpc (void *opaque, int dcrn)
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| 1955 | 1955 |
{
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| 1956 | 1956 |
ppc405cr_cpc_t *cpc; |
| 1957 |
target_ulong ret;
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| 1957 |
uint32_t ret;
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| 1958 | 1958 |
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| 1959 | 1959 |
cpc = opaque; |
| 1960 | 1960 |
switch (dcrn) {
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| ... | ... | |
| 1991 | 1991 |
return ret; |
| 1992 | 1992 |
} |
| 1993 | 1993 |
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| 1994 |
static void dcr_write_crcpc (void *opaque, int dcrn, target_ulong val)
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| 1994 |
static void dcr_write_crcpc (void *opaque, int dcrn, uint32_t val)
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| 1995 | 1995 |
{
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| 1996 | 1996 |
ppc405cr_cpc_t *cpc; |
| 1997 | 1997 |
|
| ... | ... | |
| 2353 | 2353 |
clk_setup(&cpc->clk_setup[PPC405EP_UART1_CLK], UART1_clk); |
| 2354 | 2354 |
} |
| 2355 | 2355 |
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| 2356 |
static target_ulong dcr_read_epcpc (void *opaque, int dcrn)
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| 2356 |
static uint32_t dcr_read_epcpc (void *opaque, int dcrn)
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| 2357 | 2357 |
{
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| 2358 | 2358 |
ppc405ep_cpc_t *cpc; |
| 2359 |
target_ulong ret;
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| 2359 |
uint32_t ret;
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| 2360 | 2360 |
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| 2361 | 2361 |
cpc = opaque; |
| 2362 | 2362 |
switch (dcrn) {
|
| ... | ... | |
| 2393 | 2393 |
return ret; |
| 2394 | 2394 |
} |
| 2395 | 2395 |
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| 2396 |
static void dcr_write_epcpc (void *opaque, int dcrn, target_ulong val)
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| 2396 |
static void dcr_write_epcpc (void *opaque, int dcrn, uint32_t val)
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| 2397 | 2397 |
{
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| 2398 | 2398 |
ppc405ep_cpc_t *cpc; |
| 2399 | 2399 |
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