Revision 74475455 hw/armv7m_nvic.c

b/hw/armv7m_nvic.c
64 64 
static void systick_reload(nvic_state *s, int reset)
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{
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    if (reset)
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        s->systick.tick = qemu_get_clock(vm_clock);
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        s->systick.tick = qemu_get_clock_ns(vm_clock);
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    s->systick.tick += (s->systick.reload + 1) * systick_scale(s);
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    qemu_mod_timer(s->systick.timer, s->systick.tick);
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}
......
136 136 
            int64_t t;
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            if ((s->systick.control & SYSTICK_ENABLE) == 0)
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                return 0;
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            t = qemu_get_clock(vm_clock);
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            t = qemu_get_clock_ns(vm_clock);
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            if (t >= s->systick.tick)
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                return 0;
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            val = ((s->systick.tick - (t + 1)) / systick_scale(s)) + 1;
......
273 273 
        s->systick.control &= 0xfffffff8;
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        s->systick.control |= value & 7;
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        if ((oldval ^ value) & SYSTICK_ENABLE) {
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            int64_t now = qemu_get_clock(vm_clock);
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            int64_t now = qemu_get_clock_ns(vm_clock);
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            if (value & SYSTICK_ENABLE) {
278 278 
                if (s->systick.tick) {
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                    s->systick.tick += now;
......
396 396 

  		





  397
  397
  
    
    gic_init(&s->gic);


  		





  398
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    cpu_register_physical_memory(0xe000e000, 0x1000, s->gic.iomemtype);


  		





  399
  
  
    
    s->systick.timer = qemu_new_timer(vm_clock, systick_timer_tick, s);


  		





  
  399
  
    
    s->systick.timer = qemu_new_timer_ns(vm_clock, systick_timer_tick, s);


  		





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    register_savevm(&dev->qdev, "armv7m_nvic", -1, 1, nvic_save, nvic_load, s);


  		





  401
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    return 0;


  		





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}


  		












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