Revision 74475455 hw/ppc.c
b/hw/ppc.c | ||
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419 | 419 |
ppc_tb_t *tb_env = env->tb_env; |
420 | 420 |
uint64_t tb; |
421 | 421 |
|
422 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset); |
|
422 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
|
|
423 | 423 |
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); |
424 | 424 |
|
425 | 425 |
return tb; |
... | ... | |
430 | 430 |
ppc_tb_t *tb_env = env->tb_env; |
431 | 431 |
uint64_t tb; |
432 | 432 |
|
433 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset); |
|
433 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
|
|
434 | 434 |
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); |
435 | 435 |
|
436 | 436 |
return tb >> 32; |
... | ... | |
454 | 454 |
ppc_tb_t *tb_env = env->tb_env; |
455 | 455 |
uint64_t tb; |
456 | 456 |
|
457 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset); |
|
457 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
|
|
458 | 458 |
tb &= 0xFFFFFFFF00000000ULL; |
459 |
cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock), |
|
459 |
cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
|
|
460 | 460 |
&tb_env->tb_offset, tb | (uint64_t)value); |
461 | 461 |
} |
462 | 462 |
|
... | ... | |
465 | 465 |
ppc_tb_t *tb_env = env->tb_env; |
466 | 466 |
uint64_t tb; |
467 | 467 |
|
468 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->tb_offset); |
|
468 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
|
|
469 | 469 |
tb &= 0x00000000FFFFFFFFULL; |
470 |
cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock), |
|
470 |
cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
|
|
471 | 471 |
&tb_env->tb_offset, ((uint64_t)value << 32) | tb); |
472 | 472 |
} |
473 | 473 |
|
... | ... | |
481 | 481 |
ppc_tb_t *tb_env = env->tb_env; |
482 | 482 |
uint64_t tb; |
483 | 483 |
|
484 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset); |
|
484 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
|
|
485 | 485 |
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); |
486 | 486 |
|
487 | 487 |
return tb; |
... | ... | |
492 | 492 |
ppc_tb_t *tb_env = env->tb_env; |
493 | 493 |
uint64_t tb; |
494 | 494 |
|
495 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset); |
|
495 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
|
|
496 | 496 |
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb); |
497 | 497 |
|
498 | 498 |
return tb >> 32; |
... | ... | |
503 | 503 |
ppc_tb_t *tb_env = env->tb_env; |
504 | 504 |
uint64_t tb; |
505 | 505 |
|
506 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset); |
|
506 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
|
|
507 | 507 |
tb &= 0xFFFFFFFF00000000ULL; |
508 |
cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock), |
|
508 |
cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
|
|
509 | 509 |
&tb_env->atb_offset, tb | (uint64_t)value); |
510 | 510 |
} |
511 | 511 |
|
... | ... | |
514 | 514 |
ppc_tb_t *tb_env = env->tb_env; |
515 | 515 |
uint64_t tb; |
516 | 516 |
|
517 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock(vm_clock), tb_env->atb_offset); |
|
517 |
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->atb_offset);
|
|
518 | 518 |
tb &= 0x00000000FFFFFFFFULL; |
519 |
cpu_ppc_store_tb(tb_env, qemu_get_clock(vm_clock), |
|
519 |
cpu_ppc_store_tb(tb_env, qemu_get_clock_ns(vm_clock),
|
|
520 | 520 |
&tb_env->atb_offset, ((uint64_t)value << 32) | tb); |
521 | 521 |
} |
522 | 522 |
|
... | ... | |
527 | 527 |
|
528 | 528 |
/* If the time base is already frozen, do nothing */ |
529 | 529 |
if (tb_env->tb_freq != 0) { |
530 |
vmclk = qemu_get_clock(vm_clock); |
|
530 |
vmclk = qemu_get_clock_ns(vm_clock);
|
|
531 | 531 |
/* Get the time base */ |
532 | 532 |
tb = cpu_ppc_get_tb(tb_env, vmclk, tb_env->tb_offset); |
533 | 533 |
/* Get the alternate time base */ |
... | ... | |
549 | 549 |
|
550 | 550 |
/* If the time base is not frozen, do nothing */ |
551 | 551 |
if (tb_env->tb_freq == 0) { |
552 |
vmclk = qemu_get_clock(vm_clock); |
|
552 |
vmclk = qemu_get_clock_ns(vm_clock);
|
|
553 | 553 |
/* Get the time base from tb_offset */ |
554 | 554 |
tb = tb_env->tb_offset; |
555 | 555 |
/* Get the alternate time base from atb_offset */ |
... | ... | |
569 | 569 |
uint32_t decr; |
570 | 570 |
int64_t diff; |
571 | 571 |
|
572 |
diff = next - qemu_get_clock(vm_clock); |
|
572 |
diff = next - qemu_get_clock_ns(vm_clock);
|
|
573 | 573 |
if (diff >= 0) |
574 | 574 |
decr = muldiv64(diff, tb_env->decr_freq, get_ticks_per_sec()); |
575 | 575 |
else |
... | ... | |
598 | 598 |
ppc_tb_t *tb_env = env->tb_env; |
599 | 599 |
uint64_t diff; |
600 | 600 |
|
601 |
diff = qemu_get_clock(vm_clock) - tb_env->purr_start; |
|
601 |
diff = qemu_get_clock_ns(vm_clock) - tb_env->purr_start;
|
|
602 | 602 |
|
603 | 603 |
return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, get_ticks_per_sec()); |
604 | 604 |
} |
... | ... | |
631 | 631 |
|
632 | 632 |
LOG_TB("%s: %08" PRIx32 " => %08" PRIx32 "\n", __func__, |
633 | 633 |
decr, value); |
634 |
now = qemu_get_clock(vm_clock); |
|
634 |
now = qemu_get_clock_ns(vm_clock);
|
|
635 | 635 |
next = now + muldiv64(value, get_ticks_per_sec(), tb_env->decr_freq); |
636 | 636 |
if (is_excp) |
637 | 637 |
next += *nextp - now; |
... | ... | |
692 | 692 |
ppc_tb_t *tb_env = env->tb_env; |
693 | 693 |
|
694 | 694 |
tb_env->purr_load = value; |
695 |
tb_env->purr_start = qemu_get_clock(vm_clock); |
|
695 |
tb_env->purr_start = qemu_get_clock_ns(vm_clock);
|
|
696 | 696 |
} |
697 | 697 |
|
698 | 698 |
static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq) |
... | ... | |
719 | 719 |
tb_env = qemu_mallocz(sizeof(ppc_tb_t)); |
720 | 720 |
env->tb_env = tb_env; |
721 | 721 |
/* Create new timer */ |
722 |
tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_ppc_decr_cb, env); |
|
722 |
tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_decr_cb, env);
|
|
723 | 723 |
if (0) { |
724 | 724 |
/* XXX: find a suitable condition to enable the hypervisor decrementer |
725 | 725 |
*/ |
726 |
tb_env->hdecr_timer = qemu_new_timer(vm_clock, &cpu_ppc_hdecr_cb, env); |
|
726 |
tb_env->hdecr_timer = qemu_new_timer_ns(vm_clock, &cpu_ppc_hdecr_cb, env);
|
|
727 | 727 |
} else { |
728 | 728 |
tb_env->hdecr_timer = NULL; |
729 | 729 |
} |
... | ... | |
787 | 787 |
env = opaque; |
788 | 788 |
tb_env = env->tb_env; |
789 | 789 |
ppcemb_timer = tb_env->opaque; |
790 |
now = qemu_get_clock(vm_clock); |
|
790 |
now = qemu_get_clock_ns(vm_clock);
|
|
791 | 791 |
switch ((env->spr[SPR_40x_TCR] >> 24) & 0x3) { |
792 | 792 |
case 0: |
793 | 793 |
next = 1 << 9; |
... | ... | |
833 | 833 |
} else { |
834 | 834 |
LOG_TB("%s: start PIT %016" PRIx64 "\n", |
835 | 835 |
__func__, ppcemb_timer->pit_reload); |
836 |
now = qemu_get_clock(vm_clock); |
|
836 |
now = qemu_get_clock_ns(vm_clock);
|
|
837 | 837 |
next = now + muldiv64(ppcemb_timer->pit_reload, |
838 | 838 |
get_ticks_per_sec(), tb_env->decr_freq); |
839 | 839 |
if (is_excp) |
... | ... | |
877 | 877 |
env = opaque; |
878 | 878 |
tb_env = env->tb_env; |
879 | 879 |
ppcemb_timer = tb_env->opaque; |
880 |
now = qemu_get_clock(vm_clock); |
|
880 |
now = qemu_get_clock_ns(vm_clock);
|
|
881 | 881 |
switch ((env->spr[SPR_40x_TCR] >> 30) & 0x3) { |
882 | 882 |
case 0: |
883 | 883 |
next = 1 << 17; |
... | ... | |
1002 | 1002 |
LOG_TB("%s freq %" PRIu32 "\n", __func__, freq); |
1003 | 1003 |
if (ppcemb_timer != NULL) { |
1004 | 1004 |
/* We use decr timer for PIT */ |
1005 |
tb_env->decr_timer = qemu_new_timer(vm_clock, &cpu_4xx_pit_cb, env); |
|
1005 |
tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &cpu_4xx_pit_cb, env);
|
|
1006 | 1006 |
ppcemb_timer->fit_timer = |
1007 |
qemu_new_timer(vm_clock, &cpu_4xx_fit_cb, env); |
|
1007 |
qemu_new_timer_ns(vm_clock, &cpu_4xx_fit_cb, env);
|
|
1008 | 1008 |
ppcemb_timer->wdt_timer = |
1009 |
qemu_new_timer(vm_clock, &cpu_4xx_wdt_cb, env); |
|
1009 |
qemu_new_timer_ns(vm_clock, &cpu_4xx_wdt_cb, env);
|
|
1010 | 1010 |
ppcemb_timer->decr_excp = decr_excp; |
1011 | 1011 |
} |
1012 | 1012 |
|
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