Revision 74475455 hw/ppc405_uc.c

b/hw/ppc405_uc.c
1347 1347 
    switch (addr) {
1348 1348 
    case 0x00:
1349 1349 
        /* Time base counter */
1350 
        ret = muldiv64(qemu_get_clock(vm_clock) + gpt->tb_offset,
1350 
        ret = muldiv64(qemu_get_clock_ns(vm_clock) + gpt->tb_offset,
1351 1351 
                       gpt->tb_freq, get_ticks_per_sec());
1352 1352 
        break;
1353 1353 
    case 0x10:
......
1404 1404 
    case 0x00:
1405 1405 
        /* Time base counter */
1406 1406 
        gpt->tb_offset = muldiv64(value, get_ticks_per_sec(), gpt->tb_freq)
1407 
            - qemu_get_clock(vm_clock);
1407 
            - qemu_get_clock_ns(vm_clock);
1408 1408 
        ppc4xx_gpt_compute_timer(gpt);
1409 1409 
        break;
1410 1410 
    case 0x10:
......
1501 1501 
    for (i = 0; i < 5; i++) {
1502 1502 
        gpt->irqs[i] = irqs[i];
1503 1503 
    }
1504 
    gpt->timer = qemu_new_timer(vm_clock, &ppc4xx_gpt_cb, gpt);
1504 
    gpt->timer = qemu_new_timer_ns(vm_clock, &ppc4xx_gpt_cb, gpt);
1505 1505 
#ifdef DEBUG_GPT
1506 1506 
    printf("%s: offset " TARGET_FMT_plx "\n", __func__, base);
1507 1507 
#endif

Also available in: Unified diff