Revision 74475455 hw/tusb6010.c
b/hw/tusb6010.c | ||
---|---|---|
520 | 520 |
case TUSB_DEV_OTG_TIMER: |
521 | 521 |
s->otg_timer_val = value; |
522 | 522 |
if (value & TUSB_DEV_OTG_TIMER_ENABLE) |
523 |
qemu_mod_timer(s->otg_timer, qemu_get_clock(vm_clock) + |
|
523 |
qemu_mod_timer(s->otg_timer, qemu_get_clock_ns(vm_clock) +
|
|
524 | 524 |
muldiv64(TUSB_DEV_OTG_TIMER_VAL(value), |
525 | 525 |
get_ticks_per_sec(), TUSB_DEVCLOCK)); |
526 | 526 |
else |
... | ... | |
742 | 742 |
s->iomemtype[1] = cpu_register_io_memory(tusb_async_readfn, |
743 | 743 |
tusb_async_writefn, s, DEVICE_NATIVE_ENDIAN); |
744 | 744 |
s->irq = intr; |
745 |
s->otg_timer = qemu_new_timer(vm_clock, tusb_otg_tick, s); |
|
746 |
s->pwr_timer = qemu_new_timer(vm_clock, tusb_power_tick, s); |
|
745 |
s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s);
|
|
746 |
s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s);
|
|
747 | 747 |
s->musb = musb_init(qemu_allocate_irqs(tusb_musb_core_intr, s, |
748 | 748 |
__musb_irq_max)); |
749 | 749 |
|
... | ... | |
761 | 761 |
s->intr_ok = 0; |
762 | 762 |
tusb_intr_update(s); |
763 | 763 |
qemu_mod_timer(s->pwr_timer, |
764 |
qemu_get_clock(vm_clock) + get_ticks_per_sec() / 2); |
|
764 |
qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 2);
|
|
765 | 765 |
} |
766 | 766 |
} |
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