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/*
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* PowerPC emulation micro-operations for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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//#define DEBUG_OP
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#include "config.h" |
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#include "exec.h" |
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#include "host-utils.h" |
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#include "helper_regs.h" |
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#include "op_helper.h" |
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#if !defined(CONFIG_USER_ONLY)
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/* Segment registers load and store */
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void OPPROTO op_load_sr (void) |
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{
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T0 = env->sr[T1]; |
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RETURN(); |
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} |
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void OPPROTO op_store_sr (void) |
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{
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do_store_sr(env, T1, T0); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO op_load_slb (void) |
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{
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T0 = ppc_load_slb(env, T1); |
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RETURN(); |
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} |
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void OPPROTO op_store_slb (void) |
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{
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ppc_store_slb(env, T1, T0); |
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RETURN(); |
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} |
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#endif /* defined(TARGET_PPC64) */ |
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void OPPROTO op_load_sdr1 (void) |
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{
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T0 = env->sdr1; |
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RETURN(); |
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} |
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void OPPROTO op_store_sdr1 (void) |
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{
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do_store_sdr1(env, T0); |
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RETURN(); |
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} |
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#if defined (TARGET_PPC64)
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void OPPROTO op_load_asr (void) |
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{
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T0 = env->asr; |
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RETURN(); |
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} |
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void OPPROTO op_store_asr (void) |
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{
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ppc_store_asr(env, T0); |
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RETURN(); |
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} |
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#endif
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void OPPROTO op_load_msr (void) |
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{
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T0 = env->msr; |
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RETURN(); |
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} |
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void OPPROTO op_store_msr (void) |
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{
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do_store_msr(); |
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RETURN(); |
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} |
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#if defined (TARGET_PPC64)
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void OPPROTO op_store_msr_32 (void) |
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{
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T0 = (env->msr & ~0xFFFFFFFFULL) | (T0 & 0xFFFFFFFF); |
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do_store_msr(); |
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RETURN(); |
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} |
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#endif
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void OPPROTO op_update_riee (void) |
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{
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/* We don't call do_store_msr here as we won't trigger
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* any special case nor change hflags
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*/
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T0 &= (1 << MSR_RI) | (1 << MSR_EE); |
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env->msr &= ~(1 << MSR_RI) | (1 << MSR_EE); |
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env->msr |= T0; |
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RETURN(); |
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} |
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#endif
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/* SPR */
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void OPPROTO op_load_spr (void) |
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{
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T0 = env->spr[PARAM1]; |
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RETURN(); |
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} |
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void OPPROTO op_store_spr (void) |
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{
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env->spr[PARAM1] = T0; |
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RETURN(); |
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} |
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void OPPROTO op_load_dump_spr (void) |
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{
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T0 = ppc_load_dump_spr(PARAM1); |
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RETURN(); |
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} |
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void OPPROTO op_store_dump_spr (void) |
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{
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ppc_store_dump_spr(PARAM1, T0); |
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RETURN(); |
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} |
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void OPPROTO op_mask_spr (void) |
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{
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env->spr[PARAM1] &= ~T0; |
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RETURN(); |
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} |
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void OPPROTO op_load_tbl (void) |
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{
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T0 = cpu_ppc_load_tbl(env); |
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RETURN(); |
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} |
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void OPPROTO op_load_tbu (void) |
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{
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T0 = cpu_ppc_load_tbu(env); |
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RETURN(); |
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} |
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void OPPROTO op_load_atbl (void) |
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{
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T0 = cpu_ppc_load_atbl(env); |
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RETURN(); |
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} |
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void OPPROTO op_load_atbu (void) |
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{
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T0 = cpu_ppc_load_atbu(env); |
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RETURN(); |
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} |
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#if !defined(CONFIG_USER_ONLY)
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void OPPROTO op_store_tbl (void) |
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{
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cpu_ppc_store_tbl(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_tbu (void) |
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{
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cpu_ppc_store_tbu(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_atbl (void) |
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{
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cpu_ppc_store_atbl(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_atbu (void) |
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{
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cpu_ppc_store_atbu(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_load_decr (void) |
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{
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T0 = cpu_ppc_load_decr(env); |
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RETURN(); |
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} |
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void OPPROTO op_store_decr (void) |
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{
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cpu_ppc_store_decr(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_load_ibat (void) |
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{
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T0 = env->IBAT[PARAM1][PARAM2]; |
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RETURN(); |
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} |
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void OPPROTO op_store_ibatu (void) |
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{
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do_store_ibatu(env, PARAM1, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_ibatl (void) |
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{
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#if 1 |
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env->IBAT[1][PARAM1] = T0;
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#else
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do_store_ibatl(env, PARAM1, T0); |
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#endif
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RETURN(); |
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} |
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void OPPROTO op_load_dbat (void) |
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{
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T0 = env->DBAT[PARAM1][PARAM2]; |
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RETURN(); |
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} |
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void OPPROTO op_store_dbatu (void) |
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{
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do_store_dbatu(env, PARAM1, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_dbatl (void) |
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{
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#if 1 |
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env->DBAT[1][PARAM1] = T0;
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#else
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do_store_dbatl(env, PARAM1, T0); |
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#endif
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RETURN(); |
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} |
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#endif /* !defined(CONFIG_USER_ONLY) */ |
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/*** Integer shift ***/
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void OPPROTO op_srli_T1 (void) |
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{
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T1 = (uint32_t)T1 >> PARAM1; |
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RETURN(); |
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} |
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/* Return from interrupt */
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#if !defined(CONFIG_USER_ONLY)
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/* Exception vectors */
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void OPPROTO op_store_excp_prefix (void) |
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{
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T0 &= env->ivpr_mask; |
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env->excp_prefix = T0; |
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RETURN(); |
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} |
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void OPPROTO op_store_excp_vector (void) |
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{
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T0 &= env->ivor_mask; |
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env->excp_vectors[PARAM1] = T0; |
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RETURN(); |
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} |
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#endif
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#if !defined(CONFIG_USER_ONLY)
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/* tlbia */
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void OPPROTO op_tlbia (void) |
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{
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ppc_tlb_invalidate_all(env); |
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RETURN(); |
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} |
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/* tlbie */
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void OPPROTO op_tlbie (void) |
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{
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ppc_tlb_invalidate_one(env, (uint32_t)T0); |
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RETURN(); |
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} |
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#if defined(TARGET_PPC64)
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void OPPROTO op_tlbie_64 (void) |
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{
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ppc_tlb_invalidate_one(env, T0); |
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RETURN(); |
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} |
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#endif
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#if defined(TARGET_PPC64)
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void OPPROTO op_slbia (void) |
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{
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ppc_slb_invalidate_all(env); |
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RETURN(); |
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} |
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void OPPROTO op_slbie (void) |
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{
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ppc_slb_invalidate_one(env, (uint32_t)T0); |
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RETURN(); |
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} |
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void OPPROTO op_slbie_64 (void) |
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{
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ppc_slb_invalidate_one(env, T0); |
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RETURN(); |
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} |
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#endif
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#endif
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/* 601 specific */
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void OPPROTO op_load_601_rtcl (void) |
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{
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T0 = cpu_ppc601_load_rtcl(env); |
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RETURN(); |
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} |
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void OPPROTO op_load_601_rtcu (void) |
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{
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T0 = cpu_ppc601_load_rtcu(env); |
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RETURN(); |
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} |
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#if !defined(CONFIG_USER_ONLY)
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void OPPROTO op_store_601_rtcl (void) |
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{
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cpu_ppc601_store_rtcl(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_601_rtcu (void) |
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{
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cpu_ppc601_store_rtcu(env, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_hid0_601 (void) |
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{
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do_store_hid0_601(); |
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RETURN(); |
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} |
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void OPPROTO op_load_601_bat (void) |
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{
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T0 = env->IBAT[PARAM1][PARAM2]; |
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RETURN(); |
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} |
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void OPPROTO op_store_601_batl (void) |
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{
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do_store_ibatl_601(env, PARAM1, T0); |
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RETURN(); |
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} |
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void OPPROTO op_store_601_batu (void) |
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{
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do_store_ibatu_601(env, PARAM1, T0); |
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RETURN(); |
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} |
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#endif /* !defined(CONFIG_USER_ONLY) */ |
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/* PowerPC 601 specific instructions (POWER bridge) */
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/* XXX: those micro-ops need tests ! */
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void OPPROTO op_POWER_abs (void) |
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{
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if ((int32_t)T0 == INT32_MIN)
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T0 = INT32_MAX; |
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else if ((int32_t)T0 < 0) |
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T0 = -T0; |
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RETURN(); |
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} |
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void OPPROTO op_POWER_abso (void) |
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{
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do_POWER_abso(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_clcs (void) |
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{
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do_POWER_clcs(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_div (void) |
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{
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do_POWER_div(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_divo (void) |
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{
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do_POWER_divo(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_divs (void) |
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{
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do_POWER_divs(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_divso (void) |
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{
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do_POWER_divso(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_doz (void) |
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{
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if ((int32_t)T1 > (int32_t)T0)
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T0 = T1 - T0; |
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else
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T0 = 0;
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RETURN(); |
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} |
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void OPPROTO op_POWER_dozo (void) |
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{
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do_POWER_dozo(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_maskg (void) |
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{
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do_POWER_maskg(); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_maskir (void) |
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{
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T0 = (T0 & ~T2) | (T1 & T2); |
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RETURN(); |
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} |
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void OPPROTO op_POWER_mul (void) |
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{
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uint64_t tmp; |
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tmp = (uint64_t)T0 * (uint64_t)T1; |
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env->spr[SPR_MQ] = tmp >> 32;
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T0 = tmp; |
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RETURN(); |
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} |
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|
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void OPPROTO op_POWER_mulo (void) |
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{
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do_POWER_mulo(); |
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RETURN(); |
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} |
| 462 |
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void OPPROTO op_POWER_nabs (void) |
| 464 |
{
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if (T0 > 0) |
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T0 = -T0; |
| 467 |
RETURN(); |
| 468 |
} |
| 469 |
|
| 470 |
void OPPROTO op_POWER_nabso (void) |
| 471 |
{
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/* nabs never overflows */
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if (T0 > 0) |
| 474 |
T0 = -T0; |
| 475 |
env->xer &= ~(1 << XER_OV);
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RETURN(); |
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} |
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/* POWER instructions not implemented in PowerPC 601 */
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#if !defined(CONFIG_USER_ONLY)
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void OPPROTO op_POWER_mfsri (void) |
| 482 |
{
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T1 = T0 >> 28;
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T0 = env->sr[T1]; |
| 485 |
RETURN(); |
| 486 |
} |
| 487 |
|
| 488 |
void OPPROTO op_POWER_rac (void) |
| 489 |
{
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| 490 |
do_POWER_rac(); |
| 491 |
RETURN(); |
| 492 |
} |
| 493 |
#endif
|
| 494 |
|
| 495 |
/* PowerPC 4xx specific micro-ops */
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void OPPROTO op_load_dcr (void) |
| 497 |
{
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do_load_dcr(); |
| 499 |
RETURN(); |
| 500 |
} |
| 501 |
|
| 502 |
void OPPROTO op_store_dcr (void) |
| 503 |
{
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| 504 |
do_store_dcr(); |
| 505 |
RETURN(); |
| 506 |
} |
| 507 |
|
| 508 |
#if !defined(CONFIG_USER_ONLY)
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| 509 |
void OPPROTO op_wrte (void) |
| 510 |
{
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| 511 |
/* We don't call do_store_msr here as we won't trigger
|
| 512 |
* any special case nor change hflags
|
| 513 |
*/
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| 514 |
T0 &= 1 << MSR_EE;
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| 515 |
env->msr &= ~(1 << MSR_EE);
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| 516 |
env->msr |= T0; |
| 517 |
RETURN(); |
| 518 |
} |
| 519 |
|
| 520 |
void OPPROTO op_440_tlbre (void) |
| 521 |
{
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| 522 |
do_440_tlbre(PARAM1); |
| 523 |
RETURN(); |
| 524 |
} |
| 525 |
|
| 526 |
void OPPROTO op_440_tlbsx (void) |
| 527 |
{
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| 528 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
|
| 529 |
RETURN(); |
| 530 |
} |
| 531 |
|
| 532 |
void OPPROTO op_4xx_tlbsx_check (void) |
| 533 |
{
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| 534 |
int tmp;
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| 535 |
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tmp = xer_so; |
| 537 |
if ((int)T0 != -1) |
| 538 |
tmp |= 0x02;
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env->crf[0] = tmp;
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RETURN(); |
| 541 |
} |
| 542 |
|
| 543 |
void OPPROTO op_440_tlbwe (void) |
| 544 |
{
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do_440_tlbwe(PARAM1); |
| 546 |
RETURN(); |
| 547 |
} |
| 548 |
|
| 549 |
void OPPROTO op_4xx_tlbre_lo (void) |
| 550 |
{
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| 551 |
do_4xx_tlbre_lo(); |
| 552 |
RETURN(); |
| 553 |
} |
| 554 |
|
| 555 |
void OPPROTO op_4xx_tlbre_hi (void) |
| 556 |
{
|
| 557 |
do_4xx_tlbre_hi(); |
| 558 |
RETURN(); |
| 559 |
} |
| 560 |
|
| 561 |
void OPPROTO op_4xx_tlbsx (void) |
| 562 |
{
|
| 563 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
| 564 |
RETURN(); |
| 565 |
} |
| 566 |
|
| 567 |
void OPPROTO op_4xx_tlbwe_lo (void) |
| 568 |
{
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| 569 |
do_4xx_tlbwe_lo(); |
| 570 |
RETURN(); |
| 571 |
} |
| 572 |
|
| 573 |
void OPPROTO op_4xx_tlbwe_hi (void) |
| 574 |
{
|
| 575 |
do_4xx_tlbwe_hi(); |
| 576 |
RETURN(); |
| 577 |
} |
| 578 |
#endif
|
| 579 |
|
| 580 |
/* SPR micro-ops */
|
| 581 |
/* 440 specific */
|
| 582 |
#if !defined(CONFIG_USER_ONLY)
|
| 583 |
void OPPROTO op_store_pir (void) |
| 584 |
{
|
| 585 |
env->spr[SPR_PIR] = T0 & 0x0000000FUL;
|
| 586 |
RETURN(); |
| 587 |
} |
| 588 |
|
| 589 |
void OPPROTO op_load_403_pb (void) |
| 590 |
{
|
| 591 |
do_load_403_pb(PARAM1); |
| 592 |
RETURN(); |
| 593 |
} |
| 594 |
|
| 595 |
void OPPROTO op_store_403_pb (void) |
| 596 |
{
|
| 597 |
do_store_403_pb(PARAM1); |
| 598 |
RETURN(); |
| 599 |
} |
| 600 |
|
| 601 |
void OPPROTO op_load_40x_pit (void) |
| 602 |
{
|
| 603 |
T0 = load_40x_pit(env); |
| 604 |
RETURN(); |
| 605 |
} |
| 606 |
|
| 607 |
void OPPROTO op_store_40x_pit (void) |
| 608 |
{
|
| 609 |
store_40x_pit(env, T0); |
| 610 |
RETURN(); |
| 611 |
} |
| 612 |
|
| 613 |
void OPPROTO op_store_40x_dbcr0 (void) |
| 614 |
{
|
| 615 |
store_40x_dbcr0(env, T0); |
| 616 |
RETURN(); |
| 617 |
} |
| 618 |
|
| 619 |
void OPPROTO op_store_40x_sler (void) |
| 620 |
{
|
| 621 |
store_40x_sler(env, T0); |
| 622 |
RETURN(); |
| 623 |
} |
| 624 |
|
| 625 |
void OPPROTO op_store_booke_tcr (void) |
| 626 |
{
|
| 627 |
store_booke_tcr(env, T0); |
| 628 |
RETURN(); |
| 629 |
} |
| 630 |
|
| 631 |
void OPPROTO op_store_booke_tsr (void) |
| 632 |
{
|
| 633 |
store_booke_tsr(env, T0); |
| 634 |
RETURN(); |
| 635 |
} |
| 636 |
#endif /* !defined(CONFIG_USER_ONLY) */ |
| 637 |
|