Archipelago » qemu

#include "block_int.h"

#include "sysemu.h"

{

    drive_opt_idx = drive_add(NULL, "%s", opts);

    if (!drive_opt_idx)

        drive_remove(drive_opt_idx);

    }

}

void destroy_nic(dev_match_fn *match_fn, void *arg)

void destroy_bdrvs(dev_match_fn *match_fn, void *arg)

{

    struct BlockDriverState *bs;

        if (bs) {

            if (bs->private && match_fn(bs->private, arg)) {

                drive_uninit(bs);

    void *etraxfs_dmac;

    struct etraxfs_dma_client *eth[2] = {NULL, NULL};

    int kernel_size;

    int i;

    ram_addr_t phys_ram;

    ram_addr_t phys_flash;

    phys_flash = qemu_ram_alloc(FLASH_SIZE);

    pflash_cfi02_register(0x0, phys_flash,

                          FLASH_SIZE >> 16,

                          1, 2, 0x0000, 0x0000, 0x0000, 0x0000,

                          0x555, 0x2aa);

                const char *initrd_filename, const char *cpu_model)

{

    PXA2xxState *cpu;

    uint32_t connex_rom = 0x01000000;

    uint32_t connex_ram = 0x04000000;

    cpu = pxa255_init(connex_ram);

        fprintf(stderr, "A flash image must be given with the "

                "'pflash' parameter\n");

        exit(1);

    }

    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom),

            2, 0, 0, 0, 0)) {

        fprintf(stderr, "qemu: Error registering flash memory.\n");

        exit(1);

                const char *initrd_filename, const char *cpu_model)

{

    PXA2xxState *cpu;

    uint32_t verdex_rom = 0x02000000;

    uint32_t verdex_ram = 0x10000000;

    cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");

        fprintf(stderr, "A flash image must be given with the "

                "'pflash' parameter\n");

        exit(1);

    }

    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom),

            2, 0, 0, 0, 0)) {

        fprintf(stderr, "qemu: Error registering flash memory.\n");

        exit(1);

    target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };

    PXA2xxState *cpu;

    qemu_irq *mst_irq;

    if (!cpu_model)

        cpu_model = "pxa270-c5";

    /* There are two 32MiB flash devices on the board */

    for (i = 0; i < 2; i ++) {

            fprintf(stderr, "Two flash images must be given with the "

                    "'pflash' parameter\n");

            exit(1);

        if (!pflash_cfi01_register(mainstone_flash_base[i],

                                qemu_ram_alloc(MAINSTONE_FLASH),

                                MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory.\n");

            exit(1);

        exit(1);

    }

    for (n = 0; n < MAX_FD; n++) {

    }

    fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds);

    uint8_t *eeprom_buf;

    i2c_bus *smbus;

    int i;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    BlockDriverState *fd[MAX_FD];

    int fl_idx = 0;

        env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));

        write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry);

    } else {

            /* Load firmware from flash. */

            bios_size = 0x400000;

            fl_sectors = bios_size >> 16;

            printf("Register parallel flash %d size " TARGET_FMT_lx " at "

                   "offset %08lx addr %08llx '%s' %x\n",

                   fl_idx, bios_size, bios_offset, 0x1e000000LL,

#endif

            pflash_cfi01_register(0x1e000000LL, bios_offset,

                                  4, 0x0000, 0x0000, 0x0000, 0x0000);

            fl_idx++;

        } else {

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    piix4_devfn = piix4_init(pci_bus, 80);

    if (parallel_hds[0])

        parallel_init(0x378, i8259[7], parallel_hds[0]);

    for(i = 0; i < MAX_FD; i++) {

    }

    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);

    RTCState *rtc_state;

    int i;

    qemu_irq *i8259;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    /* init CPUs */

    if (cpu_model == NULL) {

                                     bios_offset | IO_MEM_ROM);

        load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);

        uint32_t mips_rom = 0x00400000;

        bios_offset = qemu_ram_alloc(mips_rom);

        if (!pflash_cfi01_register(0x1fc00000, bios_offset,

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory.\n");

	}

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    for(i = 0; i < MAX_IDE_BUS; i++)

    qemu_irq pic[32];

    DeviceState *dev;

    int i;

    unsigned long flash_size;

    if (!cpu_model)

        cpu_model = "arm926";

                   serial_hds[1], 1);

    /* Register flash */

        if (flash_size != 8*1024*1024 && flash_size != 16*1024*1024 &&

            flash_size != 32*1024*1024) {

            fprintf(stderr, "Invalid flash image size\n");

         * image is smaller than 32 MB.

         */

        pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(flash_size),

                              (flash_size + 0xffff) >> 16,

                              MP_FLASH_SIZE_MAX / flash_size,

                              2, 0x00BF, 0x236D, 0x0000, 0x0000,

{

    int pagesize;

    NANDFlashState *s;

    if (nand_flash_ids[chip_id].size == 0) {

        hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__);

    }

    s = (NANDFlashState *) qemu_mallocz(sizeof(NANDFlashState));

    s->manf_id = manf_id;

    s->chip_id = chip_id;

    s->size = nand_flash_ids[s->chip_id].size << 20;

    ram_addr_t imif_base, emiff_base;

    qemu_irq *cpu_irq;

    qemu_irq dma_irqs[6];

    if (!core)

        core = "ti925t";

    omap_dpll_init(&s->dpll[1], 0xfffed000, omap_findclk(s, "dpll2"));

    omap_dpll_init(&s->dpll[2], 0xfffed100, omap_findclk(s, "dpll3"));

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

                    s->irq[1][OMAP_INT_OQN], &s->drq[OMAP_DMA_MMC_TX],

                    omap_findclk(s, "mmc_ck"));

    qemu_irq *cpu_irq;

    qemu_irq dma_irqs[4];

    omap_clk gpio_clks[4];

    int i;

    /* Core */

    s->sdrc = omap_sdrc_init(0x68009000);

    s->gpmc = omap_gpmc_init(0x6800a000, s->irq[0][OMAP_INT_24XX_GPMC_IRQ]);

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

                    s->irq[0][OMAP_INT_24XX_MMC_IRQ],

                    &s->drq[OMAP24XX_DMA_MMC1_TX],

                    omap_findclk(s, "mmc_fclk"), omap_findclk(s, "mmc_iclk"));

    static uint32_t cs2val = 0x00001139;

    static uint32_t cs3val = 0x00001139;

    ram_addr_t phys_flash;

    int fl_idx;

    uint32_t flash_size = flash0_size;

    fl_idx = 0;

        if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory %d.\n",

                           fl_idx);

    }

    if ((version == 1) &&

        cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,

                        (phys_flash = qemu_ram_alloc(flash1_size)) |

                        IO_MEM_ROM);

                        OMAP_CS1_SIZE - flash1_size, io);

        if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),

            4, 0, 0, 0, 0)) {

            fprintf(stderr, "qemu: Error registering flash memory %d.\n",

                           fl_idx);

void *onenand_init(uint32_t id, int regshift, qemu_irq irq)

{

    OneNANDState *s = (OneNANDState *) qemu_mallocz(sizeof(*s));

    uint32_t size = 1 << (24 + ((id >> 12) & 7));

    void *ram;

    s->density_mask = (id & (1 << 11)) ? (1 << (6 + ((id >> 12) & 7))) : 0;

    s->iomemtype = cpu_register_io_memory(onenand_readfn,

                    onenand_writefn, s);

        s->image = memset(qemu_malloc(size + (size >> 5)),

                        0xff, size + (size >> 5));

    else

    s->otp = memset(qemu_malloc((64 + 2) << PAGE_SHIFT),

                    0xff, (64 + 2) << PAGE_SHIFT);

    s->ram = qemu_ram_alloc(0xc000 << s->shift);

    CPUState *env;

    qemu_irq *cpu_irq;

    qemu_irq *i8259;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    BlockDriverState *fd[MAX_FD];

    int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    if (pci_enabled) {

#endif

    for(i = 0; i < MAX_FD; i++) {

    }

    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);

    /* Add virtio block devices */

    if (pci_enabled) {

        int unit_id = 0;

            pci_dev = pci_create(virtio_blk_name,

            qdev_init(&pci_dev->qdev);

            unit_id++;

        }

{

    int dom, pci_bus;

    unsigned slot;

    int success = 0;

    PCIDevice *dev;

    if (pci_read_devaddr(mon, pci_addr, &dom, &pci_bus, &slot)) {

        return;

        return;

    }

        return;

        monitor_printf(mon, "Parameter addr not supported\n");

        return;

    }

    bus = drive_get_max_bus (type);

    switch (type) {

    case IF_SCSI:

        success = 1;

        break;

    default:

        monitor_printf(mon, "Can't hot-add drive to type %d\n", type);

    if (success)

        monitor_printf(mon, "OK bus %d, unit %d\n",

    return;

}

                                           const char *opts)

{

    PCIDevice *dev;

    char buf[128];

    if (get_param_value(buf, sizeof(buf), "if", opts)) {

    }

    if (get_param_value(buf, sizeof(buf), "file", opts)) {

            return NULL;

            monitor_printf(mon, "Parameter addr not supported\n");

            return NULL;

        }

    DeviceState *dev;

    CPUState *env;

    int kernel_size;

    int i;

    target_phys_addr_t ddr_base = 0x90000000;

    ram_addr_t phys_lmb_bram;

    cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM);

    phys_flash = qemu_ram_alloc(FLASH_SIZE);

    pflash_cfi02_register(0xa0000000, phys_flash,

                          FLASH_SIZE >> 16,

                          1, 1, 0x0000, 0x0000, 0x0000, 0x0000,

                          0x555, 0x2aa);

    int linux_boot;

    int fl_idx, fl_sectors, len;

    int ppc_boot_device = boot_device[0];

    /* XXX: fix this */

    ram_bases[0] = qemu_ram_alloc(0x08000000);

#endif

    fl_idx = 0;

#ifdef USE_FLASH_BIOS

        bios_offset = qemu_ram_alloc(bios_size);

        fl_sectors = (bios_size + 65535) >> 16;

#ifdef DEBUG_BOARD_INIT

        printf("Register parallel flash %d size " ADDRX " at offset %08lx "

               " addr " ADDRX " '%s' %d\n",

               fl_idx, bios_size, bios_offset, -bios_size,

#endif

        pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,

                              2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);

        fl_idx++;

    } else

    int linux_boot;

    int fl_idx, fl_sectors;

    int ppc_boot_device = boot_device[0];

    /* RAM is soldered to the board so the size cannot be changed */

    ram_bases[0] = qemu_ram_alloc(0x04000000);

#endif

    fl_idx = 0;

#if defined(USE_FLASH_BIOS)

        /* XXX: should check that size is 2MB */

        //        bios_size = 2 * 1024 * 1024;

        fl_sectors = (bios_size + 65535) >> 16;

        printf("Register parallel flash %d size " ADDRX " at offset %08lx "

               " addr " ADDRX " '%s' %d\n",

               fl_idx, bios_size, bios_offset, -bios_size,

#endif

        pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,

                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);

        fl_idx++;

    } else

                                     bios_size, bios_offset | IO_MEM_ROM);

    }

    /* Register Linux flash */

        /* XXX: should check that size is 32MB */

        bios_size = 32 * 1024 * 1024;

        fl_sectors = (bios_size + 65535) >> 16;

        printf("Register parallel flash %d size " ADDRX " at offset %08lx "

               " addr " ADDRX " '%s'\n",

               fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,

#endif

        bios_offset = qemu_ram_alloc(bios_size);

        pflash_cfi02_register(0xfc000000, bios_offset,

                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);

        fl_idx++;

    }

    target_ulong dt_base = 0;

    void *fdt;

    int i;

    /* Setup CPU. */

    env = ppc440ep_init(&ram_size, &pcibus, pci_irq_nrs, 1, cpu_model);

        int unit_id = 0;

        /* Add virtio block devices. */

            qdev_init(&pci_dev->qdev);

            unit_id++;

        }

    qemu_irq *dummy_irq;

    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;

    int ppc_boot_device;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    void *fw_cfg;

    void *dbdma;

        exit(1);

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    dbdma = DBDMA_init(&dbdma_mem_index);

    pci_cmd646_ide_init(pci_bus, hd, 0);

    int escc_mem_index, ide_mem_index[2];

    uint16_t ppc_boot_device;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    void *fw_cfg;

    void *dbdma;

    uint8_t *vga_bios_ptr;

    }

    /* First IDE channel is a MAC IDE on the MacIO bus */

    dbdma = DBDMA_init(&dbdma_mem_index);

    ide_mem_index[0] = -1;

    ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);

    /* Second IDE channel is a CMD646 on the PCI bus */

    hd[3] = hd[2] = NULL;

    pci_cmd646_ide_init(pci_bus, hd, 0);

    PCIBus *pci_bus;

    qemu_irq *i8259;

    int ppc_boot_device;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    BlockDriverState *fd[MAX_FD];

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    for(i = 0; i < MAX_IDE_BUS; i++) {

    //    SB16_init();

    for(i = 0; i < MAX_FD; i++) {

    }

    fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);

    unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};

    qemu_irq *irqs, *mpic, *pci_irqs;

    SerialState * serial[2];

    /* Setup CPU */

    env = cpu_ppc_init("e500v2_v30");

        int unit_id = 0;

        /* Add virtio block devices. */

            qdev_init(&pci_dev->qdev);

            unit_id++;

        }

{

    PXA2xxState *s;

    int iomemtype, i;

    s = (PXA2xxState *) qemu_mallocz(sizeof(PXA2xxState));

    if (revision && strncmp(revision, "pxa27", 5)) {

    s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 121);

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

                              s->pic[PXA2XX_PIC_MMC], s->dma);

    for (i = 0; pxa270_serial[i].io_base; i ++)

{

    PXA2xxState *s;

    int iomemtype, i;

    s = (PXA2xxState *) qemu_mallocz(sizeof(PXA2xxState));

    s->gpio = pxa2xx_gpio_init(0x40e00000, s->env, s->pic, 85);

        fprintf(stderr, "qemu: missing SecureDigital device\n");

        exit(1);

    }

                              s->pic[PXA2XX_PIC_MMC], s->dma);

    for (i = 0; pxa255_serial[i].io_base; i ++)

BlockDriverState *qdev_init_bdrv(DeviceState *dev, BlockInterfaceType type)

{

    int unit = next_block_unit[type]++;

}

BusState *qdev_get_child_bus(DeviceState *dev, const char *name)

{

   int bus = next_scsi_bus++;

   int unit;

   for (unit = 0; unit < MAX_SCSI_DEVS; unit++) {

           continue;

       }

   }

}

    ram_addr_t sdram_addr;

    qemu_irq *irq;

    PCIBus *pci;

    int i;

    if (!cpu_model)

    sm501_init(0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]);

    /* onboard CF (True IDE mode, Master only). */

	mmio_ide_init(0x14001000, 0x1400080c, irq[CF_IDE], 1,

    /* NIC: rtl8139 on-board, and 2 slots. */

    for (i = 0; i < nb_nics; i++)

static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)

{

    PCMCIACardState *md;

    BlockDriverState *bs;

        return;

    if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {

        md = dscm1xxxx_init(bs);

        pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);

    qemu_irq *cpu_halt;

    unsigned long kernel_size;

    BlockDriverState *fd[MAX_FD];

    void *fw_cfg;

    DeviceState *dev;

    /* init CPUs */

    if (!cpu_model)

    if (hwdef->fd_base) {

        /* there is zero or one floppy drive */

        memset(fd, 0, sizeof(fd));

        sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,

                          &fdc_tc);

    qemu_irq fdc_tc;

    unsigned long kernel_size;

    BlockDriverState *fd[MAX_FD];

    void *fw_cfg;

    DeviceState *dev;

    unsigned int i;

    /* init CPU */

    if (!cpu_model)

    if (hwdef->fd_base != (target_phys_addr_t)-1) {

        /* there is zero or one floppy drive */

        memset(fd, 0, sizeof(fd));

        sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,

                          &fdc_tc);

    long initrd_size, kernel_size;

    PCIBus *pci_bus, *pci_bus2, *pci_bus3;

    qemu_irq *irq;

    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    BlockDriverState *fd[MAX_FD];

    void *fw_cfg;

    /* init CPUs */

    env = cpu_devinit(cpu_model, hwdef);

        exit(1);

    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {

    }

    pci_cmd646_ide_init(pci_bus, hd, 1);

    /* FIXME: wire up interrupts.  */

    i8042_init(NULL/*1*/, NULL/*12*/, 0x60);

    for(i = 0; i < MAX_FD; i++) {

    }

    floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd);

    nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59);

static void tosa_microdrive_attach(PXA2xxState *cpu)

{

    PCMCIACardState *md;

    BlockDriverState *bs;

        return;

    if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {

        md = dscm1xxxx_init(bs);

        pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);

    int                 requests_finished;

    /* qemu block driver */

    BlockDriverState    *bs;

    QEMUBH              *bh;

};

static int blk_init(struct XenDevice *xendev)

{

    struct XenBlkDev *blkdev = container_of(xendev, struct XenBlkDev, xendev);

    char *h;

    /* read xenstore entries */

	info  |= VDISK_CDROM;

    /* init qemu block driver */

        /* setup via xenbus -> create new block driver instance */

        xen_be_printf(&blkdev->xendev, 2, "create new bdrv (xenbus setup)\n");

	blkdev->bs = bdrv_new(blkdev->dev);

    } else {

        /* setup via qemu cmdline -> already setup for us */

        xen_be_printf(&blkdev->xendev, 2, "get configured bdrv (cmdline setup)\n");

    }

    blkdev->file_blk  = BLOCK_SIZE;

    blkdev->file_size = bdrv_getlength(blkdev->bs);

    struct XenBlkDev *blkdev = container_of(xendev, struct XenBlkDev, xendev);

    if (blkdev->bs) {

            /* close/delete only if we created it ourself */

            bdrv_close(blkdev->bs);

            bdrv_delete(blkdev->bs);

			const char *cpu_model)

{

    CPUState *env;

    /* Initialize a dummy CPU */

    if (cpu_model == NULL) {

    /* configure disks */

    for (i = 0; i < 16; i++) {

            continue;

    }

    /* configure nics */

static void do_commit(Monitor *mon, const char *device)

{

    all_devices = !strcmp(device, "all");

    }

}

            }

        case 's':

            {

                }

            }

            break;

static BlockDriverState *get_bs_snapshots(void)

{

    BlockDriverState *bs;

    if (bs_snapshots)

        return bs_snapshots;

        if (bdrv_can_snapshot(bs))

            goto ok;

    }

void do_savevm(Monitor *mon, const char *name)

{

    BlockDriverState *bs, *bs1;

    QEMUSnapshotInfo sn1, *sn = &sn1, old_sn1, *old_sn = &old_sn1;

    QEMUFile *f;

    int saved_vm_running;

    uint32_t vm_state_size;

    /* create the snapshots */

        if (bdrv_has_snapshot(bs1)) {

            if (must_delete) {

                ret = bdrv_snapshot_delete(bs1, old_sn->id_str);

void do_loadvm(Monitor *mon, const char *name)

{

    BlockDriverState *bs, *bs1;

    QEMUSnapshotInfo sn;

    QEMUFile *f;

    int saved_vm_running;

    bs = get_bs_snapshots();

    saved_vm_running = vm_running;

    vm_stop(0);

        if (bdrv_has_snapshot(bs1)) {

            ret = bdrv_snapshot_goto(bs1, name);

            if (ret < 0) {

void do_delvm(Monitor *mon, const char *name)

{

    BlockDriverState *bs, *bs1;

    bs = get_bs_snapshots();

    if (!bs) {

        return;

    }

        if (bdrv_has_snapshot(bs1)) {

            ret = bdrv_snapshot_delete(bs1, name);

            if (ret < 0) {

void do_info_snapshots(Monitor *mon)

{

    BlockDriverState *bs, *bs1;

    QEMUSnapshotInfo *sn_tab, *sn;

    int nb_sns, i;

        return;

    }

    monitor_printf(mon, "Snapshot devices:");

        if (bdrv_has_snapshot(bs1)) {

            if (bs == bs1)

                monitor_printf(mon, " %s", bdrv_get_device_name(bs1));

/* Misc. things related to the system emulator.  */

#include "qemu-common.h"

#ifdef _WIN32

#include <windows.h>

    BlockInterfaceType type;

    int bus;

    int unit;

    int drive_opt_idx;

    BlockInterfaceErrorAction onerror;

    char serial[BLOCK_SERIAL_STRLEN + 1];

} DriveInfo;

#define MAX_IDE_DEVS	2

#define MAX_SCSI_DEVS	7

#define MAX_DRIVES 32

extern int drive_get_max_bus(BlockInterfaceType type);

extern void drive_uninit(BlockDriverState *bdrv);

extern void drive_remove(int index);

extern int nb_drives_opt;

extern int drive_add(const char *file, const char *fmt, ...);

/* acpi */

typedef void (*qemu_system_device_hot_add_t)(int pcibus, int slot, int state);

typedef int (dev_match_fn)(void *dev_private, void *arg);

void destroy_nic(dev_match_fn *match_fn, void *arg);

void destroy_bdrvs(dev_match_fn *match_fn, void *arg);

const char *bios_name = NULL;

/* Note: drives_table[MAX_DRIVES] is a dummy block driver if none available

   to store the VM snapshots */

enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;

static DisplayState *display_state;

DisplayType display_type = DT_DEFAULT;

    return -1;

}