target-alpha: Honor icount for RPCC instruction.
Signed-off-by: Richard Henderson <rth@twiddle.net>
target-alpha: Add custom PALcode image for CLIPPER emulation.
Merge branch 'ppc-next' of git://repo.or.cz/qemu/agraf
ARM: fix segfault
Fix a bug in bccd9ec5f098668576342c83d90d6d6833d61d33,target-arm/op_helper.c missed a change unlike all other targets.This lead to a NULL pointer dereferences.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
PPC: booke timers
While working on the emulation of the freescale p2010 (e500v2) I realized thatthere's no implementation of booke's timers features. Currently mpc8544 usesppc_emb (ppc_emb_timers_init) which is close but not exactly like booke (forexample booke uses different SPR)....
PPC: Clean up BookE timer code
The BookE timer code had some written-but-not-read variables. Get ridof them.
Signed-off-by: Alexander Graf <agraf@suse.de>
pseries: Refactor spapr irq allocation
Paulo Bonzini changed the original spapr code, which manually assigned irqnumbers for each virtual device, to allocate them automatically from thedevice initialization. That allowed spapr virtual devices to be constructed...
pseries: Implement set-time-of-day RTAS function
Currently there is no implementation for set-time-of-day rtas function,which causes the following warning "setting the clock failed (-1)" onthe guest.
This patch just creates this function, get the timedate diff and store in...
ppc64: Fix linker script
Since commit 8733f609 (Fix linker scripts) linking on Linux/ppc64 fails:
LINK ppc64-linux-user/qemu-ppc64/usr/lib64/gcc/powerpc64-suse-linux/4.3/../../../../powerpc64-suse-linux/bin/ld:/home/afaerber/qemu/ppc64.ld:84: syntax error...
KVM: PPC: Use HIOR setting for -M pseries with PR KVM
When running with PR KVM, we need to set HIOR directly. Thankfully thereis now a new interface to set registers individually so we can just use thatand poke HIOR into the guest vcpu's HIOR register....
openpic: Unfold write_IRQreg
The helper function write_IRQreg was always called with a specific argument onthe type of register to access. Inside the function we were simply doing aswitch on that constant argument again. It's a lot easier to just unfold this...
ppc: move ADB stuff from ppc_mac.h to adb.h
Allow to use ADB in non-ppc macintosh
Signed-off-by: Laurent Vivier <laurent@vivier.eu>Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: Fix via-cuda memory registration
Commit 23c5e4ca (convert to memory API) broke the VIA Cuda emulation layerby not registering the IO structs.
This patch registers them properly and thus makes -M g3beige and -M mac99work again.
Tested-by: Andreas Färber <andreas.faerber@web.de>...
PPC: Fix heathrow PIC to use little endian MMIO
During the memory API conversion, the indication on little endianness ofMMIO for the heathrow PIC got dropped. This patch adds it back again.
KVM: Update kernel headers
Removes ABI-breaking HIOR parts - KVM patch to follow.
Update HIOR and generic register get/set.
ppc405: use RAM_ADDR_FMT instead of %08lx
The RAM_ADDR_FMT macro hides the type of ram_addr_t so that formatstrings can be safely used. Make sure to use RAM_ADDR_FMT so that thebuild works on 32-bit hosts with Xen enabled. Whether Xen should affectppc TCG targets is questionable but a separate issue....
openpic: Unfold read_IRQreg
The helper function read_IRQreg was always called with a specific argument onthe type of register to access. Inside the function we were simply doing aswitch on that constant argument again. It's a lot easier to just unfold this...
vscsi: send the CHECK_CONDITION status down together with autosense data
I introduced this bug in commit 05751d3 (vscsi: always use get_sense,2011-08-03) because at the time there was no way to expose a sensecondition to SLOF and Linux manages to work around the bug. However,...
Gdbstub: handle read of fpscr
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Alexander Graf <agraf@suse.de>
pseries: Add real mode debugging hcalls
PAPR systems support several hypercalls intended for use in real modedebugging tools. These implement reads and writes to arbitrary guestphysical addresses. This is useful for real mode software because itallows access to IO addresses and memory outside the RMA without going...
pseries: use macro for firmware filename
For some time we've had a nicely defined macro with the filename for ourfirmware image. However we didn't actually use it in the place we'resupposed to. This patch fixes it.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>...
Another round of KVM features, another round of kernel header updates :)
kvm: ppc: booke206: use MMU API
Share the TLB array with KVM. This allows us to set the initial TLBboth on initial boot and reset, is useful for debugging, and couldeventually be used to support migration.
Signed-off-by: Scott Wood <scottwood@freescale.com>...
ppc: booke206: add "info tlb" support
Signed-off-by: Scott Wood <scottwood@freescale.com>Signed-off-by: Alexander Graf <agraf@suse.de>
ppc: booke206: use MAV=2.0 TSIZE definition, fix 4G pages
This definition is backward compatible with MAV=1.0 as long asthe guest does not set reserved bits in MAS1/MAS4.
Also, fix the shift in booke206_tlb_to_page_size -- it's the basethat should be able to hold a 4G page size, not the shift count....
Implement POWER7's CFAR in TCG
This patch implements support for the CFAR SPR on POWER7 (Come FromAddress Register), which snapshots the PC value at the time of a branch oran rfid. The latest powerpc-next kernel also catches it and can show it inxmon or in the signal frames....
pseries: Implement hcall-bulk hypervisor interface
This patch adds support for the H_REMOVE_BULK hypercall on the pseriesmachine. Strictly speaking this isn't necessarym since the kernel willonly attempt to use this if hcall-bulk is advertised in the device tree,...
pseries: interrupt controller should not have a 'reg' property
The interrupt controller presented in the device tree for the pseriesmachine is manipulated by the guest only through hypervisor calls. Ithas no real or emulated registers for the guest to access....
pseries: More complete WIMG validation in H_ENTER code
Currently our implementation of the H_ENTER hypercall, which inserts amapping in the hash page table assumes that only ordinary memory is evermapped, and only permits mapping attribute bits accordingly (WIMG==0010)....
PPC: Fix sync instructions problem in SMP
In the current emulation of the load-and-reserve (lwarx) andstore-conditional (stwcx.) instructions, the internal reservationmechanism is taken into account, however each CPU has its ownreservation information and this information is not synchronized between...
MPC8544DS: Remove CPU nodes
We want to generate the CPU nodes in machine init code, so remove them fromthe device tree definition that we precompile.
MPC8544DS: Generate CPU nodes on init
With this patch, we generate CPU nodes in the machine initialization, givingus the freedom to generate as many nodes as we want and as the machine supports,but only those.
This is a first step towards a much cleaner device tree generation...
PPC: E500: Bump CPU count to 15
Now that we have everything in place, make the machine descriptionaware of the fact that we can now handle 15 virtual CPUs!
v1 -> v2:
- Max cpus is 15 because of MPIC
PPC: Add new target config for pseries
We only support -M pseries when certain prerequisites are met, suchas a PPC64 guest and libfdt. To only gather these requirements ina single place, this patch introduces a new CONFIG_PSERIES variablethat gets set when all prerequisites are met....
KVM: update kernel headers
This patch updates the kvm kernel headers to the latest version.
PPC: Enable to use PAPR with PR style KVM
When running PR style KVM, we need to tell the kernel that we wantto run in PAPR mode now. This means that we need to pass some moreregister information down and enable papr mode. We also need to alignthe HTAB to htab_size boundary....
PPC: SPAPR: Use KVM function for time info
One of the things we can't fake on PPC is the timer speed. Sowe need to extract the frequency information from the host andput it back into the guest device tree.
Luckily, we already have functions for that from the non-pseries...
pseries: Bugfixes for interrupt numbering in XICS code
The implementation of the XICS interrupt controller contains several(difficult to trigger) bugs due to the fact that we were not 100%consistent with which irq numbering we used. In most places, global...
pseries: Add a phandle to the xicp interrupt controller device tree node
Future devices we will be adding to the pseries machine (e.g. PCI) willneed nodes in the device tree which explicitly reference the top-levelinterrupt controller via interrupt-parent or interrupt-map properties....
device tree: give dt more size
We currently load a device tree blob and then just take its size x2 toaccount for modifications we do inside. While this is nice and great,it fails when we have a small device tree as blob and lots of nodes addedin machine init code....
PPC: E500: Update cpu-release-addr property in cpu nodes
The guest OS wants to know where the guest spins, so let's tell him whileupdating the CPU nodes with the frequencies anyways.
- use new spin table address
device tree: add add_subnode command
We want to be able to create subnodes in our device tree, so export it throughthe qemu device tree abstraction framework.
device tree: dont fail operations
When we screw up and issue an FDT command that doesn't work, we really need toknow immediately and usually can't continue to create the machine. To make surewe don't need to add error checking in all device tree modification code users,...
PPC: E500: Add PV spinning code
CPUs that are not the boot CPU need to run in spinning code to check if theyshould run off to execute and if so where to jump to. This usually happensby leaving secondary CPUs looping and checking if some variable in memory...
PPC: KVM: Remove kvmppc_read_host_property
We just got rid of the last user of kvmppc_read_host_property, so wecan now safely remove it.
PPC: KVM: Add stubs for kvm helper functions
We have a bunch of helper functions that don't have any stubs for them in casewe don't have CONFIG_KVM enabled. That didn't bite us so far, because gcc canoptimize them out pretty well, but we should really provide them....
PPC: E500: Update freqs for all CPUs
Now that we can so nicely find out the host's frequencies, we should alsomake sure that we get them into all virtual CPUs' device tree nodes.
PPC: E500: Remove unneeded CPU nodes
We should only keep CPU nodes in the device tree around that we really havevirtual CPUs for. So remove all superfluous entries that we just keep therein case someone wants to create a lot of vCPUs.
device tree: add nop_node
We have a qemu internal abstraction layer on FDT. While I'm not fully convincedwe need it at all, it's missing the nop_node functionality that we now needon e500. So let's add it and think about the general future of that API later....
PPC: bamboo: Move host fdt copy to target
We have some code in generic kvm_ppc.c that is only used by 440. Move tothe 440 specific device code.
PPC: KVM: Add generic function to read host clockfreq
We need to find out the host's clock-frequency when running on KVM, solet's export a respective function.
- enable 64bit values
PPC: E500: Use generic kvm function for freq
Now that we have generic KVM functions to read out the host tb and clockfrequencies, let's use them in the e500 code!
PPC: E500: Remove mpc8544_copy_soc_cell
We don't need mpc8544_copy_soc_cell anymore, since we're explicitly readinghost values and writing guest values respectively.
PPC: bamboo: Use kvm api for freq and clock frequencies
Now that we have nice and shiny APIs to read out the host's clock and timebasefrequencies, let's use them in the bamboo code as well!
PPC: Add CPU local MMIO regions to MPIC
The MPIC exports a register set for each CPU connected to it. They can allbe accessed through specific registers or using a shadow page that is mappeddifferently depending on which CPU accesses it.
This patch implements the shadow map, making it possible for guests to access...
PPC: Extend MPIC MMIO range
The MPIC exports a page for each CPU that it controls. To support more thanone CPU, we need to also reserve the MMIO space according to the amount ofCPUs we want to support.
PPC: Fix IPI support in MPIC
The current IPI support in the MPIC code is incomplete and doesn't work. Thiscode adds proper support for IPIs in MPIC by using the IDE register to rememberwhich CPUs IPIs are still outstanding to. New triggers through the IPI trigger...
PPC: Set MPIC IDE for IPI to 0
We use the IDE register with IPIs as a mask to keep track which processorshave already acknowledged the respective interrupt. So we need to initializeit to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the...
PPC: MPIC: Remove read functionality for WO registers
The IPI dispatch registers are write only according to every MPICspec I have found. So instead of pretending you could read back somethingfrom them, better not handle them at all.
Reported-by: Elie Richa <richa@adacore.com>...
PPC: MPIC: Fix CI bit definitions
The bit definitions for critical interrupt routing are in PowerPC order(most significant bit is 0), while we end up shifting it with normal bitorder. Turn the numbers around so we actually end up fetching theright ones....
PPC: Bump MPIC up to 32 supported CPUs
The MPIC emulation is now capable of handling up to 32 CPUs. Reflect that inthe code exporting the numbers out and fix an integer overflow while at it.
v1 -> v2:...
PPC: E500: create multiple envs
When creating a VM, we should go through smp_cpus and create a virtual CPU forevery CPU the user requested. This patch adds support for that and moves somecode around to make that more convenient.
PPC: E500: Generate IRQ lines for many CPUs
Now that we can generate multiple envs for all our virtual CPUs, wealso need to tell the MPIC that we have multiple CPUs connected andconnect them all to the respective virtual interrupt lines.
spapr: proper qdevification
Right now the spapr devices cannot be instantiated with -device,because the IRQs need to be passed to the spapr_*_create functions.Do this instead in the bus's init wrapper.
This is particularly important with the conversion from scsi-disk...
spapr: prepare for qdevification of irq
Restructure common properties for sPAPR devices so that IRQ definitionscan be added in one place.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Cc: Alexander Graf <agraf@suse.de>Cc: David Gibson <david@gibson.dropbear.id.au>...
spapr: make irq customizable via qdev
This also lets the user see the irq in "info qtree".
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Cc: Alexander Graf <agraf@suse.de>Cc: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: Move openpic to target specific code compilation
The MPIC has some funny feature where it maps different registers to an MMIOregion depending which CPU accesses them.
To be able to reflect that, we need to make OpenPIC be compiled in the targetcode, so it can access cpu_single_env....
qed: fix use-after-free during l2 cache commit
QED's metadata caching strategy allows two parallel requests to race formetadata lookup. The first one to complete will populate the metadatacache and the second one will drop the data it just read in favor of the...
etrax-dma: Remove bogus if statement
Reported-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
memory: Print region priority
Useful to discover eclipses.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Avi Kivity <avi@redhat.com>
memory: Do not print empty PIO root
memory: Print regions in ascending order
Makes reading the output more user friendly.
memory: simple memory tree printer
Add a monitor command 'info mtree' to show the memory hierarchymuch like /proc/iomem in Linux.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Avi Kivity <avi@redhat.com>
Move GETPC from dyngen-exec.h to exec-all.h
GETPC can be used even from outside of helper code. Move the macro toa more accessible location. Avoid a compile warning from redefining it in exec.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Document softmmu templates
Add some comments to describe each file.
ESP: convert to trace framework
PPC: Drop initial ESCC mapping
We are mapping ESCC to a static (incorrect) address on machine init. Thisoverlaps with our vram, rendering the screen barely usable.
Since openBIOS is clever enough to map ESCC to where it needs to be, we canjust drop that invalid map and everyone's happy....
tcg-i386: Introduce limited deposit support
x86 cannot provide an optimized generic deposit implementation. But atleast for a few special cases, namely for writing bits 0..7, 8..15, and0..15, versions using only a single instruction are feasible.Introducing such limited support improves emulating 16-bit x86 code on...
mips_fulong2e: Reorder ISA bus and i8259 creation
Missed during memory region conversion: The i8259 now depends on the ISAbus being created first. Reorder the initialization.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-i386: Remove redundant word mask in port out instructions
T0 was already masked to 16 bits when loading it.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softfloat: Reinstate accidentally disabled target-specific NaN handling
Include config.h in softfloat.c, so that the target specific ifdefs insoftfloat-specialize.h are evaluated correctly. This was accidentallybroken in commit 789ec7ce2 when config-target.h was removed from...
tcg/arm: Remove unused tcg_out_addi()
Remove the unused function tcg_out_addi() from the ARM TCG backend;this fixes a compilation failure on ARM hosts with newer gcc.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>...
configure: Detect predefined compiler symbols for ARM and HPPA
To be able to detect some ARM / HPPA based architectures such as withOpenBSD/(armish / zaurus) or OpenBSD/hppa.
Signed-off-by: Brad Smith <brad@comstyle.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Add some assertions
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Add forward declarations for local functions
These functions are defined in the tcg target specific filetcg-target.c.
The forward declarations assert that every tcg target usesthe same function prototype.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h
It is now declared for all tcg targets in tcg.h,so the tcg target specific declarations are redundant.
tcg: Declare TCG_TARGET_REG_BITS in tcg.h
TCG_TARGET_REG_BITS can be determined by the compiler,so there is no need to declare it for each individual tcg target.
This is especially important for new tcg targetswhich will be supported by the tcg interpreter....
Merge remote-tracking branch 'kiszka/queues/slirp' into staging
Merge remote-tracking branch 'aneesh/for-upstream-5' into staging
Add OpenBIOS as a submodule
Update OpenBIOS images to r1047 built from submodule.
slirp: Fix packet expiration
The two new variables "arp_requested" and "expiration_date" in the mbufstructure have been added after the variable-sized "m_dat_" array. Thevariables have to be added before the m_dat_ array instead.Without this patch, the expiration_date gets clobbered by code that...
slirp: Fix use after release on tcp_input
ti points into the m buffer. But the latter may already be releasedright after the dodata: label. Move the test before the potentialrelease.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
PPC: use memory API to construct the PCI hole
Avoid vga.chain4 mapping by constructing a PCI hole for upper2G of the PCI space.
Merge remote-tracking branch 'qemu-kvm-tmp/memory/urgent' into staging
Merge remote-tracking branch 'qemu-kvm-tmp/memory/batch' into staging
Merge remote-tracking branch 'qemu-kvm-tmp/memory/core' into staging
Merge remote-tracking branch 'pmaydell/omap-for-upstream' into staging
Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging