Revision 77f193da hw/eccmemctl.c

b/hw/eccmemctl.c
53 53 

  		





  54
  54
  
    
/* ECC fault control register */


  		





  55
  55
  
    
#define ECC_MER_EE     0x00000001      /* Enable ECC checking */


  		





  56
  
  
    
#define ECC_MER_EI     0x00000002      /* Enable Interrupts on correctable errors */


  		





  
  56
  
    
#define ECC_MER_EI     0x00000002      /* Enable Interrupts on


  		





  
  57
  
    
                                          correctable errors */


  		





  57
  58
  
    
#define ECC_MER_MRR0   0x00000004      /* SIMM 0 */


  		





  58
  59
  
    
#define ECC_MER_MRR1   0x00000008      /* SIMM 1 */


  		





  59
  60
  
    
#define ECC_MER_MRR2   0x00000010      /* SIMM 2 */


  		





  ......




  65
  66
  
    
#define ECC_MER_REU    0x00000200      /* Memory Refresh Enable (600MP) */


  		





  66
  67
  
    
#define ECC_MER_MRR    0x000003fc      /* MRR mask */


  		





  67
  68
  
    
#define ECC_MEM_A      0x00000400      /* Memory controller addr map select */


  		





  68
  
  
    
#define ECC_MER_DCI    0x00000800      /* Dsiables Coherent Invalidate ACK */


  		





  
  69
  
    
#define ECC_MER_DCI    0x00000800      /* Disables Coherent Invalidate ACK */


  		





  69
  70
  
    
#define ECC_MER_VER    0x0f000000      /* Version */


  		





  70
  71
  
    
#define ECC_MER_IMPL   0xf0000000      /* Implementation */


  		





  71
  72
  
    

  		












Also available in:
  Unified diff