Revision 77f193da hw/sun4u.c
b/hw/sun4u.c | ||
---|---|---|
72 | 72 |
|
73 | 73 |
static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, |
74 | 74 |
const unsigned char *arch, |
75 |
ram_addr_t RAM_size, const char *boot_devices, |
|
75 |
ram_addr_t RAM_size, |
|
76 |
const char *boot_devices, |
|
76 | 77 |
uint32_t kernel_image, uint32_t kernel_size, |
77 | 78 |
const char *cmdline, |
78 | 79 |
uint32_t initrd_image, uint32_t initrd_size, |
... | ... | |
268 | 269 |
|
269 | 270 |
prom_offset = RAM_size + vga_ram_size; |
270 | 271 |
cpu_register_physical_memory(PROM_ADDR, |
271 |
(PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK, |
|
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(PROM_SIZE_MAX + TARGET_PAGE_SIZE) & |
|
273 |
TARGET_PAGE_MASK, |
|
272 | 274 |
prom_offset | IO_MEM_ROM); |
273 | 275 |
|
274 | 276 |
if (bios_name == NULL) |
... | ... | |
287 | 289 |
/* XXX: put correct offset */ |
288 | 290 |
kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL); |
289 | 291 |
if (kernel_size < 0) |
290 |
kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); |
|
292 |
kernel_size = load_aout(kernel_filename, |
|
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phys_ram_base + KERNEL_LOAD_ADDR); |
|
291 | 294 |
if (kernel_size < 0) |
292 |
kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); |
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295 |
kernel_size = load_image(kernel_filename, |
|
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phys_ram_base + KERNEL_LOAD_ADDR); |
|
293 | 297 |
if (kernel_size < 0) { |
294 | 298 |
fprintf(stderr, "qemu: could not load kernel '%s'\n", |
295 | 299 |
kernel_filename); |
... | ... | |
298 | 302 |
|
299 | 303 |
/* load initrd */ |
300 | 304 |
if (initrd_filename) { |
301 |
initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
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305 |
initrd_size = load_image(initrd_filename, |
|
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phys_ram_base + INITRD_LOAD_ADDR); |
|
302 | 307 |
if (initrd_size < 0) { |
303 | 308 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", |
304 | 309 |
initrd_filename); |
... | ... | |
309 | 314 |
for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { |
310 | 315 |
if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) |
311 | 316 |
== 0x48647253) { // HdrS |
312 |
stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); |
|
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stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); |
|
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stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, |
|
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INITRD_LOAD_ADDR); |
|
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stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, |
|
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initrd_size); |
|
314 | 321 |
break; |
315 | 322 |
} |
316 | 323 |
} |
... | ... | |
318 | 325 |
} |
319 | 326 |
pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL); |
320 | 327 |
isa_mem_base = VGA_BASE; |
321 |
pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, vga_ram_size); |
|
328 |
pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, |
|
329 |
vga_ram_size); |
|
322 | 330 |
|
323 | 331 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
324 | 332 |
if (serial_hds[i]) { |
... | ... | |
329 | 337 |
|
330 | 338 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
331 | 339 |
if (parallel_hds[i]) { |
332 |
parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/, parallel_hds[i]); |
|
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parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/, |
|
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parallel_hds[i]); |
|
333 | 342 |
} |
334 | 343 |
} |
335 | 344 |
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