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root / target-cris @ 786c02f1

Name Size
cpu.h 5.8 kB
crisv32-decode.h 5.5 kB
exec.h 1.9 kB
helper.c 4.2 kB
helper.h 80 Bytes
mmu.c 6.3 kB
mmu.h 389 Bytes
op.c 21.3 kB
op_helper.c 2.7 kB
op_mem.c 1.6 kB
op_template.h 1.2 kB
opcode-cris.h 10.1 kB
translate.c 55.9 kB

Latest revisions

# Date Author Comment
786c02f1 03/14/2008 03:08 am edgar_igl

Model more parts of the ETRAX mmu (still alot missing).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4056 c046a42c-6fe2-441c-8c8c-71466251a162

e62b5b13 03/14/2008 03:04 am edgar_igl
  • Add a model of the ETRAX interrupt controller.
  • Clean up the interrupt handling a bit.
  • Connect some NOR flash to the test board.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162

bbaf29c7 03/01/2008 07:25 pm edgar_igl
  • target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.
  • target-cris/helper.c: Update ERP for user-mode simulation aswell.
  • hw/etraxfs_timer.c: Support multiple timers.
  • hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout....
4f400ab5 02/28/2008 11:37 am edgar_igl

Cut the translation block after translating a break insn. This avoids an issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162

9004627f 02/28/2008 10:28 am edgar_igl

More consistent naming for CRIS register-number macros.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162

5d4a534d 02/25/2008 11:58 am edgar_igl

Silently ignore CRIS cache flushes, instead of aborting due to unknown insn.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162

57fec1fe 02/01/2008 12:50 pm bellard

use the TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162

fd56059f 01/14/2008 05:18 am balrog

Optimize clear insns by treating support reg P0 specially and
add missing micro-op RETURN's (Edgar E. Iglesias).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162

44f8625d 11/11/2007 02:35 pm bellard

fixed invalid type

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162

aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162

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