Revision 78895427

b/hw/mips_malta.c
977 977
    } else if (vmsvga_enabled) {
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        pci_vmsvga_init(pci_bus);
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    } else if (std_vga_enabled) {
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        pci_vga_init(pci_bus, 0, 0);
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        pci_vga_init(pci_bus);
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    }
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}
983 983

  
b/hw/pc.c
993 993
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
994 994
    } else if (std_vga_enabled) {
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        if (pci_bus) {
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            pci_vga_init(pci_bus, 0, 0);
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            pci_vga_init(pci_bus);
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        } else {
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            isa_vga_init();
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        }
b/hw/pc.h
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extern enum vga_retrace_method vga_retrace_method;
155 155

  
156 156
int isa_vga_init(void);
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int pci_vga_init(PCIBus *bus,
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                 unsigned long vga_bios_offset, int vga_bios_size);
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int pci_vga_init(PCIBus *bus);
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int isa_vga_mm_init(target_phys_addr_t vram_base,
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                    target_phys_addr_t ctrl_base, int it_shift);
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b/hw/ppc_newworld.c
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        machine_arch = ARCH_MAC99;
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    }
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    /* init basic PC hardware */
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    pci_vga_init(pci_bus, 0, 0);
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    pci_vga_init(pci_bus);
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321 321
    escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
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                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
b/hw/ppc_oldworld.c
227 227
    }
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    pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
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    pci_bus = pci_grackle_init(0xfec00000, pic);
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    pci_vga_init(pci_bus, 0, 0);
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    pci_vga_init(pci_bus);
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    escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0],
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                               serial_hds[1], ESCC_CLOCK, 4);
b/hw/ppc_prep.c
694 694
    cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
695 695

  
696 696
    /* init basic PC hardware */
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    pci_vga_init(pci_bus, 0, 0);
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    pci_vga_init(pci_bus);
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    //    openpic = openpic_init(0x00000000, 0xF0000000, 1);
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    //    pit = pit_init(0x40, i8259[0]);
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    rtc_init(2000, NULL);
b/hw/sun4u.c
767 767
    pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, irq, &pci_bus2,
768 768
                           &pci_bus3);
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    isa_mem_base = APB_PCI_IO_BASE;
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    pci_vga_init(pci_bus, 0, 0);
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    pci_vga_init(pci_bus);
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772 772
    // XXX Should be pci_bus3
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    pci_ebus_init(pci_bus, -1);
b/hw/vga-pci.c
52 52
{
53 53
    PCIVGAState *d = (PCIVGAState *)pci_dev;
54 54
    VGACommonState *s = &d->vga;
55
    if (region_num == PCI_ROM_SLOT) {
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        cpu_register_physical_memory(addr, s->bios_size, s->bios_offset);
57
    } else {
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        cpu_register_physical_memory(addr, s->vram_size, s->vram_offset);
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        s->map_addr = addr;
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        s->map_end = addr + s->vram_size;
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        vga_dirty_log_start(s);
62
    }
55

  
56
    cpu_register_physical_memory(addr, s->vram_size, s->vram_offset);
57
    s->map_addr = addr;
58
    s->map_end = addr + s->vram_size;
59
    vga_dirty_log_start(s);
63 60
}
64 61

  
65 62
static void pci_vga_write_config(PCIDevice *d,
......
95 92
     pci_register_bar(&d->dev, 0, VGA_RAM_SIZE,
96 93
                      PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map);
97 94

  
98
     if (s->bios_size) {
99
        unsigned int bios_total_size;
100
        /* must be a power of two */
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        bios_total_size = 1;
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        while (bios_total_size < s->bios_size)
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            bios_total_size <<= 1;
104
        pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size,
105
                         PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map);
106
     } else {
107
         if (dev->romfile == NULL)
108
             dev->romfile = qemu_strdup("vgabios-stdvga.bin");
109
     }
110 95
     return 0;
111 96
}
112 97

  
113
int pci_vga_init(PCIBus *bus,
114
                 unsigned long vga_bios_offset, int vga_bios_size)
98
int pci_vga_init(PCIBus *bus)
115 99
{
116
    PCIDevice *dev;
117

  
118
    dev = pci_create(bus, -1, "VGA");
119
    qdev_prop_set_uint32(&dev->qdev, "bios-offset", vga_bios_offset);
120
    qdev_prop_set_uint32(&dev->qdev, "bios-size", vga_bios_size);
121
    qdev_init_nofail(&dev->qdev);
122

  
100
    pci_create_simple(bus, -1, "VGA");
123 101
    return 0;
124 102
}
125 103

  
......
129 107
    .qdev.vmsd    = &vmstate_vga_pci,
130 108
    .init         = pci_vga_initfn,
131 109
    .config_write = pci_vga_write_config,
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    .qdev.props   = (Property[]) {
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        DEFINE_PROP_HEX32("bios-offset", PCIVGAState, vga.bios_offset, 0),
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        DEFINE_PROP_HEX32("bios-size",   PCIVGAState, vga.bios_size,   0),
135
        DEFINE_PROP_END_OF_LIST(),
136
    }
110
    .romfile      = "vgabios-stdvga.bin",
137 111
};
138 112

  
139 113
static void vga_register(void)
b/hw/vga.c
1934 1934
    s->map_addr = 0;
1935 1935
    s->map_end = 0;
1936 1936
    s->lfb_vram_mapped = 0;
1937
    s->bios_offset = 0;
1938
    s->bios_size = 0;
1939 1937
    s->sr_index = 0;
1940 1938
    memset(s->sr, '\0', sizeof(s->sr));
1941 1939
    s->gr_index = 0;
b/hw/vga_int.h
112 112
    uint32_t map_addr;
113 113
    uint32_t map_end;
114 114
    uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
115
    uint32_t bios_offset;
116
    uint32_t bios_size;
117 115
    uint32_t latch;
118 116
    uint8_t sr_index;
119 117
    uint8_t sr[256];

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