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/*
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* QEMU PC keyboard emulation
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h" |
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#include "isa.h" |
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#include "pc.h" |
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#include "ps2.h" |
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#include "sysemu.h" |
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/* debug PC keyboard */
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//#define DEBUG_KBD
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#ifdef DEBUG_KBD
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#define DPRINTF(fmt, ...) \
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do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0) |
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#else
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#define DPRINTF(fmt, ...)
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#endif
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/* Keyboard Controller Commands */
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#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */ |
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#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */ |
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#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */ |
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#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */ |
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#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */ |
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#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */ |
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#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */ |
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#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */ |
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#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */ |
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#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */ |
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#define KBD_CCMD_READ_INPORT 0xC0 /* read input port */ |
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#define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */ |
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#define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ |
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#define KBD_CCMD_WRITE_OBUF 0xD2 |
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#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if |
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initiated by the auxiliary device */
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#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ |
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#define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ |
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#define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ |
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#define KBD_CCMD_PULSE_BITS_3_0 0xF0 /* Pulse bits 3-0 of the output port P2. */ |
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#define KBD_CCMD_RESET 0xFE /* Pulse bit 0 of the output port P2 = CPU reset. */ |
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#define KBD_CCMD_NO_OP 0xFF /* Pulse no bits of the output port P2. */ |
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|
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/* Keyboard Commands */
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#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */ |
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#define KBD_CMD_ECHO 0xEE |
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#define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */ |
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#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */ |
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#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */ |
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#define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */ |
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#define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */ |
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#define KBD_CMD_RESET 0xFF /* Reset */ |
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|
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/* Keyboard Replies */
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#define KBD_REPLY_POR 0xAA /* Power on reset */ |
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#define KBD_REPLY_ACK 0xFA /* Command ACK */ |
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#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */ |
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/* Status Register Bits */
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#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */ |
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#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */ |
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#define KBD_STAT_SELFTEST 0x04 /* Self test successful */ |
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#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */ |
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#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */ |
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#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
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#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */ |
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#define KBD_STAT_PERR 0x80 /* Parity error */ |
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/* Controller Mode Register Bits */
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#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */ |
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#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */ |
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#define KBD_MODE_SYS 0x04 /* The system flag (?) */ |
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#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */ |
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#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */ |
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#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */ |
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#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */ |
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#define KBD_MODE_RFU 0x80 |
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/* Output Port Bits */
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#define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */ |
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#define KBD_OUT_A20 0x02 /* x86 only */ |
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#define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */ |
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#define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
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/* Mouse Commands */
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#define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */ |
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#define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */ |
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#define AUX_SET_RES 0xE8 /* Set resolution */ |
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#define AUX_GET_SCALE 0xE9 /* Get scaling factor */ |
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#define AUX_SET_STREAM 0xEA /* Set stream mode */ |
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#define AUX_POLL 0xEB /* Poll */ |
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#define AUX_RESET_WRAP 0xEC /* Reset wrap mode */ |
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#define AUX_SET_WRAP 0xEE /* Set wrap mode */ |
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#define AUX_SET_REMOTE 0xF0 /* Set remote mode */ |
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#define AUX_GET_TYPE 0xF2 /* Get type */ |
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#define AUX_SET_SAMPLE 0xF3 /* Set sample rate */ |
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#define AUX_ENABLE_DEV 0xF4 /* Enable aux device */ |
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#define AUX_DISABLE_DEV 0xF5 /* Disable aux device */ |
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#define AUX_SET_DEFAULT 0xF6 |
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#define AUX_RESET 0xFF /* Reset aux device */ |
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#define AUX_ACK 0xFA /* Command byte ACK. */ |
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#define MOUSE_STATUS_REMOTE 0x40 |
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#define MOUSE_STATUS_ENABLED 0x20 |
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#define MOUSE_STATUS_SCALE21 0x10 |
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#define KBD_PENDING_KBD 1 |
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#define KBD_PENDING_AUX 2 |
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typedef struct KBDState { |
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uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
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uint8_t status; |
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uint8_t mode; |
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uint8_t outport; |
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/* Bitmask of devices with data available. */
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uint8_t pending; |
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void *kbd;
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void *mouse;
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qemu_irq irq_kbd; |
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qemu_irq irq_mouse; |
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qemu_irq *a20_out; |
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target_phys_addr_t mask; |
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} KBDState; |
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/* update irq and KBD_STAT_[MOUSE_]OBF */
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/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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incorrect, but it avoids having to simulate exact delays */
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static void kbd_update_irq(KBDState *s) |
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{ |
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int irq_kbd_level, irq_mouse_level;
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irq_kbd_level = 0;
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irq_mouse_level = 0;
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s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF); |
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s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF); |
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if (s->pending) {
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s->status |= KBD_STAT_OBF; |
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s->outport |= KBD_OUT_OBF; |
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/* kbd data takes priority over aux data. */
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if (s->pending == KBD_PENDING_AUX) {
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s->status |= KBD_STAT_MOUSE_OBF; |
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s->outport |= KBD_OUT_MOUSE_OBF; |
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if (s->mode & KBD_MODE_MOUSE_INT)
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irq_mouse_level = 1;
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} else {
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if ((s->mode & KBD_MODE_KBD_INT) &&
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!(s->mode & KBD_MODE_DISABLE_KBD)) |
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irq_kbd_level = 1;
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} |
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} |
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qemu_set_irq(s->irq_kbd, irq_kbd_level); |
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qemu_set_irq(s->irq_mouse, irq_mouse_level); |
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} |
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static void kbd_update_kbd_irq(void *opaque, int level) |
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{ |
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KBDState *s = (KBDState *)opaque; |
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if (level)
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s->pending |= KBD_PENDING_KBD; |
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else
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s->pending &= ~KBD_PENDING_KBD; |
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kbd_update_irq(s); |
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} |
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static void kbd_update_aux_irq(void *opaque, int level) |
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{ |
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KBDState *s = (KBDState *)opaque; |
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if (level)
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s->pending |= KBD_PENDING_AUX; |
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else
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s->pending &= ~KBD_PENDING_AUX; |
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kbd_update_irq(s); |
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} |
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static uint32_t kbd_read_status(void *opaque, uint32_t addr) |
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{ |
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KBDState *s = opaque; |
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int val;
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val = s->status; |
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DPRINTF("kbd: read status=0x%02x\n", val);
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return val;
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} |
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static void kbd_queue(KBDState *s, int b, int aux) |
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{ |
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if (aux)
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ps2_queue(s->mouse, b); |
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else
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ps2_queue(s->kbd, b); |
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} |
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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KBDState *s = opaque; |
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DPRINTF("kbd: write outport=0x%02x\n", val);
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s->outport = val; |
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if (s->a20_out) {
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qemu_set_irq(*s->a20_out, (val >> 1) & 1); |
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} |
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if (!(val & 1)) { |
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qemu_system_reset_request(); |
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} |
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} |
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static uint32_t ioport92_read(void *opaque, uint32_t addr) |
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{ |
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KBDState *s = opaque; |
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uint32_t ret; |
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ret = s->outport; |
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DPRINTF("kbd: read outport=0x%02x\n", ret);
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return ret;
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} |
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static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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KBDState *s = opaque; |
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DPRINTF("kbd: write cmd=0x%02x\n", val);
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/* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
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* low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
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* command specify the output port bits to be pulsed.
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* 0: Bit should be pulsed. 1: Bit should not be modified.
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* The only useful version of this command is pulsing bit 0,
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* which does a CPU reset.
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*/
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if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
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if(!(val & 1)) |
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val = KBD_CCMD_RESET; |
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else
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val = KBD_CCMD_NO_OP; |
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} |
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switch(val) {
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case KBD_CCMD_READ_MODE:
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kbd_queue(s, s->mode, 0);
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break;
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case KBD_CCMD_WRITE_MODE:
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case KBD_CCMD_WRITE_OBUF:
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case KBD_CCMD_WRITE_AUX_OBUF:
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case KBD_CCMD_WRITE_MOUSE:
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case KBD_CCMD_WRITE_OUTPORT:
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s->write_cmd = val; |
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break;
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case KBD_CCMD_MOUSE_DISABLE:
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s->mode |= KBD_MODE_DISABLE_MOUSE; |
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break;
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case KBD_CCMD_MOUSE_ENABLE:
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s->mode &= ~KBD_MODE_DISABLE_MOUSE; |
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break;
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case KBD_CCMD_TEST_MOUSE:
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kbd_queue(s, 0x00, 0); |
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break;
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case KBD_CCMD_SELF_TEST:
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s->status |= KBD_STAT_SELFTEST; |
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kbd_queue(s, 0x55, 0); |
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break;
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case KBD_CCMD_KBD_TEST:
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kbd_queue(s, 0x00, 0); |
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break;
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case KBD_CCMD_KBD_DISABLE:
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s->mode |= KBD_MODE_DISABLE_KBD; |
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kbd_update_irq(s); |
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break;
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case KBD_CCMD_KBD_ENABLE:
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s->mode &= ~KBD_MODE_DISABLE_KBD; |
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kbd_update_irq(s); |
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break;
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case KBD_CCMD_READ_INPORT:
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kbd_queue(s, 0x00, 0); |
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break;
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case KBD_CCMD_READ_OUTPORT:
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kbd_queue(s, s->outport, 0);
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break;
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case KBD_CCMD_ENABLE_A20:
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if (s->a20_out) {
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qemu_irq_raise(*s->a20_out); |
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} |
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s->outport |= KBD_OUT_A20; |
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break;
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case KBD_CCMD_DISABLE_A20:
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if (s->a20_out) {
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qemu_irq_lower(*s->a20_out); |
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} |
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s->outport &= ~KBD_OUT_A20; |
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break;
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case KBD_CCMD_RESET:
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qemu_system_reset_request(); |
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break;
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case KBD_CCMD_NO_OP:
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/* ignore that */
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break;
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default:
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fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
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break;
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} |
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} |
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|
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static uint32_t kbd_read_data(void *opaque, uint32_t addr) |
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{ |
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KBDState *s = opaque; |
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uint32_t val; |
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if (s->pending == KBD_PENDING_AUX)
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val = ps2_read_data(s->mouse); |
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else
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val = ps2_read_data(s->kbd); |
332 |
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DPRINTF("kbd: read data=0x%02x\n", val);
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return val;
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} |
336 |
|
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static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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KBDState *s = opaque; |
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|
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DPRINTF("kbd: write data=0x%02x\n", val);
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|
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switch(s->write_cmd) {
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case 0: |
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ps2_write_keyboard(s->kbd, val); |
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break;
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case KBD_CCMD_WRITE_MODE:
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s->mode = val; |
349 |
ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
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/* ??? */
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kbd_update_irq(s); |
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break;
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case KBD_CCMD_WRITE_OBUF:
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kbd_queue(s, val, 0);
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break;
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case KBD_CCMD_WRITE_AUX_OBUF:
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kbd_queue(s, val, 1);
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break;
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case KBD_CCMD_WRITE_OUTPORT:
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ioport92_write(s, 0, val);
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break;
|
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case KBD_CCMD_WRITE_MOUSE:
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ps2_write_mouse(s->mouse, val); |
364 |
break;
|
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default:
|
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break;
|
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} |
368 |
s->write_cmd = 0;
|
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} |
370 |
|
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static void kbd_reset(void *opaque) |
372 |
{ |
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KBDState *s = opaque; |
374 |
|
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s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT; |
376 |
s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED; |
377 |
s->outport = KBD_OUT_RESET | KBD_OUT_A20; |
378 |
} |
379 |
|
380 |
static const VMStateDescription vmstate_kbd = { |
381 |
.name = "pckbd",
|
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.version_id = 3,
|
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.minimum_version_id = 3,
|
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.minimum_version_id_old = 3,
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.fields = (VMStateField []) { |
386 |
VMSTATE_UINT8(write_cmd, KBDState), |
387 |
VMSTATE_UINT8(status, KBDState), |
388 |
VMSTATE_UINT8(mode, KBDState), |
389 |
VMSTATE_UINT8(pending, KBDState), |
390 |
VMSTATE_END_OF_LIST() |
391 |
} |
392 |
}; |
393 |
|
394 |
/* Memory mapped interface */
|
395 |
static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr) |
396 |
{ |
397 |
KBDState *s = opaque; |
398 |
|
399 |
if (addr & s->mask)
|
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return kbd_read_status(s, 0) & 0xff; |
401 |
else
|
402 |
return kbd_read_data(s, 0) & 0xff; |
403 |
} |
404 |
|
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static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
406 |
{ |
407 |
KBDState *s = opaque; |
408 |
|
409 |
if (addr & s->mask)
|
410 |
kbd_write_command(s, 0, value & 0xff); |
411 |
else
|
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kbd_write_data(s, 0, value & 0xff); |
413 |
} |
414 |
|
415 |
static CPUReadMemoryFunc * const kbd_mm_read[] = { |
416 |
&kbd_mm_readb, |
417 |
&kbd_mm_readb, |
418 |
&kbd_mm_readb, |
419 |
}; |
420 |
|
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static CPUWriteMemoryFunc * const kbd_mm_write[] = { |
422 |
&kbd_mm_writeb, |
423 |
&kbd_mm_writeb, |
424 |
&kbd_mm_writeb, |
425 |
}; |
426 |
|
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
|
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target_phys_addr_t base, ram_addr_t size, |
429 |
target_phys_addr_t mask) |
430 |
{ |
431 |
KBDState *s = qemu_mallocz(sizeof(KBDState));
|
432 |
int s_io_memory;
|
433 |
|
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s->irq_kbd = kbd_irq; |
435 |
s->irq_mouse = mouse_irq; |
436 |
s->mask = mask; |
437 |
|
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vmstate_register(NULL, 0, &vmstate_kbd, s); |
439 |
s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s); |
440 |
cpu_register_physical_memory(base, size, s_io_memory); |
441 |
|
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s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
443 |
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
444 |
qemu_register_reset(kbd_reset, s); |
445 |
} |
446 |
|
447 |
typedef struct ISAKBDState { |
448 |
ISADevice dev; |
449 |
KBDState kbd; |
450 |
} ISAKBDState; |
451 |
|
452 |
void i8042_isa_mouse_fake_event(void *opaque) |
453 |
{ |
454 |
ISADevice *dev = opaque; |
455 |
KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
456 |
|
457 |
ps2_mouse_fake_event(s->mouse); |
458 |
} |
459 |
|
460 |
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
|
461 |
{ |
462 |
KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
463 |
|
464 |
s->a20_out = a20_out; |
465 |
} |
466 |
|
467 |
static const VMStateDescription vmstate_kbd_isa = { |
468 |
.name = "pckbd",
|
469 |
.version_id = 3,
|
470 |
.minimum_version_id = 3,
|
471 |
.minimum_version_id_old = 3,
|
472 |
.fields = (VMStateField []) { |
473 |
VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
|
474 |
VMSTATE_END_OF_LIST() |
475 |
} |
476 |
}; |
477 |
|
478 |
static int i8042_initfn(ISADevice *dev) |
479 |
{ |
480 |
KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd); |
481 |
|
482 |
isa_init_irq(dev, &s->irq_kbd, 1);
|
483 |
isa_init_irq(dev, &s->irq_mouse, 12);
|
484 |
|
485 |
register_ioport_read(0x60, 1, 1, kbd_read_data, s); |
486 |
register_ioport_write(0x60, 1, 1, kbd_write_data, s); |
487 |
register_ioport_read(0x64, 1, 1, kbd_read_status, s); |
488 |
register_ioport_write(0x64, 1, 1, kbd_write_command, s); |
489 |
register_ioport_read(0x92, 1, 1, ioport92_read, s); |
490 |
register_ioport_write(0x92, 1, 1, ioport92_write, s); |
491 |
|
492 |
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
493 |
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
494 |
qemu_register_reset(kbd_reset, s); |
495 |
return 0; |
496 |
} |
497 |
|
498 |
static ISADeviceInfo i8042_info = {
|
499 |
.qdev.name = "i8042",
|
500 |
.qdev.size = sizeof(ISAKBDState),
|
501 |
.qdev.vmsd = &vmstate_kbd_isa, |
502 |
.qdev.no_user = 1,
|
503 |
.init = i8042_initfn, |
504 |
}; |
505 |
|
506 |
static void i8042_register(void) |
507 |
{ |
508 |
isa_qdev_register(&i8042_info); |
509 |
} |
510 |
device_init(i8042_register) |