Revision 791d1262
| b/tcg/tcg-op.h | ||
|---|---|---|
| 1715 | 1715 |
|
| 1716 | 1716 |
static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) |
| 1717 | 1717 |
{
|
| 1718 |
#ifdef TCG_TARGET_HAS_orc_i32 |
|
| 1719 |
tcg_gen_op3_i32(INDEX_op_orc_i32, ret, arg1, arg2); |
|
| 1720 |
#else |
|
| 1718 | 1721 |
TCGv_i32 t0; |
| 1719 | 1722 |
t0 = tcg_temp_new_i32(); |
| 1720 | 1723 |
tcg_gen_not_i32(t0, arg2); |
| 1721 | 1724 |
tcg_gen_or_i32(ret, arg1, t0); |
| 1722 | 1725 |
tcg_temp_free_i32(t0); |
| 1726 |
#endif |
|
| 1723 | 1727 |
} |
| 1724 | 1728 |
|
| 1725 | 1729 |
static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) |
| 1726 | 1730 |
{
|
| 1731 |
#ifdef TCG_TARGET_HAS_orc_i64 |
|
| 1732 |
tcg_gen_op3_i64(INDEX_op_orc_i64, ret, arg1, arg2); |
|
| 1733 |
#elif defined(TCG_TARGET_HAS_orc_i32) && TCG_TARGET_REG_BITS == 32 |
|
| 1734 |
tcg_gen_orc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); |
|
| 1735 |
tcg_gen_orc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
|
| 1736 |
#else |
|
| 1727 | 1737 |
TCGv_i64 t0; |
| 1728 | 1738 |
t0 = tcg_temp_new_i64(); |
| 1729 | 1739 |
tcg_gen_not_i64(t0, arg2); |
| 1730 | 1740 |
tcg_gen_or_i64(ret, arg1, t0); |
| 1731 | 1741 |
tcg_temp_free_i64(t0); |
| 1742 |
#endif |
|
| 1732 | 1743 |
} |
| 1733 | 1744 |
|
| 1734 | 1745 |
static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) |
| b/tcg/tcg-opc.h | ||
|---|---|---|
| 112 | 112 |
#ifdef TCG_TARGET_HAS_andc_i32 |
| 113 | 113 |
DEF2(andc_i32, 1, 2, 0, 0) |
| 114 | 114 |
#endif |
| 115 |
#ifdef TCG_TARGET_HAS_orc_i32 |
|
| 116 |
DEF2(orc_i32, 1, 2, 0, 0) |
|
| 117 |
#endif |
|
| 115 | 118 |
|
| 116 | 119 |
#if TCG_TARGET_REG_BITS == 64 |
| 117 | 120 |
DEF2(mov_i64, 1, 1, 0, 0) |
| ... | ... | |
| 191 | 194 |
#ifdef TCG_TARGET_HAS_andc_i64 |
| 192 | 195 |
DEF2(andc_i64, 1, 2, 0, 0) |
| 193 | 196 |
#endif |
| 197 |
#ifdef TCG_TARGET_HAS_orc_i64 |
|
| 198 |
DEF2(orc_i64, 1, 2, 0, 0) |
|
| 199 |
#endif |
|
| 194 | 200 |
#endif |
| 195 | 201 |
|
| 196 | 202 |
/* QEMU specific */ |
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