Revision 79c4f6b0 target-i386/machine.c

b/target-i386/machine.c
158 158
    qemu_put_sbe32s(f, &pending_irq);
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    qemu_put_be32s(f, &env->mp_state);
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    qemu_put_be64s(f, &env->tsc);
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}
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    /* MCE */
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    qemu_put_be64s(f, &env->mcg_cap);
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    if (env->mcg_cap) {
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        qemu_put_be64s(f, &env->mcg_status);
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        qemu_put_be64s(f, &env->mcg_ctl);
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        for (i = 0; i < (env->mcg_cap & 0xff); i++) {
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            qemu_put_be64s(f, &env->mce_banks[4*i]);
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            qemu_put_be64s(f, &env->mce_banks[4*i + 1]);
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            qemu_put_be64s(f, &env->mce_banks[4*i + 2]);
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            qemu_put_be64s(f, &env->mce_banks[4*i + 3]);
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        }
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    }
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 }
162 175

  
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#ifdef USE_X86LDOUBLE
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/* XXX: add that in a FPU generic layer */
......
349 362
        qemu_get_be64s(f, &env->tsc);
350 363
    }
351 364

  
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    if (version_id >= 10) {
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        qemu_get_be64s(f, &env->mcg_cap);
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        if (env->mcg_cap) {
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            qemu_get_be64s(f, &env->mcg_status);
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            qemu_get_be64s(f, &env->mcg_ctl);
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            for (i = 0; i < (env->mcg_cap & 0xff); i++) {
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                qemu_get_be64s(f, &env->mce_banks[4*i]);
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                qemu_get_be64s(f, &env->mce_banks[4*i + 1]);
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                qemu_get_be64s(f, &env->mce_banks[4*i + 2]);
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                qemu_get_be64s(f, &env->mce_banks[4*i + 3]);
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            }
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        }
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    }
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    /* XXX: ensure compatiblity for halted bit ? */
353 380
    /* XXX: compute redundant hflags bits */
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    env->hflags = hflags;

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