Revision 7a3766f3 tcg/sparc/tcg-target.c
b/tcg/sparc/tcg-target.c | ||
---|---|---|
215 | 215 |
#define BA (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2)) |
216 | 216 |
|
217 | 217 |
#define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00)) |
218 |
#define ARITH_ADDCC (INSN_OP(2) | INSN_OP3(0x10)) |
|
218 | 219 |
#define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01)) |
219 | 220 |
#define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02)) |
220 | 221 |
#define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12)) |
... | ... | |
238 | 239 |
#define SHIFT_SRLX (INSN_OP(2) | INSN_OP3(0x26) | (1 << 12)) |
239 | 240 |
#define SHIFT_SRAX (INSN_OP(2) | INSN_OP3(0x27) | (1 << 12)) |
240 | 241 |
|
242 |
#define RDY (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0)) |
|
241 | 243 |
#define WRY (INSN_OP(2) | INSN_OP3(0x30)) |
242 | 244 |
#define JMPL (INSN_OP(2) | INSN_OP3(0x38)) |
243 | 245 |
#define SAVE (INSN_OP(2) | INSN_OP3(0x3c)) |
... | ... | |
410 | 412 |
fprintf(stderr, "unimplemented sety %ld\n", (long)val); |
411 | 413 |
} |
412 | 414 |
|
415 |
static inline void tcg_out_rdy(TCGContext *s, int rd) |
|
416 |
{ |
|
417 |
tcg_out32(s, RDY | INSN_RD(rd)); |
|
418 |
} |
|
419 |
|
|
413 | 420 |
static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) |
414 | 421 |
{ |
415 | 422 |
if (val != 0) { |
... | ... | |
1132 | 1139 |
args[2], const_args[2], |
1133 | 1140 |
args[3], const_args[3], args[5]); |
1134 | 1141 |
break; |
1142 |
case INDEX_op_add2_i32: |
|
1143 |
tcg_out_arithc(s, args[0], args[2], args[4], const_args[4], |
|
1144 |
ARITH_ADDCC); |
|
1145 |
tcg_out_arithc(s, args[1], args[3], args[5], const_args[5], |
|
1146 |
ARITH_ADDX); |
|
1147 |
break; |
|
1148 |
case INDEX_op_sub2_i32: |
|
1149 |
tcg_out_arithc(s, args[0], args[2], args[4], const_args[4], |
|
1150 |
ARITH_SUBCC); |
|
1151 |
tcg_out_arithc(s, args[1], args[3], args[5], const_args[5], |
|
1152 |
ARITH_SUBX); |
|
1153 |
break; |
|
1154 |
case INDEX_op_mulu2_i32: |
|
1155 |
tcg_out_arithc(s, args[0], args[2], args[3], const_args[3], |
|
1156 |
ARITH_UMUL); |
|
1157 |
tcg_out_rdy(s, args[1]); |
|
1158 |
break; |
|
1135 | 1159 |
#endif |
1136 | 1160 |
|
1137 | 1161 |
case INDEX_op_qemu_ld8u: |
... | ... | |
1250 | 1274 |
{ INDEX_op_brcond_i32, { "r", "rJ" } }, |
1251 | 1275 |
#if TCG_TARGET_REG_BITS == 32 |
1252 | 1276 |
{ INDEX_op_brcond2_i32, { "r", "r", "rJ", "rJ" } }, |
1277 |
{ INDEX_op_add2_i32, { "r", "r", "r", "r", "rJ", "rJ" } }, |
|
1278 |
{ INDEX_op_sub2_i32, { "r", "r", "r", "r", "rJ", "rJ" } }, |
|
1279 |
{ INDEX_op_mulu2_i32, { "r", "r", "r", "rJ" } }, |
|
1253 | 1280 |
#endif |
1254 | 1281 |
|
1255 | 1282 |
{ INDEX_op_qemu_ld8u, { "r", "L" } }, |
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