Statistics
| Branch: | Revision:

root / target-ppc @ 7a3a6927

Name Size
STATUS 9 kB
cpu.h 46.3 kB
exec.h 3.5 kB
helper.c 92.3 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op.c 49.6 kB
op_helper.c 61.1 kB
op_helper.h 11.2 kB
op_helper_mem.h 13.8 kB
op_mem.h 41.5 kB
op_template.h 4.5 kB
translate.c 235.5 kB
translate_init.c 247.9 kB

Latest revisions

# Date Author Comment
7a3a6927 10/08/2007 05:23 am j_mayer

Add missing exception vectors for PowerPC 7x5.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3351 c046a42c-6fe2-441c-8c8c-71466251a162
417bf010 10/08/2007 02:10 am j_mayer

Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
a9d9eb8f 10/07/2007 09:19 pm j_mayer

Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
b33c17e1 10/07/2007 08:30 pm j_mayer

PowerPC target coding style fixes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
b068d6a7 10/07/2007 08:13 pm j_mayer

PowerPC target optimisations: make intensive use of always_inline.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
f2e63a42 10/07/2007 06:43 pm j_mayer

Reorganize the CPUPPCState structure to group features.
Add #ifdef to avoid compiling not relevant resources:
- MMU related stuff for user-mode only targets
- PowerPC 64 only resources for PowerPC 32 targets
- embedded PowerPC extensions for non-ppcemb targets....
d26bfc9a 10/07/2007 05:41 pm j_mayer

Add MSR bits signification per PowerPC implementation flags (to be continued).
As a side effect, single step and branch step are available again.
Remove irrelevant MSR bits definitions.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
12de9a39 10/06/2007 01:06 am j_mayer

Full implementation of PowerPC 64 MMU, just missing support for 1 TB
memory segments.
Remove the PowerPC 64 "bridge" MMU model and implement segment registers
emulation using SLB entries instead.
Make SLB area size implementation dependant.
Improve TLB & SLB search debug traces....
65f9ee8d 10/05/2007 04:11 pm j_mayer

Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
1c27f8fb 10/05/2007 04:09 pm j_mayer

PowerPC hardware reset vector is now considered as part of the exception model.
Use it at CPU initialisation time.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162

View revisions

Also available in: Atom