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1 | 7a3f1944 | bellard | /*
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2 | 7a3f1944 | bellard | SPARC micro operations
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3 | 7a3f1944 | bellard | |
4 | 7a3f1944 | bellard | Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
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5 | 7a3f1944 | bellard | |
6 | 7a3f1944 | bellard | This library is free software; you can redistribute it and/or
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7 | 7a3f1944 | bellard | modify it under the terms of the GNU Lesser General Public
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8 | 7a3f1944 | bellard | License as published by the Free Software Foundation; either
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9 | 7a3f1944 | bellard | version 2 of the License, or (at your option) any later version.
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10 | 7a3f1944 | bellard | |
11 | 7a3f1944 | bellard | This library is distributed in the hope that it will be useful,
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12 | 7a3f1944 | bellard | but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 7a3f1944 | bellard | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 7a3f1944 | bellard | Lesser General Public License for more details.
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15 | 7a3f1944 | bellard | |
16 | 7a3f1944 | bellard | You should have received a copy of the GNU Lesser General Public
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17 | 7a3f1944 | bellard | License along with this library; if not, write to the Free Software
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18 | 7a3f1944 | bellard | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 7a3f1944 | bellard | */
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20 | 7a3f1944 | bellard | |
21 | 7a3f1944 | bellard | #include "exec.h" |
22 | 7a3f1944 | bellard | |
23 | 7a3f1944 | bellard | /*XXX*/
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24 | 7a3f1944 | bellard | #define REGNAME g0
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25 | 7a3f1944 | bellard | #define REG (env->gregs[0]) |
26 | 7a3f1944 | bellard | #include "op_template.h" |
27 | 7a3f1944 | bellard | #define REGNAME g1
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28 | 7a3f1944 | bellard | #define REG (env->gregs[1]) |
29 | 7a3f1944 | bellard | #include "op_template.h" |
30 | 7a3f1944 | bellard | #define REGNAME g2
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31 | 7a3f1944 | bellard | #define REG (env->gregs[2]) |
32 | 7a3f1944 | bellard | #include "op_template.h" |
33 | 7a3f1944 | bellard | #define REGNAME g3
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34 | 7a3f1944 | bellard | #define REG (env->gregs[3]) |
35 | 7a3f1944 | bellard | #include "op_template.h" |
36 | 7a3f1944 | bellard | #define REGNAME g4
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37 | 7a3f1944 | bellard | #define REG (env->gregs[4]) |
38 | 7a3f1944 | bellard | #include "op_template.h" |
39 | 7a3f1944 | bellard | #define REGNAME g5
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40 | 7a3f1944 | bellard | #define REG (env->gregs[5]) |
41 | 7a3f1944 | bellard | #include "op_template.h" |
42 | 7a3f1944 | bellard | #define REGNAME g6
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43 | 7a3f1944 | bellard | #define REG (env->gregs[6]) |
44 | 7a3f1944 | bellard | #include "op_template.h" |
45 | 7a3f1944 | bellard | #define REGNAME g7
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46 | 7a3f1944 | bellard | #define REG (env->gregs[7]) |
47 | 7a3f1944 | bellard | #include "op_template.h" |
48 | 7a3f1944 | bellard | #define REGNAME i0
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49 | 7a3f1944 | bellard | #define REG (env->regwptr[16]) |
50 | 7a3f1944 | bellard | #include "op_template.h" |
51 | 7a3f1944 | bellard | #define REGNAME i1
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52 | 7a3f1944 | bellard | #define REG (env->regwptr[17]) |
53 | 7a3f1944 | bellard | #include "op_template.h" |
54 | 7a3f1944 | bellard | #define REGNAME i2
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55 | 7a3f1944 | bellard | #define REG (env->regwptr[18]) |
56 | 7a3f1944 | bellard | #include "op_template.h" |
57 | 7a3f1944 | bellard | #define REGNAME i3
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58 | 7a3f1944 | bellard | #define REG (env->regwptr[19]) |
59 | 7a3f1944 | bellard | #include "op_template.h" |
60 | 7a3f1944 | bellard | #define REGNAME i4
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61 | 7a3f1944 | bellard | #define REG (env->regwptr[20]) |
62 | 7a3f1944 | bellard | #include "op_template.h" |
63 | 7a3f1944 | bellard | #define REGNAME i5
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64 | 7a3f1944 | bellard | #define REG (env->regwptr[21]) |
65 | 7a3f1944 | bellard | #include "op_template.h" |
66 | 7a3f1944 | bellard | #define REGNAME i6
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67 | 7a3f1944 | bellard | #define REG (env->regwptr[22]) |
68 | 7a3f1944 | bellard | #include "op_template.h" |
69 | 7a3f1944 | bellard | #define REGNAME i7
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70 | 7a3f1944 | bellard | #define REG (env->regwptr[23]) |
71 | 7a3f1944 | bellard | #include "op_template.h" |
72 | 7a3f1944 | bellard | #define REGNAME l0
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73 | 7a3f1944 | bellard | #define REG (env->regwptr[8]) |
74 | 7a3f1944 | bellard | #include "op_template.h" |
75 | 7a3f1944 | bellard | #define REGNAME l1
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76 | 7a3f1944 | bellard | #define REG (env->regwptr[9]) |
77 | 7a3f1944 | bellard | #include "op_template.h" |
78 | 7a3f1944 | bellard | #define REGNAME l2
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79 | 7a3f1944 | bellard | #define REG (env->regwptr[10]) |
80 | 7a3f1944 | bellard | #include "op_template.h" |
81 | 7a3f1944 | bellard | #define REGNAME l3
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82 | 7a3f1944 | bellard | #define REG (env->regwptr[11]) |
83 | 7a3f1944 | bellard | #include "op_template.h" |
84 | 7a3f1944 | bellard | #define REGNAME l4
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85 | 7a3f1944 | bellard | #define REG (env->regwptr[12]) |
86 | 7a3f1944 | bellard | #include "op_template.h" |
87 | 7a3f1944 | bellard | #define REGNAME l5
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88 | 7a3f1944 | bellard | #define REG (env->regwptr[13]) |
89 | 7a3f1944 | bellard | #include "op_template.h" |
90 | 7a3f1944 | bellard | #define REGNAME l6
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91 | 7a3f1944 | bellard | #define REG (env->regwptr[14]) |
92 | 7a3f1944 | bellard | #include "op_template.h" |
93 | 7a3f1944 | bellard | #define REGNAME l7
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94 | 7a3f1944 | bellard | #define REG (env->regwptr[15]) |
95 | 7a3f1944 | bellard | #include "op_template.h" |
96 | 7a3f1944 | bellard | #define REGNAME o0
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97 | 7a3f1944 | bellard | #define REG (env->regwptr[0]) |
98 | 7a3f1944 | bellard | #include "op_template.h" |
99 | 7a3f1944 | bellard | #define REGNAME o1
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100 | 7a3f1944 | bellard | #define REG (env->regwptr[1]) |
101 | 7a3f1944 | bellard | #include "op_template.h" |
102 | 7a3f1944 | bellard | #define REGNAME o2
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103 | 7a3f1944 | bellard | #define REG (env->regwptr[2]) |
104 | 7a3f1944 | bellard | #include "op_template.h" |
105 | 7a3f1944 | bellard | #define REGNAME o3
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106 | 7a3f1944 | bellard | #define REG (env->regwptr[3]) |
107 | 7a3f1944 | bellard | #include "op_template.h" |
108 | 7a3f1944 | bellard | #define REGNAME o4
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109 | 7a3f1944 | bellard | #define REG (env->regwptr[4]) |
110 | 7a3f1944 | bellard | #include "op_template.h" |
111 | 7a3f1944 | bellard | #define REGNAME o5
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112 | 7a3f1944 | bellard | #define REG (env->regwptr[5]) |
113 | 7a3f1944 | bellard | #include "op_template.h" |
114 | 7a3f1944 | bellard | #define REGNAME o6
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115 | 7a3f1944 | bellard | #define REG (env->regwptr[6]) |
116 | 7a3f1944 | bellard | #include "op_template.h" |
117 | 7a3f1944 | bellard | #define REGNAME o7
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118 | 7a3f1944 | bellard | #define REG (env->regwptr[7]) |
119 | 7a3f1944 | bellard | #include "op_template.h" |
120 | 7a3f1944 | bellard | |
121 | 7a3f1944 | bellard | #define EIP (env->pc)
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122 | 7a3f1944 | bellard | |
123 | 7a3f1944 | bellard | void OPPROTO op_movl_T0_0(void) |
124 | 7a3f1944 | bellard | { |
125 | 7a3f1944 | bellard | T0 = 0;
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126 | 7a3f1944 | bellard | } |
127 | 7a3f1944 | bellard | |
128 | 7a3f1944 | bellard | void OPPROTO op_movl_T0_1(void) |
129 | 7a3f1944 | bellard | { |
130 | 7a3f1944 | bellard | T0 = 1;
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131 | 7a3f1944 | bellard | } |
132 | 7a3f1944 | bellard | |
133 | 7a3f1944 | bellard | void OPPROTO op_movl_T0_im(void) |
134 | 7a3f1944 | bellard | { |
135 | 7a3f1944 | bellard | T0 = PARAM1; |
136 | 7a3f1944 | bellard | } |
137 | 7a3f1944 | bellard | |
138 | 7a3f1944 | bellard | void OPPROTO op_movl_T1_im(void) |
139 | 7a3f1944 | bellard | { |
140 | 7a3f1944 | bellard | T1 = PARAM1; |
141 | 7a3f1944 | bellard | } |
142 | 7a3f1944 | bellard | |
143 | 7a3f1944 | bellard | void OPPROTO op_movl_T2_im(void) |
144 | 7a3f1944 | bellard | { |
145 | 7a3f1944 | bellard | T2 = PARAM1; |
146 | 7a3f1944 | bellard | } |
147 | 7a3f1944 | bellard | |
148 | 7a3f1944 | bellard | void OPPROTO op_addl_T1_im(void) |
149 | 7a3f1944 | bellard | { |
150 | 7a3f1944 | bellard | T1 += PARAM1; |
151 | 7a3f1944 | bellard | } |
152 | 7a3f1944 | bellard | |
153 | 7a3f1944 | bellard | void OPPROTO op_addl_T1_T2(void) |
154 | 7a3f1944 | bellard | { |
155 | 7a3f1944 | bellard | T1 += T2; |
156 | 7a3f1944 | bellard | } |
157 | 7a3f1944 | bellard | |
158 | 7a3f1944 | bellard | void OPPROTO op_subl_T1_T2(void) |
159 | 7a3f1944 | bellard | { |
160 | 7a3f1944 | bellard | T1 -= T2; |
161 | 7a3f1944 | bellard | } |
162 | 7a3f1944 | bellard | |
163 | 7a3f1944 | bellard | void OPPROTO op_add_T1_T0 (void) |
164 | 7a3f1944 | bellard | { |
165 | 7a3f1944 | bellard | T0 += T1; |
166 | 7a3f1944 | bellard | } |
167 | 7a3f1944 | bellard | |
168 | 7a3f1944 | bellard | void OPPROTO op_and_T1_T0 (void) |
169 | 7a3f1944 | bellard | { |
170 | 7a3f1944 | bellard | T0 &= T1; |
171 | 7a3f1944 | bellard | } |
172 | 7a3f1944 | bellard | |
173 | 7a3f1944 | bellard | void OPPROTO op_or_T1_T0 (void) |
174 | 7a3f1944 | bellard | { |
175 | 7a3f1944 | bellard | T0 |= T1; |
176 | 7a3f1944 | bellard | } |
177 | 7a3f1944 | bellard | |
178 | 7a3f1944 | bellard | void OPPROTO op_xor_T1_T0 (void) |
179 | 7a3f1944 | bellard | { |
180 | 7a3f1944 | bellard | T0 ^= T1; |
181 | 7a3f1944 | bellard | } |
182 | 7a3f1944 | bellard | |
183 | 7a3f1944 | bellard | void OPPROTO op_sub_T1_T0 (void) |
184 | 7a3f1944 | bellard | { |
185 | 7a3f1944 | bellard | T0 -= T1; |
186 | 7a3f1944 | bellard | } |
187 | 7a3f1944 | bellard | |
188 | 7a3f1944 | bellard | void OPPROTO op_andn_T1_T0 (void) |
189 | 7a3f1944 | bellard | { |
190 | 7a3f1944 | bellard | T0 &= ~T1; |
191 | 7a3f1944 | bellard | } |
192 | 7a3f1944 | bellard | |
193 | 7a3f1944 | bellard | void OPPROTO op_orn_T1_T0 (void) |
194 | 7a3f1944 | bellard | { |
195 | 7a3f1944 | bellard | T0 |= ~T1; |
196 | 7a3f1944 | bellard | } |
197 | 7a3f1944 | bellard | |
198 | 7a3f1944 | bellard | void OPPROTO op_xnor_T1_T0 (void) |
199 | 7a3f1944 | bellard | { |
200 | 7a3f1944 | bellard | T0 ^= ~T1; |
201 | 7a3f1944 | bellard | } |
202 | 7a3f1944 | bellard | |
203 | 7a3f1944 | bellard | void OPPROTO op_addx_T1_T0 (void) |
204 | 7a3f1944 | bellard | { |
205 | 7a3f1944 | bellard | T0 += T1+((env->psr & PSR_CARRY)?1:0); |
206 | 7a3f1944 | bellard | } |
207 | 7a3f1944 | bellard | |
208 | 7a3f1944 | bellard | void OPPROTO op_umul_T1_T0 (void) |
209 | 7a3f1944 | bellard | { |
210 | 7a3f1944 | bellard | unsigned long long res = T0*T1; |
211 | 7a3f1944 | bellard | T0 = res & 0xffffffff;
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212 | 7a3f1944 | bellard | env->y = res >> 32;
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213 | 7a3f1944 | bellard | } |
214 | 7a3f1944 | bellard | |
215 | 7a3f1944 | bellard | void OPPROTO op_smul_T1_T0 (void) |
216 | 7a3f1944 | bellard | { |
217 | 7a3f1944 | bellard | long long res = T0*T1; |
218 | 7a3f1944 | bellard | T0 = res & 0xffffffff;
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219 | 7a3f1944 | bellard | env->y = res >> 32;
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220 | 7a3f1944 | bellard | } |
221 | 7a3f1944 | bellard | |
222 | 7a3f1944 | bellard | void OPPROTO op_udiv_T1_T0 (void) |
223 | 7a3f1944 | bellard | { |
224 | 7a3f1944 | bellard | unsigned long long x0 = T0 * env->y; |
225 | 7a3f1944 | bellard | unsigned int x1 = T1; |
226 | 7a3f1944 | bellard | T0 = x0 / x1; |
227 | 7a3f1944 | bellard | } |
228 | 7a3f1944 | bellard | |
229 | 7a3f1944 | bellard | void OPPROTO op_sdiv_T1_T0 (void) |
230 | 7a3f1944 | bellard | { |
231 | 7a3f1944 | bellard | long long x0 = T0 * env->y; |
232 | 7a3f1944 | bellard | int x1 = T1;
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233 | 7a3f1944 | bellard | T0 = x0 / x1; |
234 | 7a3f1944 | bellard | } |
235 | 7a3f1944 | bellard | |
236 | 7a3f1944 | bellard | void OPPROTO op_subx_T1_T0 (void) |
237 | 7a3f1944 | bellard | { |
238 | 7a3f1944 | bellard | T0 -= T1+((env->psr & PSR_CARRY)?1:0); |
239 | 7a3f1944 | bellard | } |
240 | 7a3f1944 | bellard | |
241 | 7a3f1944 | bellard | void OPPROTO op_set_flags (void) |
242 | 7a3f1944 | bellard | { |
243 | 7a3f1944 | bellard | env->psr = 0;
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244 | 7a3f1944 | bellard | if (!T0) env->psr |= PSR_ZERO;
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245 | 7a3f1944 | bellard | if ((unsigned int) T0 < (unsigned int) T1) env->psr |= PSR_CARRY; |
246 | 7a3f1944 | bellard | if ((int) T0 < (int) T1) env->psr |= PSR_OVF; |
247 | 7a3f1944 | bellard | if ((int) T0 < 0) env->psr |= PSR_NEG; |
248 | 7a3f1944 | bellard | } |
249 | 7a3f1944 | bellard | |
250 | 7a3f1944 | bellard | void OPPROTO op_sll (void) |
251 | 7a3f1944 | bellard | { |
252 | 7a3f1944 | bellard | T0 <<= T1; |
253 | 7a3f1944 | bellard | } |
254 | 7a3f1944 | bellard | |
255 | 7a3f1944 | bellard | void OPPROTO op_srl (void) |
256 | 7a3f1944 | bellard | { |
257 | 7a3f1944 | bellard | T0 >>= T1; |
258 | 7a3f1944 | bellard | } |
259 | 7a3f1944 | bellard | |
260 | 7a3f1944 | bellard | void OPPROTO op_sra (void) |
261 | 7a3f1944 | bellard | { |
262 | 7a3f1944 | bellard | int x = T0 >> T1;
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263 | 7a3f1944 | bellard | T0 = x; |
264 | 7a3f1944 | bellard | } |
265 | 7a3f1944 | bellard | |
266 | 7a3f1944 | bellard | void OPPROTO op_st (void) |
267 | 7a3f1944 | bellard | { |
268 | 7a3f1944 | bellard | stl ((void *) T0, T1);
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269 | 7a3f1944 | bellard | } |
270 | 7a3f1944 | bellard | |
271 | 7a3f1944 | bellard | void OPPROTO op_stb (void) |
272 | 7a3f1944 | bellard | { |
273 | 7a3f1944 | bellard | stb ((void *) T0, T1);
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274 | 7a3f1944 | bellard | } |
275 | 7a3f1944 | bellard | |
276 | 7a3f1944 | bellard | void OPPROTO op_sth (void) |
277 | 7a3f1944 | bellard | { |
278 | 7a3f1944 | bellard | stw ((void *) T0, T1);
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279 | 7a3f1944 | bellard | } |
280 | 7a3f1944 | bellard | |
281 | 7a3f1944 | bellard | void OPPROTO op_ld (void) |
282 | 7a3f1944 | bellard | { |
283 | 7a3f1944 | bellard | T1 = ldl ((void *) T0);
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284 | 7a3f1944 | bellard | } |
285 | 7a3f1944 | bellard | |
286 | 7a3f1944 | bellard | void OPPROTO op_ldub (void) |
287 | 7a3f1944 | bellard | { |
288 | 7a3f1944 | bellard | T1 = ldub ((void *) T0);
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289 | 7a3f1944 | bellard | } |
290 | 7a3f1944 | bellard | |
291 | 7a3f1944 | bellard | void OPPROTO op_lduh (void) |
292 | 7a3f1944 | bellard | { |
293 | 7a3f1944 | bellard | T1 = lduw ((void *) T0);
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294 | 7a3f1944 | bellard | } |
295 | 7a3f1944 | bellard | |
296 | 7a3f1944 | bellard | void OPPROTO op_ldsb (void) |
297 | 7a3f1944 | bellard | { |
298 | 7a3f1944 | bellard | T1 = ldsb ((void *) T0);
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299 | 7a3f1944 | bellard | } |
300 | 7a3f1944 | bellard | |
301 | 7a3f1944 | bellard | void OPPROTO op_ldsh (void) |
302 | 7a3f1944 | bellard | { |
303 | 7a3f1944 | bellard | T1 = ldsw ((void *) T0);
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304 | 7a3f1944 | bellard | } |
305 | 7a3f1944 | bellard | |
306 | 7a3f1944 | bellard | void OPPROTO op_ldstub (void) |
307 | 7a3f1944 | bellard | { |
308 | 7a3f1944 | bellard | T1 = ldub ((void *) T0);
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309 | 7a3f1944 | bellard | stb ((void *) T0, 0xff); /* XXX: Should be Atomically */ |
310 | 7a3f1944 | bellard | } |
311 | 7a3f1944 | bellard | |
312 | 7a3f1944 | bellard | void OPPROTO op_swap (void) |
313 | 7a3f1944 | bellard | { |
314 | 7a3f1944 | bellard | unsigned int tmp = ldl ((void *) T0); |
315 | 7a3f1944 | bellard | stl ((void *) T0, T1); /* XXX: Should be Atomically */ |
316 | 7a3f1944 | bellard | T1 = tmp; |
317 | 7a3f1944 | bellard | } |
318 | 7a3f1944 | bellard | |
319 | 7a3f1944 | bellard | void OPPROTO op_ldd (void) |
320 | 7a3f1944 | bellard | { |
321 | 7a3f1944 | bellard | T1 = ldl ((void *) T0);
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322 | 7a3f1944 | bellard | T0 = ldl ((void *) T0+4); |
323 | 7a3f1944 | bellard | } |
324 | 7a3f1944 | bellard | |
325 | 7a3f1944 | bellard | void OPPROTO op_wry (void) |
326 | 7a3f1944 | bellard | { |
327 | 7a3f1944 | bellard | env->y = T0^T1; |
328 | 7a3f1944 | bellard | } |
329 | 7a3f1944 | bellard | |
330 | 7a3f1944 | bellard | void OPPROTO op_rdy (void) |
331 | 7a3f1944 | bellard | { |
332 | 7a3f1944 | bellard | T0 = env->y; |
333 | 7a3f1944 | bellard | } |
334 | 7a3f1944 | bellard | |
335 | 7a3f1944 | bellard | #define regwptr (env->regwptr)
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336 | 7a3f1944 | bellard | |
337 | 7a3f1944 | bellard | void OPPROTO op_save (void) |
338 | 7a3f1944 | bellard | { |
339 | 7a3f1944 | bellard | regwptr -= 16;
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340 | 7a3f1944 | bellard | } |
341 | 7a3f1944 | bellard | |
342 | 7a3f1944 | bellard | void OPPROTO op_restore (void) |
343 | 7a3f1944 | bellard | { |
344 | 7a3f1944 | bellard | regwptr += 16;
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345 | 7a3f1944 | bellard | } |
346 | 7a3f1944 | bellard | |
347 | 7a3f1944 | bellard | void OPPROTO op_trap (void) |
348 | 7a3f1944 | bellard | { |
349 | 7a3f1944 | bellard | env->exception_index = PARAM1; |
350 | 7a3f1944 | bellard | cpu_loop_exit (); |
351 | 7a3f1944 | bellard | } |
352 | 7a3f1944 | bellard | |
353 | 7a3f1944 | bellard | void OPPROTO op_exit_tb (void) |
354 | 7a3f1944 | bellard | { |
355 | 7a3f1944 | bellard | EXIT_TB (); |
356 | 7a3f1944 | bellard | } |
357 | 7a3f1944 | bellard | |
358 | 7a3f1944 | bellard | void OPPROTO op_eval_be (void) |
359 | 7a3f1944 | bellard | { |
360 | 7a3f1944 | bellard | T0 = (env->psr & PSR_ZERO); |
361 | 7a3f1944 | bellard | } |
362 | 7a3f1944 | bellard | |
363 | 7a3f1944 | bellard | #define FLAG_SET(x) (env->psr&x)?1:0 |
364 | 7a3f1944 | bellard | #define GET_FLAGS unsigned int Z = FLAG_SET(PSR_ZERO), N = FLAG_SET(PSR_NEG), V = FLAG_SET(PSR_OVF), C = FLAG_SET(PSR_CARRY) |
365 | 7a3f1944 | bellard | |
366 | 7a3f1944 | bellard | void OPPROTO op_eval_ble (void) |
367 | 7a3f1944 | bellard | { |
368 | 7a3f1944 | bellard | GET_FLAGS; |
369 | 7a3f1944 | bellard | T0 = Z | (N^V); |
370 | 7a3f1944 | bellard | } |
371 | 7a3f1944 | bellard | |
372 | 7a3f1944 | bellard | void OPPROTO op_eval_bl (void) |
373 | 7a3f1944 | bellard | { |
374 | 7a3f1944 | bellard | GET_FLAGS; |
375 | 7a3f1944 | bellard | T0 = N^V; |
376 | 7a3f1944 | bellard | } |
377 | 7a3f1944 | bellard | |
378 | 7a3f1944 | bellard | void OPPROTO op_eval_bleu (void) |
379 | 7a3f1944 | bellard | { |
380 | 7a3f1944 | bellard | GET_FLAGS; |
381 | 7a3f1944 | bellard | T0 = C|Z; |
382 | 7a3f1944 | bellard | } |
383 | 7a3f1944 | bellard | |
384 | 7a3f1944 | bellard | void OPPROTO op_eval_bcs (void) |
385 | 7a3f1944 | bellard | { |
386 | 7a3f1944 | bellard | T0 = (env->psr & PSR_CARRY); |
387 | 7a3f1944 | bellard | } |
388 | 7a3f1944 | bellard | |
389 | 7a3f1944 | bellard | void OPPROTO op_eval_bvs (void) |
390 | 7a3f1944 | bellard | { |
391 | 7a3f1944 | bellard | T0 = (env->psr & PSR_OVF); |
392 | 7a3f1944 | bellard | } |
393 | 7a3f1944 | bellard | |
394 | 7a3f1944 | bellard | void OPPROTO op_eval_bneg (void) |
395 | 7a3f1944 | bellard | { |
396 | 7a3f1944 | bellard | T0 = (env->psr & PSR_NEG); |
397 | 7a3f1944 | bellard | } |
398 | 7a3f1944 | bellard | |
399 | 7a3f1944 | bellard | void OPPROTO op_eval_bne (void) |
400 | 7a3f1944 | bellard | { |
401 | 7a3f1944 | bellard | T0 = !(env->psr & PSR_ZERO); |
402 | 7a3f1944 | bellard | } |
403 | 7a3f1944 | bellard | |
404 | 7a3f1944 | bellard | void OPPROTO op_eval_bg (void) |
405 | 7a3f1944 | bellard | { |
406 | 7a3f1944 | bellard | GET_FLAGS; |
407 | 7a3f1944 | bellard | T0 = !(Z | (N^V)); |
408 | 7a3f1944 | bellard | } |
409 | 7a3f1944 | bellard | |
410 | 7a3f1944 | bellard | /*XXX: This seems to be documented wrong in the SPARC V8 Manual
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411 | 7a3f1944 | bellard | The manual states: !(N^V)
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412 | 7a3f1944 | bellard | but I assume Z | !(N^V) to be correct */
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413 | 7a3f1944 | bellard | void OPPROTO op_eval_bge (void) |
414 | 7a3f1944 | bellard | { |
415 | 7a3f1944 | bellard | GET_FLAGS; |
416 | 7a3f1944 | bellard | T0 = Z | !(N^V); |
417 | 7a3f1944 | bellard | } |
418 | 7a3f1944 | bellard | |
419 | 7a3f1944 | bellard | void OPPROTO op_eval_bgu (void) |
420 | 7a3f1944 | bellard | { |
421 | 7a3f1944 | bellard | GET_FLAGS; |
422 | 7a3f1944 | bellard | T0 = !(C | Z); |
423 | 7a3f1944 | bellard | } |
424 | 7a3f1944 | bellard | |
425 | 7a3f1944 | bellard | void OPPROTO op_eval_bcc (void) |
426 | 7a3f1944 | bellard | { |
427 | 7a3f1944 | bellard | T0 = !(env->psr & PSR_CARRY); |
428 | 7a3f1944 | bellard | } |
429 | 7a3f1944 | bellard | |
430 | 7a3f1944 | bellard | void OPPROTO op_eval_bpos (void) |
431 | 7a3f1944 | bellard | { |
432 | 7a3f1944 | bellard | T0 = !(env->psr & PSR_NEG); |
433 | 7a3f1944 | bellard | } |
434 | 7a3f1944 | bellard | |
435 | 7a3f1944 | bellard | void OPPROTO op_eval_bvc (void) |
436 | 7a3f1944 | bellard | { |
437 | 7a3f1944 | bellard | T0 = !(env->psr & PSR_OVF); |
438 | 7a3f1944 | bellard | } |
439 | 7a3f1944 | bellard | |
440 | 7a3f1944 | bellard | void OPPROTO op_jmp_im (void) |
441 | 7a3f1944 | bellard | { |
442 | 7a3f1944 | bellard | env->pc = PARAM1; |
443 | 7a3f1944 | bellard | } |
444 | 7a3f1944 | bellard | |
445 | 7a3f1944 | bellard | void OPPROTO op_call (void) |
446 | 7a3f1944 | bellard | { |
447 | 7a3f1944 | bellard | regwptr[7] = PARAM1-4; |
448 | 7a3f1944 | bellard | env->pc = PARAM1+PARAM2; |
449 | 7a3f1944 | bellard | } |
450 | 7a3f1944 | bellard | |
451 | 7a3f1944 | bellard | void OPPROTO op_jmpl (void) |
452 | 7a3f1944 | bellard | { |
453 | 7a3f1944 | bellard | env->npc = T0; |
454 | 7a3f1944 | bellard | } |
455 | 7a3f1944 | bellard | |
456 | 7a3f1944 | bellard | void OPPROTO op_generic_jmp_1 (void) |
457 | 7a3f1944 | bellard | { |
458 | 7a3f1944 | bellard | T1 = PARAM1; |
459 | 7a3f1944 | bellard | env->pc = PARAM1+PARAM2; |
460 | 7a3f1944 | bellard | } |
461 | 7a3f1944 | bellard | |
462 | 7a3f1944 | bellard | void OPPROTO op_generic_jmp_2 (void) |
463 | 7a3f1944 | bellard | { |
464 | 7a3f1944 | bellard | T1 = PARAM1; |
465 | 7a3f1944 | bellard | env->pc = env->npc; |
466 | 7a3f1944 | bellard | } |
467 | 7a3f1944 | bellard | |
468 | 7a3f1944 | bellard | unsigned long old_T0; |
469 | 7a3f1944 | bellard | |
470 | 7a3f1944 | bellard | void OPPROTO op_save_T0 (void) |
471 | 7a3f1944 | bellard | { |
472 | 7a3f1944 | bellard | old_T0 = T0; |
473 | 7a3f1944 | bellard | } |
474 | 7a3f1944 | bellard | |
475 | 7a3f1944 | bellard | void OPPROTO op_restore_T0 (void) |
476 | 7a3f1944 | bellard | { |
477 | 7a3f1944 | bellard | T0 = old_T0; |
478 | 7a3f1944 | bellard | } |
479 | 7a3f1944 | bellard | |
480 | 7a3f1944 | bellard | void OPPROTO op_generic_branch (void) |
481 | 7a3f1944 | bellard | { |
482 | 7a3f1944 | bellard | if (T0)
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483 | 7a3f1944 | bellard | JUMP_TB (__func__, PARAM1, 0, PARAM2);
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484 | 7a3f1944 | bellard | else
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485 | 7a3f1944 | bellard | JUMP_TB (__func__, PARAM1, 1, PARAM3);
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486 | 7a3f1944 | bellard | FORCE_RET (); |
487 | 7a3f1944 | bellard | } |
488 | 7a3f1944 | bellard | |
489 | 7a3f1944 | bellard | void OPPROTO op_generic_branch_a (void) |
490 | 7a3f1944 | bellard | { |
491 | 7a3f1944 | bellard | if (T0)
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492 | 7a3f1944 | bellard | env->npc = PARAM3; |
493 | 7a3f1944 | bellard | else
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494 | 7a3f1944 | bellard | JUMP_TB (__func__, PARAM1, 0, PARAM2);
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495 | 7a3f1944 | bellard | FORCE_RET (); |
496 | 7a3f1944 | bellard | } |
497 | 7a3f1944 | bellard | |
498 | 7a3f1944 | bellard | void OPPROTO op_noop (void) |
499 | 7a3f1944 | bellard | { |
500 | 7a3f1944 | bellard | } |