root / tests / test-i386-muldiv.h @ 7aaabde7
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| 1 | d57c4e01 | bellard | |
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| 2 | 5fafdf24 | ths | void glue(glue(test_, OP), b)(long op0, long op1) |
| 3 | d57c4e01 | bellard | {
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| 4 | 776f2227 | bellard | long res, s1, s0, flags;
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| 5 | d57c4e01 | bellard | s0 = op0; |
| 6 | d57c4e01 | bellard | s1 = op1; |
| 7 | d57c4e01 | bellard | res = s0; |
| 8 | d57c4e01 | bellard | flags = 0;
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| 9 | d57c4e01 | bellard | asm ("push %4\n\t" |
| 10 | d57c4e01 | bellard | "popf\n\t"
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| 11 | 5fafdf24 | ths | stringify(OP)"b %b2\n\t"
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| 12 | d57c4e01 | bellard | "pushf\n\t"
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| 13 | 776f2227 | bellard | "pop %1\n\t"
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| 14 | d57c4e01 | bellard | : "=a" (res), "=g" (flags) |
| 15 | d57c4e01 | bellard | : "q" (s1), "0" (res), "1" (flags)); |
| 16 | 776f2227 | bellard | printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n", |
| 17 | d57c4e01 | bellard | stringify(OP) "b", s0, s1, res, flags & CC_MASK);
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| 18 | d57c4e01 | bellard | } |
| 19 | d57c4e01 | bellard | |
| 20 | 5fafdf24 | ths | void glue(glue(test_, OP), w)(long op0h, long op0, long op1) |
| 21 | d57c4e01 | bellard | {
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| 22 | 776f2227 | bellard | long res, s1, flags, resh;
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| 23 | d57c4e01 | bellard | s1 = op1; |
| 24 | d57c4e01 | bellard | resh = op0h; |
| 25 | d57c4e01 | bellard | res = op0; |
| 26 | d57c4e01 | bellard | flags = 0;
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| 27 | d57c4e01 | bellard | asm ("push %5\n\t" |
| 28 | d57c4e01 | bellard | "popf\n\t"
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| 29 | 5fafdf24 | ths | stringify(OP) "w %w3\n\t"
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| 30 | d57c4e01 | bellard | "pushf\n\t"
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| 31 | 776f2227 | bellard | "pop %1\n\t"
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| 32 | d57c4e01 | bellard | : "=a" (res), "=g" (flags), "=d" (resh) |
| 33 | d57c4e01 | bellard | : "q" (s1), "0" (res), "1" (flags), "2" (resh)); |
| 34 | 776f2227 | bellard | printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n", |
| 35 | d57c4e01 | bellard | stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
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| 36 | d57c4e01 | bellard | } |
| 37 | d57c4e01 | bellard | |
| 38 | 5fafdf24 | ths | void glue(glue(test_, OP), l)(long op0h, long op0, long op1) |
| 39 | d57c4e01 | bellard | {
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| 40 | 776f2227 | bellard | long res, s1, flags, resh;
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| 41 | d57c4e01 | bellard | s1 = op1; |
| 42 | d57c4e01 | bellard | resh = op0h; |
| 43 | d57c4e01 | bellard | res = op0; |
| 44 | d57c4e01 | bellard | flags = 0;
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| 45 | d57c4e01 | bellard | asm ("push %5\n\t" |
| 46 | d57c4e01 | bellard | "popf\n\t"
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| 47 | 5fafdf24 | ths | stringify(OP) "l %k3\n\t"
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| 48 | d57c4e01 | bellard | "pushf\n\t"
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| 49 | 776f2227 | bellard | "pop %1\n\t"
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| 50 | d57c4e01 | bellard | : "=a" (res), "=g" (flags), "=d" (resh) |
| 51 | d57c4e01 | bellard | : "q" (s1), "0" (res), "1" (flags), "2" (resh)); |
| 52 | 776f2227 | bellard | printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n", |
| 53 | d57c4e01 | bellard | stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
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| 54 | d57c4e01 | bellard | } |
| 55 | d57c4e01 | bellard | |
| 56 | 776f2227 | bellard | #if defined(__x86_64__)
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| 57 | 5fafdf24 | ths | void glue(glue(test_, OP), q)(long op0h, long op0, long op1) |
| 58 | 776f2227 | bellard | {
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| 59 | 776f2227 | bellard | long res, s1, flags, resh;
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| 60 | 776f2227 | bellard | s1 = op1; |
| 61 | 776f2227 | bellard | resh = op0h; |
| 62 | 776f2227 | bellard | res = op0; |
| 63 | 776f2227 | bellard | flags = 0;
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| 64 | 776f2227 | bellard | asm ("push %5\n\t" |
| 65 | 776f2227 | bellard | "popf\n\t"
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| 66 | 5fafdf24 | ths | stringify(OP) "q %3\n\t"
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| 67 | 776f2227 | bellard | "pushf\n\t"
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| 68 | 776f2227 | bellard | "pop %1\n\t"
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| 69 | 776f2227 | bellard | : "=a" (res), "=g" (flags), "=d" (resh) |
| 70 | 776f2227 | bellard | : "q" (s1), "0" (res), "1" (flags), "2" (resh)); |
| 71 | 776f2227 | bellard | printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n", |
| 72 | 776f2227 | bellard | stringify(OP) "q", op0h, op0, s1, resh, res, flags & CC_MASK);
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| 73 | 776f2227 | bellard | } |
| 74 | 776f2227 | bellard | #endif
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| 75 | 776f2227 | bellard | |
| 76 | d57c4e01 | bellard | #undef OP |