Revision 7bc45061

b/target-mips/translate.c
907 907
        GEN_LOAD_IMM_TN(T1, uimm);
908 908
        break;
909 909
    case OPC_LUI:
910
        uimm <<= 16;
910
        uimm =  (int32_t)(imm << 16);
911 911
        GEN_LOAD_IMM_TN(T0, uimm);
912 912
        break;
913 913
    case OPC_SLL:

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