Revision 7c5a90dd gdbstub.c
| b/gdbstub.c | ||
|---|---|---|
| 1343 | 1343 |
} |
| 1344 | 1344 |
#elif defined (TARGET_ALPHA) |
| 1345 | 1345 |
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| 1346 |
#define NUM_CORE_REGS 65
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|
| 1346 |
#define NUM_CORE_REGS 67
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|
| 1347 | 1347 |
|
| 1348 | 1348 |
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) |
| 1349 | 1349 |
{
|
| 1350 |
if (n < 31) {
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| 1351 |
GET_REGL(env->ir[n]); |
|
| 1352 |
} |
|
| 1353 |
else if (n == 31) {
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| 1354 |
GET_REGL(0); |
|
| 1355 |
} |
|
| 1356 |
else if (n<63) {
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|
| 1357 |
uint64_t val; |
|
| 1350 |
uint64_t val; |
|
| 1351 |
CPU_DoubleU d; |
|
| 1358 | 1352 |
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| 1359 |
val = *((uint64_t *)&env->fir[n-32]); |
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| 1360 |
GET_REGL(val); |
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| 1361 |
} |
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| 1362 |
else if (n==63) {
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| 1363 |
GET_REGL(env->fpcr); |
|
| 1364 |
} |
|
| 1365 |
else if (n==64) {
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| 1366 |
GET_REGL(env->pc); |
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| 1367 |
} |
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| 1368 |
else {
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| 1369 |
GET_REGL(0); |
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| 1353 |
switch (n) {
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| 1354 |
case 0 ... 30: |
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| 1355 |
val = env->ir[n]; |
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| 1356 |
break; |
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| 1357 |
case 32 ... 62: |
|
| 1358 |
d.d = env->fir[n - 32]; |
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| 1359 |
val = d.ll; |
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| 1360 |
break; |
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| 1361 |
case 63: |
|
| 1362 |
val = cpu_alpha_load_fpcr(env); |
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| 1363 |
break; |
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| 1364 |
case 64: |
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| 1365 |
val = env->pc; |
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| 1366 |
break; |
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| 1367 |
case 66: |
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| 1368 |
val = env->unique; |
|
| 1369 |
break; |
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| 1370 |
case 31: |
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| 1371 |
case 65: |
|
| 1372 |
/* 31 really is the zero register; 65 is unassigned in the |
|
| 1373 |
gdb protocol, but is still required to occupy 8 bytes. */ |
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| 1374 |
val = 0; |
|
| 1375 |
break; |
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| 1376 |
default: |
|
| 1377 |
return 0; |
|
| 1370 | 1378 |
} |
| 1371 |
|
|
| 1372 |
return 0; |
|
| 1379 |
GET_REGL(val); |
|
| 1373 | 1380 |
} |
| 1374 | 1381 |
|
| 1375 | 1382 |
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) |
| 1376 | 1383 |
{
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| 1377 |
target_ulong tmp; |
|
| 1378 |
tmp = ldtul_p(mem_buf);
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|
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target_ulong tmp = ldtul_p(mem_buf);
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|
| 1385 |
CPU_DoubleU d;
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| 1379 | 1386 |
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| 1380 |
if (n < 31) {
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| 1387 |
switch (n) {
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| 1388 |
case 0 ... 30: |
|
| 1381 | 1389 |
env->ir[n] = tmp; |
| 1390 |
break; |
|
| 1391 |
case 32 ... 62: |
|
| 1392 |
d.ll = tmp; |
|
| 1393 |
env->fir[n - 32] = d.d; |
|
| 1394 |
break; |
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| 1395 |
case 63: |
|
| 1396 |
cpu_alpha_store_fpcr(env, tmp); |
|
| 1397 |
break; |
|
| 1398 |
case 64: |
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| 1399 |
env->pc = tmp; |
|
| 1400 |
break; |
|
| 1401 |
case 66: |
|
| 1402 |
env->unique = tmp; |
|
| 1403 |
break; |
|
| 1404 |
case 31: |
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| 1405 |
case 65: |
|
| 1406 |
/* 31 really is the zero register; 65 is unassigned in the |
|
| 1407 |
gdb protocol, but is still required to occupy 8 bytes. */ |
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| 1408 |
break; |
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| 1409 |
default: |
|
| 1410 |
return 0; |
|
| 1382 | 1411 |
} |
| 1383 |
|
|
| 1384 |
if (n > 31 && n < 63) {
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|
| 1385 |
env->fir[n - 32] = ldfl_p(mem_buf); |
|
| 1386 |
} |
|
| 1387 |
|
|
| 1388 |
if (n == 64 ) {
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|
| 1389 |
env->pc=tmp; |
|
| 1390 |
} |
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| 1391 |
|
|
| 1392 | 1412 |
return 8; |
| 1393 | 1413 |
} |
| 1394 | 1414 |
#elif defined (TARGET_S390X) |
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