root / hw / pci.h @ 7c7b829e
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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 163c8a59 | Luiz Capitulino | #include "qobject.h" |
6 | 376253ec | aliguori | |
7 | 6b1b92d3 | Paul Brook | #include "qdev.h" |
8 | 6b1b92d3 | Paul Brook | |
9 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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10 | 87ecb68b | pbrook | #include "isa.h" |
11 | 87ecb68b | pbrook | |
12 | 87ecb68b | pbrook | /* PCI bus */
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13 | 87ecb68b | pbrook | |
14 | 3ae80618 | aliguori | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
15 | 3ae80618 | aliguori | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
16 | 3ae80618 | aliguori | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
17 | 6fa84913 | Isaku Yamahata | #define PCI_FUNC_MAX 8 |
18 | 3ae80618 | aliguori | |
19 | a770dc7e | aliguori | /* Class, Vendor and Device IDs from Linux's pci_ids.h */
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20 | a770dc7e | aliguori | #include "pci_ids.h" |
21 | 173a543b | blueswir1 | |
22 | a770dc7e | aliguori | /* QEMU-specific Vendor and Device ID definitions */
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23 | 6f338c34 | aliguori | |
24 | a770dc7e | aliguori | /* IBM (0x1014) */
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25 | a770dc7e | aliguori | #define PCI_DEVICE_ID_IBM_440GX 0x027f |
26 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff |
27 | deb54399 | aliguori | |
28 | a770dc7e | aliguori | /* Hitachi (0x1054) */
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29 | deb54399 | aliguori | #define PCI_VENDOR_ID_HITACHI 0x1054 |
30 | a770dc7e | aliguori | #define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e |
31 | deb54399 | aliguori | |
32 | a770dc7e | aliguori | /* Apple (0x106b) */
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33 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 |
34 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e |
35 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f |
36 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 |
37 | a770dc7e | aliguori | #define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f |
38 | deb54399 | aliguori | |
39 | a770dc7e | aliguori | /* Realtek (0x10ec) */
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40 | a770dc7e | aliguori | #define PCI_DEVICE_ID_REALTEK_8029 0x8029 |
41 | deb54399 | aliguori | |
42 | a770dc7e | aliguori | /* Xilinx (0x10ee) */
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43 | a770dc7e | aliguori | #define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 |
44 | deb54399 | aliguori | |
45 | a770dc7e | aliguori | /* Marvell (0x11ab) */
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46 | a770dc7e | aliguori | #define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 |
47 | deb54399 | aliguori | |
48 | a770dc7e | aliguori | /* QEMU/Bochs VGA (0x1234) */
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49 | 4ebcf884 | blueswir1 | #define PCI_VENDOR_ID_QEMU 0x1234 |
50 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_QEMU_VGA 0x1111 |
51 | 4ebcf884 | blueswir1 | |
52 | a770dc7e | aliguori | /* VMWare (0x15ad) */
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53 | deb54399 | aliguori | #define PCI_VENDOR_ID_VMWARE 0x15ad |
54 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 |
55 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 |
56 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_NET 0x0720 |
57 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 |
58 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 |
59 | deb54399 | aliguori | |
60 | cef3017c | aliguori | /* Intel (0x8086) */
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61 | a770dc7e | aliguori | #define PCI_DEVICE_ID_INTEL_82551IT 0x1209 |
62 | d6fd1e66 | Stefan Weil | #define PCI_DEVICE_ID_INTEL_82557 0x1229 |
63 | 74c62ba8 | aurel32 | |
64 | deb54399 | aliguori | /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
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65 | d350d97d | aliguori | #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 |
66 | d350d97d | aliguori | #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 |
67 | d350d97d | aliguori | #define PCI_SUBDEVICE_ID_QEMU 0x1100 |
68 | d350d97d | aliguori | |
69 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_NET 0x1000 |
70 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 |
71 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 |
72 | 14d50bef | aliguori | #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 |
73 | d350d97d | aliguori | |
74 | 4f8589e1 | Isaku Yamahata | #define FMT_PCIBUS PRIx64
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75 | 6e355d90 | Isaku Yamahata | |
76 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
77 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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78 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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79 | 87ecb68b | pbrook | uint32_t address, int len);
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80 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
81 | 6e355d90 | Isaku Yamahata | pcibus_t addr, pcibus_t size, int type);
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82 | 5851e08c | aliguori | typedef int PCIUnregisterFunc(PCIDevice *pci_dev); |
83 | 87ecb68b | pbrook | |
84 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
85 | 6e355d90 | Isaku Yamahata | pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
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86 | 6e355d90 | Isaku Yamahata | #define PCI_BAR_UNMAPPED (~(pcibus_t)0) |
87 | 6e355d90 | Isaku Yamahata | pcibus_t size; |
88 | a0c7a97e | Isaku Yamahata | pcibus_t filtered_size; |
89 | 87ecb68b | pbrook | uint8_t type; |
90 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func; |
91 | 87ecb68b | pbrook | } PCIIORegion; |
92 | 87ecb68b | pbrook | |
93 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
94 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
95 | 87ecb68b | pbrook | |
96 | fb58a897 | Isaku Yamahata | #include "pci_regs.h" |
97 | fb58a897 | Isaku Yamahata | |
98 | fb58a897 | Isaku Yamahata | /* PCI HEADER_TYPE */
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99 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 |
100 | 8098ed41 | aurel32 | |
101 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config header */
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102 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_HEADER_SIZE 0x40 |
103 | b7ee1603 | Michael S. Tsirkin | /* Size of the standard PCI config space */
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104 | b7ee1603 | Michael S. Tsirkin | #define PCI_CONFIG_SPACE_SIZE 0x100 |
105 | a9f49946 | Isaku Yamahata | /* Size of the standart PCIe config space: 4KB */
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106 | a9f49946 | Isaku Yamahata | #define PCIE_CONFIG_SPACE_SIZE 0x1000 |
107 | b7ee1603 | Michael S. Tsirkin | |
108 | e369cad7 | Isaku Yamahata | #define PCI_NUM_PINS 4 /* A-D */ |
109 | e369cad7 | Isaku Yamahata | |
110 | 02eb84d0 | Michael S. Tsirkin | /* Bits in cap_present field. */
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111 | 02eb84d0 | Michael S. Tsirkin | enum {
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112 | 02eb84d0 | Michael S. Tsirkin | QEMU_PCI_CAP_MSIX = 0x1,
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113 | a9f49946 | Isaku Yamahata | QEMU_PCI_CAP_EXPRESS = 0x2,
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114 | 49823868 | Isaku Yamahata | |
115 | 49823868 | Isaku Yamahata | /* multifunction capable device */
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116 | 49823868 | Isaku Yamahata | #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR 2 |
117 | 49823868 | Isaku Yamahata | QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR),
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118 | 02eb84d0 | Michael S. Tsirkin | }; |
119 | 02eb84d0 | Michael S. Tsirkin | |
120 | 87ecb68b | pbrook | struct PCIDevice {
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121 | 6b1b92d3 | Paul Brook | DeviceState qdev; |
122 | 87ecb68b | pbrook | /* PCI config space */
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123 | a9f49946 | Isaku Yamahata | uint8_t *config; |
124 | b7ee1603 | Michael S. Tsirkin | |
125 | bd4b65ee | Michael S. Tsirkin | /* Used to enable config checks on load. Note that writeable bits are
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126 | bd4b65ee | Michael S. Tsirkin | * never checked even if set in cmask. */
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127 | a9f49946 | Isaku Yamahata | uint8_t *cmask; |
128 | bd4b65ee | Michael S. Tsirkin | |
129 | b7ee1603 | Michael S. Tsirkin | /* Used to implement R/W bytes */
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130 | a9f49946 | Isaku Yamahata | uint8_t *wmask; |
131 | 87ecb68b | pbrook | |
132 | 6f4cbd39 | Michael S. Tsirkin | /* Used to allocate config space for capabilities. */
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133 | a9f49946 | Isaku Yamahata | uint8_t *used; |
134 | 6f4cbd39 | Michael S. Tsirkin | |
135 | 87ecb68b | pbrook | /* the following fields are read only */
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136 | 87ecb68b | pbrook | PCIBus *bus; |
137 | 54586bd1 | Gerd Hoffmann | uint32_t devfn; |
138 | 87ecb68b | pbrook | char name[64]; |
139 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
140 | 87ecb68b | pbrook | |
141 | 87ecb68b | pbrook | /* do not access the following fields */
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142 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
143 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
144 | 87ecb68b | pbrook | |
145 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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146 | 87ecb68b | pbrook | qemu_irq *irq; |
147 | 87ecb68b | pbrook | |
148 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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149 | d036bb21 | Michael S. Tsirkin | uint8_t irq_state; |
150 | 02eb84d0 | Michael S. Tsirkin | |
151 | 02eb84d0 | Michael S. Tsirkin | /* Capability bits */
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152 | 02eb84d0 | Michael S. Tsirkin | uint32_t cap_present; |
153 | 02eb84d0 | Michael S. Tsirkin | |
154 | 02eb84d0 | Michael S. Tsirkin | /* Offset of MSI-X capability in config space */
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155 | 02eb84d0 | Michael S. Tsirkin | uint8_t msix_cap; |
156 | 02eb84d0 | Michael S. Tsirkin | |
157 | 02eb84d0 | Michael S. Tsirkin | /* MSI-X entries */
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158 | 02eb84d0 | Michael S. Tsirkin | int msix_entries_nr;
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159 | 02eb84d0 | Michael S. Tsirkin | |
160 | 02eb84d0 | Michael S. Tsirkin | /* Space to store MSIX table */
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161 | 02eb84d0 | Michael S. Tsirkin | uint8_t *msix_table_page; |
162 | 02eb84d0 | Michael S. Tsirkin | /* MMIO index used to map MSIX table and pending bit entries. */
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163 | 02eb84d0 | Michael S. Tsirkin | int msix_mmio_index;
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164 | 02eb84d0 | Michael S. Tsirkin | /* Reference-count for entries actually in use by driver. */
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165 | 02eb84d0 | Michael S. Tsirkin | unsigned *msix_entry_used;
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166 | 02eb84d0 | Michael S. Tsirkin | /* Region including the MSI-X table */
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167 | 02eb84d0 | Michael S. Tsirkin | uint32_t msix_bar_size; |
168 | f16c4abf | Juan Quintela | /* Version id needed for VMState */
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169 | f16c4abf | Juan Quintela | int32_t version_id; |
170 | c2039bd0 | Anthony Liguori | |
171 | c2039bd0 | Anthony Liguori | /* Location of option rom */
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172 | 8c52c8f3 | Gerd Hoffmann | char *romfile;
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173 | c2039bd0 | Anthony Liguori | ram_addr_t rom_offset; |
174 | 88169ddf | Gerd Hoffmann | uint32_t rom_bar; |
175 | 87ecb68b | pbrook | }; |
176 | 87ecb68b | pbrook | |
177 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
178 | 87ecb68b | pbrook | int instance_size, int devfn, |
179 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
180 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
181 | 87ecb68b | pbrook | |
182 | 28c2c264 | Avi Kivity | void pci_register_bar(PCIDevice *pci_dev, int region_num, |
183 | 6e355d90 | Isaku Yamahata | pcibus_t size, int type,
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184 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func); |
185 | 87ecb68b | pbrook | |
186 | 6f4cbd39 | Michael S. Tsirkin | int pci_add_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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187 | 1db5a3aa | Michael S. Tsirkin | int pci_add_capability_at_offset(PCIDevice *pci_dev, uint8_t cap_id,
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188 | 1db5a3aa | Michael S. Tsirkin | uint8_t cap_offset, uint8_t cap_size); |
189 | 6f4cbd39 | Michael S. Tsirkin | |
190 | 6f4cbd39 | Michael S. Tsirkin | void pci_del_capability(PCIDevice *pci_dev, uint8_t cap_id, uint8_t cap_size);
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191 | 6f4cbd39 | Michael S. Tsirkin | |
192 | 6f4cbd39 | Michael S. Tsirkin | void pci_reserve_capability(PCIDevice *pci_dev, uint8_t offset, uint8_t size);
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193 | 6f4cbd39 | Michael S. Tsirkin | |
194 | 6f4cbd39 | Michael S. Tsirkin | uint8_t pci_find_capability(PCIDevice *pci_dev, uint8_t cap_id); |
195 | 6f4cbd39 | Michael S. Tsirkin | |
196 | 6f4cbd39 | Michael S. Tsirkin | |
197 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
198 | 87ecb68b | pbrook | uint32_t address, int len);
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199 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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200 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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201 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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202 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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203 | 87ecb68b | pbrook | |
204 | 5d4e84c8 | Juan Quintela | typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); |
205 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
206 | 87c30546 | Isaku Yamahata | typedef int (*pci_hotplug_fn)(DeviceState *qdev, PCIDevice *pci_dev, int state); |
207 | 21eea4b3 | Gerd Hoffmann | void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
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208 | 21eea4b3 | Gerd Hoffmann | const char *name, int devfn_min); |
209 | 21eea4b3 | Gerd Hoffmann | PCIBus *pci_bus_new(DeviceState *parent, const char *name, int devfn_min); |
210 | 21eea4b3 | Gerd Hoffmann | void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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211 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int nirq); |
212 | 87c30546 | Isaku Yamahata | void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug, DeviceState *dev);
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213 | 02e2da45 | Paul Brook | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
214 | 02e2da45 | Paul Brook | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
215 | 5d4e84c8 | Juan Quintela | void *irq_opaque, int devfn_min, int nirq); |
216 | 87ecb68b | pbrook | |
217 | 2e01c8cf | Blue Swirl | void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base);
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218 | 2e01c8cf | Blue Swirl | |
219 | 5607c388 | Markus Armbruster | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, |
220 | 5607c388 | Markus Armbruster | const char *default_devaddr); |
221 | 07caea31 | Markus Armbruster | PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model, |
222 | 07caea31 | Markus Armbruster | const char *default_devaddr); |
223 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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224 | e822a52a | Isaku Yamahata | void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d)); |
225 | c469e1dd | Isaku Yamahata | PCIBus *pci_find_root_bus(int domain);
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226 | e075e788 | Isaku Yamahata | int pci_find_domain(const PCIBus *bus); |
227 | e822a52a | Isaku Yamahata | PCIBus *pci_find_bus(PCIBus *bus, int bus_num);
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228 | e822a52a | Isaku Yamahata | PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int slot, int function); |
229 | 49bd1458 | Markus Armbruster | PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr); |
230 | 87ecb68b | pbrook | |
231 | e9283f8b | Jan Kiszka | int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp, |
232 | e9283f8b | Jan Kiszka | unsigned *slotp);
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233 | 880345c4 | aliguori | |
234 | 163c8a59 | Luiz Capitulino | void do_pci_info_print(Monitor *mon, const QObject *data); |
235 | 163c8a59 | Luiz Capitulino | void do_pci_info(Monitor *mon, QObject **ret_data);
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236 | 7c7b829e | Isaku Yamahata | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, bool multifunction, |
237 | 7c7b829e | Isaku Yamahata | uint16_t vid, uint16_t did, |
238 | 87ecb68b | pbrook | pci_map_irq_fn map_irq, const char *name); |
239 | d6318738 | Michael S. Tsirkin | PCIDevice *pci_bridge_get_device(PCIBus *bus); |
240 | 87ecb68b | pbrook | |
241 | deb54399 | aliguori | static inline void |
242 | 64d50b8b | Michael S. Tsirkin | pci_set_byte(uint8_t *config, uint8_t val) |
243 | 64d50b8b | Michael S. Tsirkin | { |
244 | 64d50b8b | Michael S. Tsirkin | *config = val; |
245 | 64d50b8b | Michael S. Tsirkin | } |
246 | 64d50b8b | Michael S. Tsirkin | |
247 | 64d50b8b | Michael S. Tsirkin | static inline uint8_t |
248 | cb95c2e4 | Stefan Weil | pci_get_byte(const uint8_t *config)
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249 | 64d50b8b | Michael S. Tsirkin | { |
250 | 64d50b8b | Michael S. Tsirkin | return *config;
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251 | 64d50b8b | Michael S. Tsirkin | } |
252 | 64d50b8b | Michael S. Tsirkin | |
253 | 64d50b8b | Michael S. Tsirkin | static inline void |
254 | 14e12559 | Michael S. Tsirkin | pci_set_word(uint8_t *config, uint16_t val) |
255 | 14e12559 | Michael S. Tsirkin | { |
256 | 14e12559 | Michael S. Tsirkin | cpu_to_le16wu((uint16_t *)config, val); |
257 | 14e12559 | Michael S. Tsirkin | } |
258 | 14e12559 | Michael S. Tsirkin | |
259 | 14e12559 | Michael S. Tsirkin | static inline uint16_t |
260 | cb95c2e4 | Stefan Weil | pci_get_word(const uint8_t *config)
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261 | 14e12559 | Michael S. Tsirkin | { |
262 | cb95c2e4 | Stefan Weil | return le16_to_cpupu((const uint16_t *)config); |
263 | 14e12559 | Michael S. Tsirkin | } |
264 | 14e12559 | Michael S. Tsirkin | |
265 | 14e12559 | Michael S. Tsirkin | static inline void |
266 | 14e12559 | Michael S. Tsirkin | pci_set_long(uint8_t *config, uint32_t val) |
267 | 14e12559 | Michael S. Tsirkin | { |
268 | 14e12559 | Michael S. Tsirkin | cpu_to_le32wu((uint32_t *)config, val); |
269 | 14e12559 | Michael S. Tsirkin | } |
270 | 14e12559 | Michael S. Tsirkin | |
271 | 14e12559 | Michael S. Tsirkin | static inline uint32_t |
272 | cb95c2e4 | Stefan Weil | pci_get_long(const uint8_t *config)
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273 | 14e12559 | Michael S. Tsirkin | { |
274 | cb95c2e4 | Stefan Weil | return le32_to_cpupu((const uint32_t *)config); |
275 | 14e12559 | Michael S. Tsirkin | } |
276 | 14e12559 | Michael S. Tsirkin | |
277 | 14e12559 | Michael S. Tsirkin | static inline void |
278 | fb5ce7d2 | Isaku Yamahata | pci_set_quad(uint8_t *config, uint64_t val) |
279 | fb5ce7d2 | Isaku Yamahata | { |
280 | fb5ce7d2 | Isaku Yamahata | cpu_to_le64w((uint64_t *)config, val); |
281 | fb5ce7d2 | Isaku Yamahata | } |
282 | fb5ce7d2 | Isaku Yamahata | |
283 | fb5ce7d2 | Isaku Yamahata | static inline uint64_t |
284 | cb95c2e4 | Stefan Weil | pci_get_quad(const uint8_t *config)
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285 | fb5ce7d2 | Isaku Yamahata | { |
286 | cb95c2e4 | Stefan Weil | return le64_to_cpup((const uint64_t *)config); |
287 | fb5ce7d2 | Isaku Yamahata | } |
288 | fb5ce7d2 | Isaku Yamahata | |
289 | fb5ce7d2 | Isaku Yamahata | static inline void |
290 | deb54399 | aliguori | pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) |
291 | deb54399 | aliguori | { |
292 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_VENDOR_ID], val); |
293 | deb54399 | aliguori | } |
294 | deb54399 | aliguori | |
295 | deb54399 | aliguori | static inline void |
296 | deb54399 | aliguori | pci_config_set_device_id(uint8_t *pci_config, uint16_t val) |
297 | deb54399 | aliguori | { |
298 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_DEVICE_ID], val); |
299 | deb54399 | aliguori | } |
300 | deb54399 | aliguori | |
301 | 173a543b | blueswir1 | static inline void |
302 | cf602c7b | Izik Eidus | pci_config_set_revision(uint8_t *pci_config, uint8_t val) |
303 | cf602c7b | Izik Eidus | { |
304 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_REVISION_ID], val); |
305 | cf602c7b | Izik Eidus | } |
306 | cf602c7b | Izik Eidus | |
307 | cf602c7b | Izik Eidus | static inline void |
308 | 173a543b | blueswir1 | pci_config_set_class(uint8_t *pci_config, uint16_t val) |
309 | 173a543b | blueswir1 | { |
310 | 14e12559 | Michael S. Tsirkin | pci_set_word(&pci_config[PCI_CLASS_DEVICE], val); |
311 | 173a543b | blueswir1 | } |
312 | 173a543b | blueswir1 | |
313 | cf602c7b | Izik Eidus | static inline void |
314 | cf602c7b | Izik Eidus | pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val) |
315 | cf602c7b | Izik Eidus | { |
316 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_CLASS_PROG], val); |
317 | cf602c7b | Izik Eidus | } |
318 | cf602c7b | Izik Eidus | |
319 | cf602c7b | Izik Eidus | static inline void |
320 | cf602c7b | Izik Eidus | pci_config_set_interrupt_pin(uint8_t *pci_config, uint8_t val) |
321 | cf602c7b | Izik Eidus | { |
322 | cf602c7b | Izik Eidus | pci_set_byte(&pci_config[PCI_INTERRUPT_PIN], val); |
323 | cf602c7b | Izik Eidus | } |
324 | cf602c7b | Izik Eidus | |
325 | 81a322d4 | Gerd Hoffmann | typedef int (*pci_qdev_initfn)(PCIDevice *dev); |
326 | 0aab0d3a | Gerd Hoffmann | typedef struct { |
327 | 0aab0d3a | Gerd Hoffmann | DeviceInfo qdev; |
328 | 0aab0d3a | Gerd Hoffmann | pci_qdev_initfn init; |
329 | e3936fa5 | Gerd Hoffmann | PCIUnregisterFunc *exit; |
330 | 0aab0d3a | Gerd Hoffmann | PCIConfigReadFunc *config_read; |
331 | 0aab0d3a | Gerd Hoffmann | PCIConfigWriteFunc *config_write; |
332 | a9f49946 | Isaku Yamahata | |
333 | e327e323 | Isaku Yamahata | /*
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334 | e327e323 | Isaku Yamahata | * pci-to-pci bridge or normal device.
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335 | e327e323 | Isaku Yamahata | * This doesn't mean pci host switch.
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336 | e327e323 | Isaku Yamahata | * When card bus bridge is supported, this would be enhanced.
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337 | e327e323 | Isaku Yamahata | */
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338 | e327e323 | Isaku Yamahata | int is_bridge;
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339 | fb231628 | Isaku Yamahata | |
340 | a9f49946 | Isaku Yamahata | /* pcie stuff */
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341 | 3c217c14 | Isaku Yamahata | int is_express; /* is this device pci express? */ |
342 | 8c52c8f3 | Gerd Hoffmann | |
343 | 8c52c8f3 | Gerd Hoffmann | /* rom bar */
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344 | 8c52c8f3 | Gerd Hoffmann | const char *romfile; |
345 | 0aab0d3a | Gerd Hoffmann | } PCIDeviceInfo; |
346 | 0aab0d3a | Gerd Hoffmann | |
347 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register(PCIDeviceInfo *info);
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348 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register_many(PCIDeviceInfo *info);
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349 | 6b1b92d3 | Paul Brook | |
350 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_multifunction(PCIBus *bus, int devfn, bool multifunction, |
351 | 49823868 | Isaku Yamahata | const char *name); |
352 | 49823868 | Isaku Yamahata | PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
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353 | 49823868 | Isaku Yamahata | bool multifunction,
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354 | 49823868 | Isaku Yamahata | const char *name); |
355 | 499cf102 | Markus Armbruster | PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name); |
356 | 6b1b92d3 | Paul Brook | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); |
357 | 6b1b92d3 | Paul Brook | |
358 | 3c18685f | Isaku Yamahata | static inline int pci_is_express(const PCIDevice *d) |
359 | a9f49946 | Isaku Yamahata | { |
360 | a9f49946 | Isaku Yamahata | return d->cap_present & QEMU_PCI_CAP_EXPRESS;
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361 | a9f49946 | Isaku Yamahata | } |
362 | a9f49946 | Isaku Yamahata | |
363 | 3c18685f | Isaku Yamahata | static inline uint32_t pci_config_size(const PCIDevice *d) |
364 | a9f49946 | Isaku Yamahata | { |
365 | a9f49946 | Isaku Yamahata | return pci_is_express(d) ? PCIE_CONFIG_SPACE_SIZE : PCI_CONFIG_SPACE_SIZE;
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366 | a9f49946 | Isaku Yamahata | } |
367 | a9f49946 | Isaku Yamahata | |
368 | f49db805 | Isaku Yamahata | /* These are not pci specific. Should move into a separate header.
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369 | f49db805 | Isaku Yamahata | * Only pci.c uses them, so keep them here for now.
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370 | f49db805 | Isaku Yamahata | */
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371 | f49db805 | Isaku Yamahata | |
372 | f49db805 | Isaku Yamahata | /* Get last byte of a range from offset + length.
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373 | f49db805 | Isaku Yamahata | * Undefined for ranges that wrap around 0. */
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374 | f49db805 | Isaku Yamahata | static inline uint64_t range_get_last(uint64_t offset, uint64_t len) |
375 | f49db805 | Isaku Yamahata | { |
376 | f49db805 | Isaku Yamahata | return offset + len - 1; |
377 | f49db805 | Isaku Yamahata | } |
378 | f49db805 | Isaku Yamahata | |
379 | f49db805 | Isaku Yamahata | /* Check whether a given range covers a given byte. */
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380 | f49db805 | Isaku Yamahata | static inline int range_covers_byte(uint64_t offset, uint64_t len, |
381 | f49db805 | Isaku Yamahata | uint64_t byte) |
382 | f49db805 | Isaku Yamahata | { |
383 | f49db805 | Isaku Yamahata | return offset <= byte && byte <= range_get_last(offset, len);
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384 | f49db805 | Isaku Yamahata | } |
385 | f49db805 | Isaku Yamahata | |
386 | f49db805 | Isaku Yamahata | /* Check whether 2 given ranges overlap.
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387 | f49db805 | Isaku Yamahata | * Undefined if ranges that wrap around 0. */
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388 | f49db805 | Isaku Yamahata | static inline int ranges_overlap(uint64_t first1, uint64_t len1, |
389 | f49db805 | Isaku Yamahata | uint64_t first2, uint64_t len2) |
390 | f49db805 | Isaku Yamahata | { |
391 | f49db805 | Isaku Yamahata | uint64_t last1 = range_get_last(first1, len1); |
392 | f49db805 | Isaku Yamahata | uint64_t last2 = range_get_last(first2, len2); |
393 | f49db805 | Isaku Yamahata | |
394 | f49db805 | Isaku Yamahata | return !(last2 < first1 || last1 < first2);
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395 | f49db805 | Isaku Yamahata | } |
396 | f49db805 | Isaku Yamahata | |
397 | 87ecb68b | pbrook | #endif |