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/*
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 *  MIPS emulation memory micro-operations for qemu.
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 *
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 *  Copyright (c) 2004-2005 Jocelyn Mayer
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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/* Standard loads and stores */
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void glue(op_lb, MEMSUFFIX) (void)
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{
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    T0 = glue(ldsb, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_lbu, MEMSUFFIX) (void)
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{
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    T0 = glue(ldub, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_sb, MEMSUFFIX) (void)
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{
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    glue(stb, MEMSUFFIX)(T0, T1);
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    RETURN();
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}
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void glue(op_lh, MEMSUFFIX) (void)
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{
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    T0 = glue(ldsw, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_lhu, MEMSUFFIX) (void)
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{
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    T0 = glue(lduw, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_sh, MEMSUFFIX) (void)
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{
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    glue(stw, MEMSUFFIX)(T0, T1);
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    RETURN();
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}
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void glue(op_lw, MEMSUFFIX) (void)
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{
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    T0 = glue(ldl, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_lwu, MEMSUFFIX) (void)
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{
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    T0 = (uint32_t)glue(ldl, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_sw, MEMSUFFIX) (void)
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{
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    glue(stl, MEMSUFFIX)(T0, T1);
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    RETURN();
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}
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/* "half" load and stores.  We must do the memory access inline,
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   or fault handling won't work.  */
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#ifdef TARGET_WORDS_BIGENDIAN
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#define GET_LMASK(v) ((v) & 3)
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#define GET_OFFSET(addr, offset) (addr + (offset))
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#else
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#define GET_LMASK(v) (((v) & 3) ^ 3)
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#define GET_OFFSET(addr, offset) (addr - (offset))
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#endif
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void glue(op_lwl, MEMSUFFIX) (void)
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{
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    target_ulong tmp;
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    tmp = glue(ldub, MEMSUFFIX)(T0);
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    T1 = (T1 & 0x00FFFFFF) | (tmp << 24);
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    if (GET_LMASK(T0) <= 2) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1));
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        T1 = (T1 & 0xFF00FFFF) | (tmp << 16);
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    }
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    if (GET_LMASK(T0) <= 1) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2));
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        T1 = (T1 & 0xFFFF00FF) | (tmp << 8);
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    }
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    if (GET_LMASK(T0) == 0) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3));
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        T1 = (T1 & 0xFFFFFF00) | tmp;
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    }
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    T1 = (int32_t)T1;
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    RETURN();
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}
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void glue(op_lwr, MEMSUFFIX) (void)
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{
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    target_ulong tmp;
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    tmp = glue(ldub, MEMSUFFIX)(T0);
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    T1 = (T1 & 0xFFFFFF00) | tmp;
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    if (GET_LMASK(T0) >= 1) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1));
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        T1 = (T1 & 0xFFFF00FF) | (tmp << 8);
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    }
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    if (GET_LMASK(T0) >= 2) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2));
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        T1 = (T1 & 0xFF00FFFF) | (tmp << 16);
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    }
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    if (GET_LMASK(T0) == 3) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3));
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        T1 = (T1 & 0x00FFFFFF) | (tmp << 24);
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    }
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    T1 = (int32_t)T1;
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    RETURN();
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}
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void glue(op_swl, MEMSUFFIX) (void)
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{
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    glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 24));
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    if (GET_LMASK(T0) <= 2)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 16));
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    if (GET_LMASK(T0) <= 1)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 8));
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    if (GET_LMASK(T0) == 0)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)T1);
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    RETURN();
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}
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void glue(op_swr, MEMSUFFIX) (void)
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{
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    glue(stb, MEMSUFFIX)(T0, (uint8_t)T1);
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    if (GET_LMASK(T0) >= 1)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8));
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    if (GET_LMASK(T0) >= 2)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16));
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    if (GET_LMASK(T0) == 3)
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        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24));
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    RETURN();
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}
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void glue(op_ll, MEMSUFFIX) (void)
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{
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    T1 = T0;
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    T0 = glue(ldl, MEMSUFFIX)(T0);
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    env->CP0_LLAddr = T1;
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    RETURN();
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}
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void glue(op_sc, MEMSUFFIX) (void)
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{
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    CALL_FROM_TB0(dump_sc);
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    if (T0 & 0x3) {
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        env->CP0_BadVAddr = T0;
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        CALL_FROM_TB1(do_raise_exception, EXCP_AdES);
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    }
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    if (T0 == env->CP0_LLAddr) {
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        glue(stl, MEMSUFFIX)(T0, T1);
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        T0 = 1;
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    } else {
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        T0 = 0;
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    }
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    RETURN();
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}
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#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
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void glue(op_ld, MEMSUFFIX) (void)
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{
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    T0 = glue(ldq, MEMSUFFIX)(T0);
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    RETURN();
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}
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void glue(op_sd, MEMSUFFIX) (void)
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{
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    glue(stq, MEMSUFFIX)(T0, T1);
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    RETURN();
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}
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/* "half" load and stores.  We must do the memory access inline,
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   or fault handling won't work.  */
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#ifdef TARGET_WORDS_BIGENDIAN
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#define GET_LMASK64(v) ((v) & 7)
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#else
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#define GET_LMASK64(v) (((v) & 7) ^ 7)
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#endif
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void glue(op_ldl, MEMSUFFIX) (void)
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{
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    uint64_t tmp;
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    tmp = glue(ldub, MEMSUFFIX)(T0);
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    T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);
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    if (GET_LMASK64(T0) <= 6) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 1));
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        T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);
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    }
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    if (GET_LMASK64(T0) <= 5) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 2));
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        T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);
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    }
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    if (GET_LMASK64(T0) <= 4) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 3));
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        T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);
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    }
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    if (GET_LMASK64(T0) <= 3) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 4));
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        T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);
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    }
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    if (GET_LMASK64(T0) <= 2) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 5));
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        T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);
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    }
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    if (GET_LMASK64(T0) <= 1) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 6));
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        T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp << 8);
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    }
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    if (GET_LMASK64(T0) == 0) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, 7));
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        T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;
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    }
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    RETURN();
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}
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void glue(op_ldr, MEMSUFFIX) (void)
261
{
262
    uint64_t tmp;
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264
    tmp = glue(ldub, MEMSUFFIX)(T0);
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    T1 = (T1 & 0xFFFFFFFFFFFFFF00ULL) | tmp;
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    if (GET_LMASK64(T0) >= 1) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -1));
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        T1 = (T1 & 0xFFFFFFFFFFFF00FFULL) | (tmp  << 8);
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    }
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    if (GET_LMASK64(T0) >= 2) {
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        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -2));
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        T1 = (T1 & 0xFFFFFFFFFF00FFFFULL) | (tmp << 16);
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    }
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277
    if (GET_LMASK64(T0) >= 3) {
278
        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -3));
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        T1 = (T1 & 0xFFFFFFFF00FFFFFFULL) | (tmp << 24);
280
    }
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282
    if (GET_LMASK64(T0) >= 4) {
283
        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -4));
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        T1 = (T1 & 0xFFFFFF00FFFFFFFFULL) | (tmp << 32);
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    }
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    if (GET_LMASK64(T0) >= 5) {
288
        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -5));
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        T1 = (T1 & 0xFFFF00FFFFFFFFFFULL) | (tmp << 40);
290
    }
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292
    if (GET_LMASK64(T0) >= 6) {
293
        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -6));
294
        T1 = (T1 & 0xFF00FFFFFFFFFFFFULL) | (tmp << 48);
295
    }
296

    
297
    if (GET_LMASK64(T0) == 7) {
298
        tmp = glue(ldub, MEMSUFFIX)(GET_OFFSET(T0, -7));
299
        T1 = (T1 & 0x00FFFFFFFFFFFFFFULL) | (tmp << 56);
300
    }
301

    
302
    RETURN();
303
}
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305
void glue(op_sdl, MEMSUFFIX) (void)
306
{
307
    glue(stb, MEMSUFFIX)(T0, (uint8_t)(T1 >> 56));
308

    
309
    if (GET_LMASK64(T0) <= 6)
310
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 1), (uint8_t)(T1 >> 48));
311

    
312
    if (GET_LMASK64(T0) <= 5)
313
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 2), (uint8_t)(T1 >> 40));
314

    
315
    if (GET_LMASK64(T0) <= 4)
316
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 3), (uint8_t)(T1 >> 32));
317

    
318
    if (GET_LMASK64(T0) <= 3)
319
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 4), (uint8_t)(T1 >> 24));
320

    
321
    if (GET_LMASK64(T0) <= 2)
322
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 5), (uint8_t)(T1 >> 16));
323

    
324
    if (GET_LMASK64(T0) <= 1)
325
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 6), (uint8_t)(T1 >> 8));
326

    
327
    if (GET_LMASK64(T0) <= 0)
328
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, 7), (uint8_t)T1);
329

    
330
    RETURN();
331
}
332

    
333
void glue(op_sdr, MEMSUFFIX) (void)
334
{
335
    glue(stb, MEMSUFFIX)(T0, (uint8_t)T1);
336

    
337
    if (GET_LMASK64(T0) >= 1)
338
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -1), (uint8_t)(T1 >> 8));
339

    
340
    if (GET_LMASK64(T0) >= 2)
341
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -2), (uint8_t)(T1 >> 16));
342

    
343
    if (GET_LMASK64(T0) >= 3)
344
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -3), (uint8_t)(T1 >> 24));
345

    
346
    if (GET_LMASK64(T0) >= 4)
347
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -4), (uint8_t)(T1 >> 32));
348

    
349
    if (GET_LMASK64(T0) >= 5)
350
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -5), (uint8_t)(T1 >> 40));
351

    
352
    if (GET_LMASK64(T0) >= 6)
353
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -6), (uint8_t)(T1 >> 48));
354

    
355
    if (GET_LMASK64(T0) == 7)
356
        glue(stb, MEMSUFFIX)(GET_OFFSET(T0, -7), (uint8_t)(T1 >> 56));
357

    
358
    RETURN();
359
}
360

    
361
void glue(op_lld, MEMSUFFIX) (void)
362
{
363
    T1 = T0;
364
    T0 = glue(ldq, MEMSUFFIX)(T0);
365
    env->CP0_LLAddr = T1;
366
    RETURN();
367
}
368

    
369
void glue(op_scd, MEMSUFFIX) (void)
370
{
371
    CALL_FROM_TB0(dump_sc);
372
    if (T0 & 0x7) {
373
        env->CP0_BadVAddr = T0;
374
        CALL_FROM_TB1(do_raise_exception, EXCP_AdES);
375
    }
376
    if (T0 == env->CP0_LLAddr) {
377
        glue(stq, MEMSUFFIX)(T0, T1);
378
        T0 = 1;
379
    } else {
380
        T0 = 0;
381
    }
382
    RETURN();
383
}
384
#endif /* TARGET_MIPSN32 || TARGET_MIPS64 */
385

    
386
void glue(op_lwc1, MEMSUFFIX) (void)
387
{
388
    WT0 = glue(ldl, MEMSUFFIX)(T0);
389
    RETURN();
390
}
391
void glue(op_swc1, MEMSUFFIX) (void)
392
{
393
    glue(stl, MEMSUFFIX)(T0, WT0);
394
    RETURN();
395
}
396
void glue(op_ldc1, MEMSUFFIX) (void)
397
{
398
    DT0 = glue(ldq, MEMSUFFIX)(T0);
399
    RETURN();
400
}
401
void glue(op_sdc1, MEMSUFFIX) (void)
402
{
403
    glue(stq, MEMSUFFIX)(T0, DT0);
404
    RETURN();
405
}
406
void glue(op_luxc1, MEMSUFFIX) (void)
407
{
408
    DT0 = glue(ldq, MEMSUFFIX)(T0 & ~0x7);
409
    RETURN();
410
}
411
void glue(op_suxc1, MEMSUFFIX) (void)
412
{
413
    glue(stq, MEMSUFFIX)(T0 & ~0x7, DT0);
414
    RETURN();
415
}