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/*
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 *  i386 micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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/* XXX: must use this define because the soft mmu macros have huge
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   register constraints so they cannot be used in any C code. gcc 3.3
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   does not seem to be able to handle some constraints in rol
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   operations, so we disable it. */
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#if !(__GNUC__ == 3 && __GNUC_MINOR__ == 3)
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#define ASM_SOFTMMU
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#endif
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#include "exec.h"
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/* n must be a constant to be efficient */
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static inline int lshift(int x, int n)
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{
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    if (n >= 0)
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        return x << n;
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    else
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        return x >> (-n);
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}
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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/* operations with flags */
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/* update flags with T0 and T1 (add/sub case) */
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void OPPROTO op_update2_cc(void)
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{
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    CC_SRC = T1;
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    CC_DST = T0;
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}
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/* update flags with T0 (logic operation case) */
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void OPPROTO op_update1_cc(void)
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{
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    CC_DST = T0;
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}
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void OPPROTO op_update_neg_cc(void)
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{
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    CC_SRC = -T0;
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    CC_DST = T0;
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}
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void OPPROTO op_cmpl_T0_T1_cc(void)
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{
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    CC_SRC = T1;
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    CC_DST = T0 - T1;
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}
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void OPPROTO op_update_inc_cc(void)
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{
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    CC_SRC = cc_table[CC_OP].compute_c();
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    CC_DST = T0;
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}
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void OPPROTO op_testl_T0_T1_cc(void)
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{
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    CC_DST = T0 & T1;
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}
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/* operations without flags */
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void OPPROTO op_addl_T0_T1(void)
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{
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    T0 += T1;
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}
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void OPPROTO op_orl_T0_T1(void)
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{
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    T0 |= T1;
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}
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void OPPROTO op_andl_T0_T1(void)
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{
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    T0 &= T1;
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}
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void OPPROTO op_subl_T0_T1(void)
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{
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    T0 -= T1;
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}
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void OPPROTO op_xorl_T0_T1(void)
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{
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    T0 ^= T1;
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}
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void OPPROTO op_negl_T0(void)
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{
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    T0 = -T0;
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}
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void OPPROTO op_incl_T0(void)
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{
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    T0++;
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}
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void OPPROTO op_decl_T0(void)
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{
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    T0--;
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}
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void OPPROTO op_notl_T0(void)
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{
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    T0 = ~T0;
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}
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void OPPROTO op_bswapl_T0(void)
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{
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    T0 = bswap32(T0);
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}
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/* multiply/divide */
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/* XXX: add eflags optimizations */
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/* XXX: add non P4 style flags */
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void OPPROTO op_mulb_AL_T0(void)
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{
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    unsigned int res;
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    res = (uint8_t)EAX * (uint8_t)T0;
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    EAX = (EAX & 0xffff0000) | res;
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    CC_DST = res;
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    CC_SRC = (res & 0xff00);
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}
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void OPPROTO op_imulb_AL_T0(void)
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{
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    int res;
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    res = (int8_t)EAX * (int8_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int8_t)res);
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}
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void OPPROTO op_mulw_AX_T0(void)
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{
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    unsigned int res;
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    res = (uint16_t)EAX * (uint16_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = res >> 16;
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}
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void OPPROTO op_imulw_AX_T0(void)
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{
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    int res;
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    res = (int16_t)EAX * (int16_t)T0;
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    EAX = (EAX & 0xffff0000) | (res & 0xffff);
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    EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_mull_EAX_T0(void)
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{
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    uint64_t res;
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    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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    EAX = res;
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    EDX = res >> 32;
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    CC_DST = res;
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    CC_SRC = res >> 32;
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}
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void OPPROTO op_imull_EAX_T0(void)
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{
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    int64_t res;
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    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
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    EAX = res;
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    EDX = res >> 32;
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    CC_DST = res;
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    CC_SRC = (res != (int32_t)res);
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}
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void OPPROTO op_imulw_T0_T1(void)
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{
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    int res;
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    res = (int16_t)T0 * (int16_t)T1;
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    T0 = res;
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_imull_T0_T1(void)
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{
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    int64_t res;
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    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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    T0 = res;
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    CC_DST = res;
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    CC_SRC = (res != (int32_t)res);
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}
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/* division, flags are undefined */
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/* XXX: add exceptions for overflow */
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void OPPROTO op_divb_AL_T0(void)
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{
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    unsigned int num, den, q, r;
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    num = (EAX & 0xffff);
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    den = (T0 & 0xff);
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xff;
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    r = (num % den) & 0xff;
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    EAX = (EAX & 0xffff0000) | (r << 8) | q;
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}
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void OPPROTO op_idivb_AL_T0(void)
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{
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    int num, den, q, r;
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    num = (int16_t)EAX;
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    den = (int8_t)T0;
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xff;
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    r = (num % den) & 0xff;
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    EAX = (EAX & 0xffff0000) | (r << 8) | q;
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}
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void OPPROTO op_divw_AX_T0(void)
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{
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    unsigned int num, den, q, r;
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    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
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    den = (T0 & 0xffff);
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xffff;
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    r = (num % den) & 0xffff;
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    EAX = (EAX & 0xffff0000) | q;
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    EDX = (EDX & 0xffff0000) | r;
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}
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void OPPROTO op_idivw_AX_T0(void)
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{
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    int num, den, q, r;
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    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
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    den = (int16_t)T0;
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    if (den == 0) {
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        EIP = PARAM1;
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        raise_exception(EXCP00_DIVZ);
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    }
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    q = (num / den) & 0xffff;
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    r = (num % den) & 0xffff;
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    EAX = (EAX & 0xffff0000) | q;
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    EDX = (EDX & 0xffff0000) | r;
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}
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void OPPROTO op_divl_EAX_T0(void)
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{
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    helper_divl_EAX_T0(PARAM1);
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}
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void OPPROTO op_idivl_EAX_T0(void)
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{
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    helper_idivl_EAX_T0(PARAM1);
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}
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/* constant load & misc op */
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void OPPROTO op_movl_T0_im(void)
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{
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    T0 = PARAM1;
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}
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void OPPROTO op_addl_T0_im(void)
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{
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    T0 += PARAM1;
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}
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void OPPROTO op_andl_T0_ffff(void)
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{
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    T0 = T0 & 0xffff;
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}
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void OPPROTO op_andl_T0_im(void)
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{
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    T0 = T0 & PARAM1;
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}
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void OPPROTO op_movl_T0_T1(void)
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{
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    T0 = T1;
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}
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void OPPROTO op_movl_T1_im(void)
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{
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    T1 = PARAM1;
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}
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void OPPROTO op_addl_T1_im(void)
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{
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    T1 += PARAM1;
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}
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void OPPROTO op_movl_T1_A0(void)
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{
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    T1 = A0;
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}
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void OPPROTO op_movl_A0_im(void)
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{
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    A0 = PARAM1;
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}
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void OPPROTO op_addl_A0_im(void)
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{
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    A0 += PARAM1;
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}
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void OPPROTO op_addl_A0_AL(void)
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{
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    A0 += (EAX & 0xff);
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}
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void OPPROTO op_andl_A0_ffff(void)
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{
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    A0 = A0 & 0xffff;
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}
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/* memory access */
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#define MEMSUFFIX _raw
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#include "ops_mem.h"
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _kernel
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#include "ops_mem.h"
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#define MEMSUFFIX _user
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#include "ops_mem.h"
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#endif
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/* used for bit operations */
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void OPPROTO op_add_bitw_A0_T1(void)
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{
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    A0 += ((int16_t)T1 >> 4) << 1;
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}
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void OPPROTO op_add_bitl_A0_T1(void)
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{
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    A0 += ((int32_t)T1 >> 5) << 2;
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}
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/* indirect jump */
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void OPPROTO op_jmp_T0(void)
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{
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    EIP = T0;
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}
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void OPPROTO op_jmp_im(void)
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{
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    EIP = PARAM1;
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}
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void OPPROTO op_hlt(void)
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{
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    env->exception_index = EXCP_HLT;
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    cpu_loop_exit();
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}
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void OPPROTO op_debug(void)
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{
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    env->exception_index = EXCP_DEBUG;
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    cpu_loop_exit();
444 2c0262af bellard
}
445 2c0262af bellard
446 2c0262af bellard
void OPPROTO op_raise_interrupt(void)
447 2c0262af bellard
{
448 2c0262af bellard
    int intno;
449 2c0262af bellard
    unsigned int next_eip;
450 2c0262af bellard
    intno = PARAM1;
451 2c0262af bellard
    next_eip = PARAM2;
452 2c0262af bellard
    raise_interrupt(intno, 1, 0, next_eip);
453 2c0262af bellard
}
454 2c0262af bellard
455 2c0262af bellard
void OPPROTO op_raise_exception(void)
456 2c0262af bellard
{
457 2c0262af bellard
    int exception_index;
458 2c0262af bellard
    exception_index = PARAM1;
459 2c0262af bellard
    raise_exception(exception_index);
460 2c0262af bellard
}
461 2c0262af bellard
462 2c0262af bellard
void OPPROTO op_into(void)
463 2c0262af bellard
{
464 2c0262af bellard
    int eflags;
465 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
466 2c0262af bellard
    if (eflags & CC_O) {
467 2c0262af bellard
        raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
468 2c0262af bellard
    }
469 2c0262af bellard
    FORCE_RET();
470 2c0262af bellard
}
471 2c0262af bellard
472 2c0262af bellard
void OPPROTO op_cli(void)
473 2c0262af bellard
{
474 2c0262af bellard
    env->eflags &= ~IF_MASK;
475 2c0262af bellard
}
476 2c0262af bellard
477 2c0262af bellard
void OPPROTO op_sti(void)
478 2c0262af bellard
{
479 2c0262af bellard
    env->eflags |= IF_MASK;
480 2c0262af bellard
}
481 2c0262af bellard
482 2c0262af bellard
void OPPROTO op_set_inhibit_irq(void)
483 2c0262af bellard
{
484 2c0262af bellard
    env->hflags |= HF_INHIBIT_IRQ_MASK;
485 2c0262af bellard
}
486 2c0262af bellard
487 2c0262af bellard
void OPPROTO op_reset_inhibit_irq(void)
488 2c0262af bellard
{
489 2c0262af bellard
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
490 2c0262af bellard
}
491 2c0262af bellard
492 2c0262af bellard
#if 0
493 2c0262af bellard
/* vm86plus instructions */
494 2c0262af bellard
void OPPROTO op_cli_vm(void)
495 2c0262af bellard
{
496 2c0262af bellard
    env->eflags &= ~VIF_MASK;
497 2c0262af bellard
}
498 2c0262af bellard

499 2c0262af bellard
void OPPROTO op_sti_vm(void)
500 2c0262af bellard
{
501 2c0262af bellard
    env->eflags |= VIF_MASK;
502 2c0262af bellard
    if (env->eflags & VIP_MASK) {
503 2c0262af bellard
        EIP = PARAM1;
504 2c0262af bellard
        raise_exception(EXCP0D_GPF);
505 2c0262af bellard
    }
506 2c0262af bellard
    FORCE_RET();
507 2c0262af bellard
}
508 2c0262af bellard
#endif
509 2c0262af bellard
510 2c0262af bellard
void OPPROTO op_boundw(void)
511 2c0262af bellard
{
512 2c0262af bellard
    int low, high, v;
513 2c0262af bellard
    low = ldsw((uint8_t *)A0);
514 2c0262af bellard
    high = ldsw((uint8_t *)A0 + 2);
515 2c0262af bellard
    v = (int16_t)T0;
516 2c0262af bellard
    if (v < low || v > high) {
517 2c0262af bellard
        EIP = PARAM1;
518 2c0262af bellard
        raise_exception(EXCP05_BOUND);
519 2c0262af bellard
    }
520 2c0262af bellard
    FORCE_RET();
521 2c0262af bellard
}
522 2c0262af bellard
523 2c0262af bellard
void OPPROTO op_boundl(void)
524 2c0262af bellard
{
525 2c0262af bellard
    int low, high, v;
526 2c0262af bellard
    low = ldl((uint8_t *)A0);
527 2c0262af bellard
    high = ldl((uint8_t *)A0 + 4);
528 2c0262af bellard
    v = T0;
529 2c0262af bellard
    if (v < low || v > high) {
530 2c0262af bellard
        EIP = PARAM1;
531 2c0262af bellard
        raise_exception(EXCP05_BOUND);
532 2c0262af bellard
    }
533 2c0262af bellard
    FORCE_RET();
534 2c0262af bellard
}
535 2c0262af bellard
536 2c0262af bellard
void OPPROTO op_cmpxchg8b(void)
537 2c0262af bellard
{
538 2c0262af bellard
    helper_cmpxchg8b();
539 2c0262af bellard
}
540 2c0262af bellard
541 2c0262af bellard
void OPPROTO op_jmp(void)
542 2c0262af bellard
{
543 2c0262af bellard
    JUMP_TB(op_jmp, PARAM1, 0, PARAM2);
544 2c0262af bellard
}
545 2c0262af bellard
546 2c0262af bellard
void OPPROTO op_movl_T0_0(void)
547 2c0262af bellard
{
548 2c0262af bellard
    T0 = 0;
549 2c0262af bellard
}
550 2c0262af bellard
551 2c0262af bellard
void OPPROTO op_exit_tb(void)
552 2c0262af bellard
{
553 2c0262af bellard
    EXIT_TB();
554 2c0262af bellard
}
555 2c0262af bellard
556 2c0262af bellard
/* multiple size ops */
557 2c0262af bellard
558 2c0262af bellard
#define ldul ldl
559 2c0262af bellard
560 2c0262af bellard
#define SHIFT 0
561 2c0262af bellard
#include "ops_template.h"
562 2c0262af bellard
#undef SHIFT
563 2c0262af bellard
564 2c0262af bellard
#define SHIFT 1
565 2c0262af bellard
#include "ops_template.h"
566 2c0262af bellard
#undef SHIFT
567 2c0262af bellard
568 2c0262af bellard
#define SHIFT 2
569 2c0262af bellard
#include "ops_template.h"
570 2c0262af bellard
#undef SHIFT
571 2c0262af bellard
572 2c0262af bellard
/* sign extend */
573 2c0262af bellard
574 2c0262af bellard
void OPPROTO op_movsbl_T0_T0(void)
575 2c0262af bellard
{
576 2c0262af bellard
    T0 = (int8_t)T0;
577 2c0262af bellard
}
578 2c0262af bellard
579 2c0262af bellard
void OPPROTO op_movzbl_T0_T0(void)
580 2c0262af bellard
{
581 2c0262af bellard
    T0 = (uint8_t)T0;
582 2c0262af bellard
}
583 2c0262af bellard
584 2c0262af bellard
void OPPROTO op_movswl_T0_T0(void)
585 2c0262af bellard
{
586 2c0262af bellard
    T0 = (int16_t)T0;
587 2c0262af bellard
}
588 2c0262af bellard
589 2c0262af bellard
void OPPROTO op_movzwl_T0_T0(void)
590 2c0262af bellard
{
591 2c0262af bellard
    T0 = (uint16_t)T0;
592 2c0262af bellard
}
593 2c0262af bellard
594 2c0262af bellard
void OPPROTO op_movswl_EAX_AX(void)
595 2c0262af bellard
{
596 2c0262af bellard
    EAX = (int16_t)EAX;
597 2c0262af bellard
}
598 2c0262af bellard
599 2c0262af bellard
void OPPROTO op_movsbw_AX_AL(void)
600 2c0262af bellard
{
601 2c0262af bellard
    EAX = (EAX & 0xffff0000) | ((int8_t)EAX & 0xffff);
602 2c0262af bellard
}
603 2c0262af bellard
604 2c0262af bellard
void OPPROTO op_movslq_EDX_EAX(void)
605 2c0262af bellard
{
606 2c0262af bellard
    EDX = (int32_t)EAX >> 31;
607 2c0262af bellard
}
608 2c0262af bellard
609 2c0262af bellard
void OPPROTO op_movswl_DX_AX(void)
610 2c0262af bellard
{
611 2c0262af bellard
    EDX = (EDX & 0xffff0000) | (((int16_t)EAX >> 15) & 0xffff);
612 2c0262af bellard
}
613 2c0262af bellard
614 2c0262af bellard
/* string ops helpers */
615 2c0262af bellard
616 2c0262af bellard
void OPPROTO op_addl_ESI_T0(void)
617 2c0262af bellard
{
618 2c0262af bellard
    ESI += T0;
619 2c0262af bellard
}
620 2c0262af bellard
621 2c0262af bellard
void OPPROTO op_addw_ESI_T0(void)
622 2c0262af bellard
{
623 2c0262af bellard
    ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
624 2c0262af bellard
}
625 2c0262af bellard
626 2c0262af bellard
void OPPROTO op_addl_EDI_T0(void)
627 2c0262af bellard
{
628 2c0262af bellard
    EDI += T0;
629 2c0262af bellard
}
630 2c0262af bellard
631 2c0262af bellard
void OPPROTO op_addw_EDI_T0(void)
632 2c0262af bellard
{
633 2c0262af bellard
    EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
634 2c0262af bellard
}
635 2c0262af bellard
636 2c0262af bellard
void OPPROTO op_decl_ECX(void)
637 2c0262af bellard
{
638 2c0262af bellard
    ECX--;
639 2c0262af bellard
}
640 2c0262af bellard
641 2c0262af bellard
void OPPROTO op_decw_ECX(void)
642 2c0262af bellard
{
643 2c0262af bellard
    ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
644 2c0262af bellard
}
645 2c0262af bellard
646 f68dd770 bellard
/* push/pop utils */
647 2c0262af bellard
648 f68dd770 bellard
void op_addl_A0_SS(void)
649 2c0262af bellard
{
650 f68dd770 bellard
    A0 += (long)env->segs[R_SS].base;
651 2c0262af bellard
}
652 2c0262af bellard
653 f68dd770 bellard
void op_subl_A0_2(void)
654 2c0262af bellard
{
655 f68dd770 bellard
    A0 -= 2;
656 2c0262af bellard
}
657 2c0262af bellard
658 f68dd770 bellard
void op_subl_A0_4(void)
659 2c0262af bellard
{
660 f68dd770 bellard
    A0 -= 4;
661 2c0262af bellard
}
662 2c0262af bellard
663 2c0262af bellard
void op_addl_ESP_4(void)
664 2c0262af bellard
{
665 2c0262af bellard
    ESP += 4;
666 2c0262af bellard
}
667 2c0262af bellard
668 2c0262af bellard
void op_addl_ESP_2(void)
669 2c0262af bellard
{
670 2c0262af bellard
    ESP += 2;
671 2c0262af bellard
}
672 2c0262af bellard
673 2c0262af bellard
void op_addw_ESP_4(void)
674 2c0262af bellard
{
675 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
676 2c0262af bellard
}
677 2c0262af bellard
678 2c0262af bellard
void op_addw_ESP_2(void)
679 2c0262af bellard
{
680 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
681 2c0262af bellard
}
682 2c0262af bellard
683 2c0262af bellard
void op_addl_ESP_im(void)
684 2c0262af bellard
{
685 2c0262af bellard
    ESP += PARAM1;
686 2c0262af bellard
}
687 2c0262af bellard
688 2c0262af bellard
void op_addw_ESP_im(void)
689 2c0262af bellard
{
690 2c0262af bellard
    ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
691 2c0262af bellard
}
692 2c0262af bellard
693 2c0262af bellard
void OPPROTO op_rdtsc(void)
694 2c0262af bellard
{
695 2c0262af bellard
    helper_rdtsc();
696 2c0262af bellard
}
697 2c0262af bellard
698 2c0262af bellard
void OPPROTO op_cpuid(void)
699 2c0262af bellard
{
700 2c0262af bellard
    helper_cpuid();
701 2c0262af bellard
}
702 2c0262af bellard
703 2c0262af bellard
void OPPROTO op_rdmsr(void)
704 2c0262af bellard
{
705 2c0262af bellard
    helper_rdmsr();
706 2c0262af bellard
}
707 2c0262af bellard
708 2c0262af bellard
void OPPROTO op_wrmsr(void)
709 2c0262af bellard
{
710 2c0262af bellard
    helper_wrmsr();
711 2c0262af bellard
}
712 2c0262af bellard
713 2c0262af bellard
/* bcd */
714 2c0262af bellard
715 2c0262af bellard
/* XXX: exception */
716 2c0262af bellard
void OPPROTO op_aam(void)
717 2c0262af bellard
{
718 2c0262af bellard
    int base = PARAM1;
719 2c0262af bellard
    int al, ah;
720 2c0262af bellard
    al = EAX & 0xff;
721 2c0262af bellard
    ah = al / base;
722 2c0262af bellard
    al = al % base;
723 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
724 2c0262af bellard
    CC_DST = al;
725 2c0262af bellard
}
726 2c0262af bellard
727 2c0262af bellard
void OPPROTO op_aad(void)
728 2c0262af bellard
{
729 2c0262af bellard
    int base = PARAM1;
730 2c0262af bellard
    int al, ah;
731 2c0262af bellard
    al = EAX & 0xff;
732 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
733 2c0262af bellard
    al = ((ah * base) + al) & 0xff;
734 2c0262af bellard
    EAX = (EAX & ~0xffff) | al;
735 2c0262af bellard
    CC_DST = al;
736 2c0262af bellard
}
737 2c0262af bellard
738 2c0262af bellard
void OPPROTO op_aaa(void)
739 2c0262af bellard
{
740 2c0262af bellard
    int icarry;
741 2c0262af bellard
    int al, ah, af;
742 2c0262af bellard
    int eflags;
743 2c0262af bellard
744 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
745 2c0262af bellard
    af = eflags & CC_A;
746 2c0262af bellard
    al = EAX & 0xff;
747 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
748 2c0262af bellard
749 2c0262af bellard
    icarry = (al > 0xf9);
750 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
751 2c0262af bellard
        al = (al + 6) & 0x0f;
752 2c0262af bellard
        ah = (ah + 1 + icarry) & 0xff;
753 2c0262af bellard
        eflags |= CC_C | CC_A;
754 2c0262af bellard
    } else {
755 2c0262af bellard
        eflags &= ~(CC_C | CC_A);
756 2c0262af bellard
        al &= 0x0f;
757 2c0262af bellard
    }
758 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
759 2c0262af bellard
    CC_SRC = eflags;
760 2c0262af bellard
}
761 2c0262af bellard
762 2c0262af bellard
void OPPROTO op_aas(void)
763 2c0262af bellard
{
764 2c0262af bellard
    int icarry;
765 2c0262af bellard
    int al, ah, af;
766 2c0262af bellard
    int eflags;
767 2c0262af bellard
768 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
769 2c0262af bellard
    af = eflags & CC_A;
770 2c0262af bellard
    al = EAX & 0xff;
771 2c0262af bellard
    ah = (EAX >> 8) & 0xff;
772 2c0262af bellard
773 2c0262af bellard
    icarry = (al < 6);
774 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
775 2c0262af bellard
        al = (al - 6) & 0x0f;
776 2c0262af bellard
        ah = (ah - 1 - icarry) & 0xff;
777 2c0262af bellard
        eflags |= CC_C | CC_A;
778 2c0262af bellard
    } else {
779 2c0262af bellard
        eflags &= ~(CC_C | CC_A);
780 2c0262af bellard
        al &= 0x0f;
781 2c0262af bellard
    }
782 2c0262af bellard
    EAX = (EAX & ~0xffff) | al | (ah << 8);
783 2c0262af bellard
    CC_SRC = eflags;
784 2c0262af bellard
}
785 2c0262af bellard
786 2c0262af bellard
void OPPROTO op_daa(void)
787 2c0262af bellard
{
788 2c0262af bellard
    int al, af, cf;
789 2c0262af bellard
    int eflags;
790 2c0262af bellard
791 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
792 2c0262af bellard
    cf = eflags & CC_C;
793 2c0262af bellard
    af = eflags & CC_A;
794 2c0262af bellard
    al = EAX & 0xff;
795 2c0262af bellard
796 2c0262af bellard
    eflags = 0;
797 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
798 2c0262af bellard
        al = (al + 6) & 0xff;
799 2c0262af bellard
        eflags |= CC_A;
800 2c0262af bellard
    }
801 2c0262af bellard
    if ((al > 0x9f) || cf) {
802 2c0262af bellard
        al = (al + 0x60) & 0xff;
803 2c0262af bellard
        eflags |= CC_C;
804 2c0262af bellard
    }
805 2c0262af bellard
    EAX = (EAX & ~0xff) | al;
806 2c0262af bellard
    /* well, speed is not an issue here, so we compute the flags by hand */
807 2c0262af bellard
    eflags |= (al == 0) << 6; /* zf */
808 2c0262af bellard
    eflags |= parity_table[al]; /* pf */
809 2c0262af bellard
    eflags |= (al & 0x80); /* sf */
810 2c0262af bellard
    CC_SRC = eflags;
811 2c0262af bellard
}
812 2c0262af bellard
813 2c0262af bellard
void OPPROTO op_das(void)
814 2c0262af bellard
{
815 2c0262af bellard
    int al, al1, af, cf;
816 2c0262af bellard
    int eflags;
817 2c0262af bellard
818 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
819 2c0262af bellard
    cf = eflags & CC_C;
820 2c0262af bellard
    af = eflags & CC_A;
821 2c0262af bellard
    al = EAX & 0xff;
822 2c0262af bellard
823 2c0262af bellard
    eflags = 0;
824 2c0262af bellard
    al1 = al;
825 2c0262af bellard
    if (((al & 0x0f) > 9 ) || af) {
826 2c0262af bellard
        eflags |= CC_A;
827 2c0262af bellard
        if (al < 6 || cf)
828 2c0262af bellard
            eflags |= CC_C;
829 2c0262af bellard
        al = (al - 6) & 0xff;
830 2c0262af bellard
    }
831 2c0262af bellard
    if ((al1 > 0x99) || cf) {
832 2c0262af bellard
        al = (al - 0x60) & 0xff;
833 2c0262af bellard
        eflags |= CC_C;
834 2c0262af bellard
    }
835 2c0262af bellard
    EAX = (EAX & ~0xff) | al;
836 2c0262af bellard
    /* well, speed is not an issue here, so we compute the flags by hand */
837 2c0262af bellard
    eflags |= (al == 0) << 6; /* zf */
838 2c0262af bellard
    eflags |= parity_table[al]; /* pf */
839 2c0262af bellard
    eflags |= (al & 0x80); /* sf */
840 2c0262af bellard
    CC_SRC = eflags;
841 2c0262af bellard
}
842 2c0262af bellard
843 2c0262af bellard
/* segment handling */
844 2c0262af bellard
845 2c0262af bellard
/* never use it with R_CS */
846 2c0262af bellard
void OPPROTO op_movl_seg_T0(void)
847 2c0262af bellard
{
848 3415a4dd bellard
    load_seg(PARAM1, T0);
849 2c0262af bellard
}
850 2c0262af bellard
851 2c0262af bellard
/* faster VM86 version */
852 2c0262af bellard
void OPPROTO op_movl_seg_T0_vm(void)
853 2c0262af bellard
{
854 2c0262af bellard
    int selector;
855 2c0262af bellard
    SegmentCache *sc;
856 2c0262af bellard
    
857 2c0262af bellard
    selector = T0 & 0xffff;
858 2c0262af bellard
    /* env->segs[] access */
859 2c0262af bellard
    sc = (SegmentCache *)((char *)env + PARAM1);
860 2c0262af bellard
    sc->selector = selector;
861 2c0262af bellard
    sc->base = (void *)(selector << 4);
862 2c0262af bellard
}
863 2c0262af bellard
864 2c0262af bellard
void OPPROTO op_movl_T0_seg(void)
865 2c0262af bellard
{
866 2c0262af bellard
    T0 = env->segs[PARAM1].selector;
867 2c0262af bellard
}
868 2c0262af bellard
869 2c0262af bellard
void OPPROTO op_movl_A0_seg(void)
870 2c0262af bellard
{
871 2c0262af bellard
    A0 = *(unsigned long *)((char *)env + PARAM1);
872 2c0262af bellard
}
873 2c0262af bellard
874 2c0262af bellard
void OPPROTO op_addl_A0_seg(void)
875 2c0262af bellard
{
876 2c0262af bellard
    A0 += *(unsigned long *)((char *)env + PARAM1);
877 2c0262af bellard
}
878 2c0262af bellard
879 2c0262af bellard
void OPPROTO op_lsl(void)
880 2c0262af bellard
{
881 2c0262af bellard
    helper_lsl();
882 2c0262af bellard
}
883 2c0262af bellard
884 2c0262af bellard
void OPPROTO op_lar(void)
885 2c0262af bellard
{
886 2c0262af bellard
    helper_lar();
887 2c0262af bellard
}
888 2c0262af bellard
889 3ab493de bellard
void OPPROTO op_verr(void)
890 3ab493de bellard
{
891 3ab493de bellard
    helper_verr();
892 3ab493de bellard
}
893 3ab493de bellard
894 3ab493de bellard
void OPPROTO op_verw(void)
895 3ab493de bellard
{
896 3ab493de bellard
    helper_verw();
897 3ab493de bellard
}
898 3ab493de bellard
899 3ab493de bellard
void OPPROTO op_arpl(void)
900 3ab493de bellard
{
901 3ab493de bellard
    if ((T0 & 3) < (T1 & 3)) {
902 3ab493de bellard
        /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
903 3ab493de bellard
        T0 = (T0 & ~3) | (T1 & 3);
904 3ab493de bellard
        T1 = CC_Z;
905 3ab493de bellard
   } else {
906 3ab493de bellard
        T1 = 0;
907 3ab493de bellard
    }
908 3ab493de bellard
    FORCE_RET();
909 3ab493de bellard
}
910 3ab493de bellard
            
911 3ab493de bellard
void OPPROTO op_arpl_update(void)
912 3ab493de bellard
{
913 3ab493de bellard
    int eflags;
914 3ab493de bellard
    eflags = cc_table[CC_OP].compute_all();
915 3ab493de bellard
    CC_SRC = (eflags & ~CC_Z) | T1;
916 3ab493de bellard
}
917 3ab493de bellard
    
918 2c0262af bellard
/* T0: segment, T1:eip */
919 2c0262af bellard
void OPPROTO op_ljmp_protected_T0_T1(void)
920 2c0262af bellard
{
921 08cea4ee bellard
    helper_ljmp_protected_T0_T1(PARAM1);
922 2c0262af bellard
}
923 2c0262af bellard
924 2c0262af bellard
void OPPROTO op_lcall_real_T0_T1(void)
925 2c0262af bellard
{
926 2c0262af bellard
    helper_lcall_real_T0_T1(PARAM1, PARAM2);
927 2c0262af bellard
}
928 2c0262af bellard
929 2c0262af bellard
void OPPROTO op_lcall_protected_T0_T1(void)
930 2c0262af bellard
{
931 2c0262af bellard
    helper_lcall_protected_T0_T1(PARAM1, PARAM2);
932 2c0262af bellard
}
933 2c0262af bellard
934 2c0262af bellard
void OPPROTO op_iret_real(void)
935 2c0262af bellard
{
936 2c0262af bellard
    helper_iret_real(PARAM1);
937 2c0262af bellard
}
938 2c0262af bellard
939 2c0262af bellard
void OPPROTO op_iret_protected(void)
940 2c0262af bellard
{
941 08cea4ee bellard
    helper_iret_protected(PARAM1, PARAM2);
942 2c0262af bellard
}
943 2c0262af bellard
944 2c0262af bellard
void OPPROTO op_lret_protected(void)
945 2c0262af bellard
{
946 2c0262af bellard
    helper_lret_protected(PARAM1, PARAM2);
947 2c0262af bellard
}
948 2c0262af bellard
949 2c0262af bellard
void OPPROTO op_lldt_T0(void)
950 2c0262af bellard
{
951 2c0262af bellard
    helper_lldt_T0();
952 2c0262af bellard
}
953 2c0262af bellard
954 2c0262af bellard
void OPPROTO op_ltr_T0(void)
955 2c0262af bellard
{
956 2c0262af bellard
    helper_ltr_T0();
957 2c0262af bellard
}
958 2c0262af bellard
959 2c0262af bellard
/* CR registers access */
960 2c0262af bellard
void OPPROTO op_movl_crN_T0(void)
961 2c0262af bellard
{
962 2c0262af bellard
    helper_movl_crN_T0(PARAM1);
963 2c0262af bellard
}
964 2c0262af bellard
965 2c0262af bellard
/* DR registers access */
966 2c0262af bellard
void OPPROTO op_movl_drN_T0(void)
967 2c0262af bellard
{
968 2c0262af bellard
    helper_movl_drN_T0(PARAM1);
969 2c0262af bellard
}
970 2c0262af bellard
971 2c0262af bellard
void OPPROTO op_lmsw_T0(void)
972 2c0262af bellard
{
973 2c0262af bellard
    /* only 4 lower bits of CR0 are modified */
974 2c0262af bellard
    T0 = (env->cr[0] & ~0xf) | (T0 & 0xf);
975 2c0262af bellard
    helper_movl_crN_T0(0);
976 2c0262af bellard
}
977 2c0262af bellard
978 2c0262af bellard
void OPPROTO op_invlpg_A0(void)
979 2c0262af bellard
{
980 2c0262af bellard
    helper_invlpg(A0);
981 2c0262af bellard
}
982 2c0262af bellard
983 2c0262af bellard
void OPPROTO op_movl_T0_env(void)
984 2c0262af bellard
{
985 2c0262af bellard
    T0 = *(uint32_t *)((char *)env + PARAM1);
986 2c0262af bellard
}
987 2c0262af bellard
988 2c0262af bellard
void OPPROTO op_movl_env_T0(void)
989 2c0262af bellard
{
990 2c0262af bellard
    *(uint32_t *)((char *)env + PARAM1) = T0;
991 2c0262af bellard
}
992 2c0262af bellard
993 2c0262af bellard
void OPPROTO op_movl_env_T1(void)
994 2c0262af bellard
{
995 2c0262af bellard
    *(uint32_t *)((char *)env + PARAM1) = T1;
996 2c0262af bellard
}
997 2c0262af bellard
998 2c0262af bellard
void OPPROTO op_clts(void)
999 2c0262af bellard
{
1000 2c0262af bellard
    env->cr[0] &= ~CR0_TS_MASK;
1001 7eee2a50 bellard
    env->hflags &= ~HF_TS_MASK;
1002 2c0262af bellard
}
1003 2c0262af bellard
1004 2c0262af bellard
/* flags handling */
1005 2c0262af bellard
1006 2c0262af bellard
/* slow jumps cases : in order to avoid calling a function with a
1007 2c0262af bellard
   pointer (which can generate a stack frame on PowerPC), we use
1008 2c0262af bellard
   op_setcc to set T0 and then call op_jcc. */
1009 2c0262af bellard
void OPPROTO op_jcc(void)
1010 2c0262af bellard
{
1011 2c0262af bellard
    if (T0)
1012 2c0262af bellard
        JUMP_TB(op_jcc, PARAM1, 0, PARAM2);
1013 2c0262af bellard
    else
1014 2c0262af bellard
        JUMP_TB(op_jcc, PARAM1, 1, PARAM3);
1015 2c0262af bellard
    FORCE_RET();
1016 2c0262af bellard
}
1017 2c0262af bellard
1018 2c0262af bellard
void OPPROTO op_jcc_im(void)
1019 2c0262af bellard
{
1020 2c0262af bellard
    if (T0)
1021 2c0262af bellard
        EIP = PARAM1;
1022 2c0262af bellard
    else
1023 2c0262af bellard
        EIP = PARAM2;
1024 2c0262af bellard
    FORCE_RET();
1025 2c0262af bellard
}
1026 2c0262af bellard
1027 2c0262af bellard
/* slow set cases (compute x86 flags) */
1028 2c0262af bellard
void OPPROTO op_seto_T0_cc(void)
1029 2c0262af bellard
{
1030 2c0262af bellard
    int eflags;
1031 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1032 2c0262af bellard
    T0 = (eflags >> 11) & 1;
1033 2c0262af bellard
}
1034 2c0262af bellard
1035 2c0262af bellard
void OPPROTO op_setb_T0_cc(void)
1036 2c0262af bellard
{
1037 2c0262af bellard
    T0 = cc_table[CC_OP].compute_c();
1038 2c0262af bellard
}
1039 2c0262af bellard
1040 2c0262af bellard
void OPPROTO op_setz_T0_cc(void)
1041 2c0262af bellard
{
1042 2c0262af bellard
    int eflags;
1043 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1044 2c0262af bellard
    T0 = (eflags >> 6) & 1;
1045 2c0262af bellard
}
1046 2c0262af bellard
1047 2c0262af bellard
void OPPROTO op_setbe_T0_cc(void)
1048 2c0262af bellard
{
1049 2c0262af bellard
    int eflags;
1050 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1051 2c0262af bellard
    T0 = (eflags & (CC_Z | CC_C)) != 0;
1052 2c0262af bellard
}
1053 2c0262af bellard
1054 2c0262af bellard
void OPPROTO op_sets_T0_cc(void)
1055 2c0262af bellard
{
1056 2c0262af bellard
    int eflags;
1057 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1058 2c0262af bellard
    T0 = (eflags >> 7) & 1;
1059 2c0262af bellard
}
1060 2c0262af bellard
1061 2c0262af bellard
void OPPROTO op_setp_T0_cc(void)
1062 2c0262af bellard
{
1063 2c0262af bellard
    int eflags;
1064 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1065 2c0262af bellard
    T0 = (eflags >> 2) & 1;
1066 2c0262af bellard
}
1067 2c0262af bellard
1068 2c0262af bellard
void OPPROTO op_setl_T0_cc(void)
1069 2c0262af bellard
{
1070 2c0262af bellard
    int eflags;
1071 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1072 2c0262af bellard
    T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1073 2c0262af bellard
}
1074 2c0262af bellard
1075 2c0262af bellard
void OPPROTO op_setle_T0_cc(void)
1076 2c0262af bellard
{
1077 2c0262af bellard
    int eflags;
1078 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1079 2c0262af bellard
    T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1080 2c0262af bellard
}
1081 2c0262af bellard
1082 2c0262af bellard
void OPPROTO op_xor_T0_1(void)
1083 2c0262af bellard
{
1084 2c0262af bellard
    T0 ^= 1;
1085 2c0262af bellard
}
1086 2c0262af bellard
1087 2c0262af bellard
void OPPROTO op_set_cc_op(void)
1088 2c0262af bellard
{
1089 2c0262af bellard
    CC_OP = PARAM1;
1090 2c0262af bellard
}
1091 2c0262af bellard
1092 4136f33c bellard
/* XXX: clear VIF/VIP in all ops ? */
1093 2c0262af bellard
1094 2c0262af bellard
void OPPROTO op_movl_eflags_T0(void)
1095 2c0262af bellard
{
1096 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1097 2c0262af bellard
}
1098 2c0262af bellard
1099 2c0262af bellard
void OPPROTO op_movw_eflags_T0(void)
1100 2c0262af bellard
{
1101 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1102 4136f33c bellard
}
1103 4136f33c bellard
1104 4136f33c bellard
void OPPROTO op_movl_eflags_T0_io(void)
1105 4136f33c bellard
{
1106 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1107 4136f33c bellard
}
1108 4136f33c bellard
1109 4136f33c bellard
void OPPROTO op_movw_eflags_T0_io(void)
1110 4136f33c bellard
{
1111 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1112 2c0262af bellard
}
1113 2c0262af bellard
1114 2c0262af bellard
void OPPROTO op_movl_eflags_T0_cpl0(void)
1115 2c0262af bellard
{
1116 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1117 2c0262af bellard
}
1118 2c0262af bellard
1119 2c0262af bellard
void OPPROTO op_movw_eflags_T0_cpl0(void)
1120 2c0262af bellard
{
1121 4b7aba51 bellard
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1122 2c0262af bellard
}
1123 2c0262af bellard
1124 2c0262af bellard
#if 0
1125 2c0262af bellard
/* vm86plus version */
1126 2c0262af bellard
void OPPROTO op_movw_eflags_T0_vm(void)
1127 2c0262af bellard
{
1128 2c0262af bellard
    int eflags;
1129 2c0262af bellard
    eflags = T0;
1130 2c0262af bellard
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1131 2c0262af bellard
    DF = 1 - (2 * ((eflags >> 10) & 1));
1132 2c0262af bellard
    /* we also update some system flags as in user mode */
1133 2c0262af bellard
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1134 2c0262af bellard
        (eflags & FL_UPDATE_MASK16);
1135 2c0262af bellard
    if (eflags & IF_MASK) {
1136 2c0262af bellard
        env->eflags |= VIF_MASK;
1137 2c0262af bellard
        if (env->eflags & VIP_MASK) {
1138 2c0262af bellard
            EIP = PARAM1;
1139 2c0262af bellard
            raise_exception(EXCP0D_GPF);
1140 2c0262af bellard
        }
1141 2c0262af bellard
    }
1142 2c0262af bellard
    FORCE_RET();
1143 2c0262af bellard
}
1144 2c0262af bellard

1145 2c0262af bellard
void OPPROTO op_movl_eflags_T0_vm(void)
1146 2c0262af bellard
{
1147 2c0262af bellard
    int eflags;
1148 2c0262af bellard
    eflags = T0;
1149 2c0262af bellard
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1150 2c0262af bellard
    DF = 1 - (2 * ((eflags >> 10) & 1));
1151 2c0262af bellard
    /* we also update some system flags as in user mode */
1152 2c0262af bellard
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1153 2c0262af bellard
        (eflags & FL_UPDATE_MASK32);
1154 2c0262af bellard
    if (eflags & IF_MASK) {
1155 2c0262af bellard
        env->eflags |= VIF_MASK;
1156 2c0262af bellard
        if (env->eflags & VIP_MASK) {
1157 2c0262af bellard
            EIP = PARAM1;
1158 2c0262af bellard
            raise_exception(EXCP0D_GPF);
1159 2c0262af bellard
        }
1160 2c0262af bellard
    }
1161 2c0262af bellard
    FORCE_RET();
1162 2c0262af bellard
}
1163 2c0262af bellard
#endif
1164 2c0262af bellard
1165 2c0262af bellard
/* XXX: compute only O flag */
1166 2c0262af bellard
void OPPROTO op_movb_eflags_T0(void)
1167 2c0262af bellard
{
1168 2c0262af bellard
    int of;
1169 2c0262af bellard
    of = cc_table[CC_OP].compute_all() & CC_O;
1170 2c0262af bellard
    CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1171 2c0262af bellard
}
1172 2c0262af bellard
1173 2c0262af bellard
void OPPROTO op_movl_T0_eflags(void)
1174 2c0262af bellard
{
1175 2c0262af bellard
    int eflags;
1176 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1177 2c0262af bellard
    eflags |= (DF & DF_MASK);
1178 2c0262af bellard
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1179 2c0262af bellard
    T0 = eflags;
1180 2c0262af bellard
}
1181 2c0262af bellard
1182 2c0262af bellard
/* vm86plus version */
1183 2c0262af bellard
#if 0
1184 2c0262af bellard
void OPPROTO op_movl_T0_eflags_vm(void)
1185 2c0262af bellard
{
1186 2c0262af bellard
    int eflags;
1187 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1188 2c0262af bellard
    eflags |= (DF & DF_MASK);
1189 2c0262af bellard
    eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1190 2c0262af bellard
    if (env->eflags & VIF_MASK)
1191 2c0262af bellard
        eflags |= IF_MASK;
1192 2c0262af bellard
    T0 = eflags;
1193 2c0262af bellard
}
1194 2c0262af bellard
#endif
1195 2c0262af bellard
1196 2c0262af bellard
void OPPROTO op_cld(void)
1197 2c0262af bellard
{
1198 2c0262af bellard
    DF = 1;
1199 2c0262af bellard
}
1200 2c0262af bellard
1201 2c0262af bellard
void OPPROTO op_std(void)
1202 2c0262af bellard
{
1203 2c0262af bellard
    DF = -1;
1204 2c0262af bellard
}
1205 2c0262af bellard
1206 2c0262af bellard
void OPPROTO op_clc(void)
1207 2c0262af bellard
{
1208 2c0262af bellard
    int eflags;
1209 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1210 2c0262af bellard
    eflags &= ~CC_C;
1211 2c0262af bellard
    CC_SRC = eflags;
1212 2c0262af bellard
}
1213 2c0262af bellard
1214 2c0262af bellard
void OPPROTO op_stc(void)
1215 2c0262af bellard
{
1216 2c0262af bellard
    int eflags;
1217 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1218 2c0262af bellard
    eflags |= CC_C;
1219 2c0262af bellard
    CC_SRC = eflags;
1220 2c0262af bellard
}
1221 2c0262af bellard
1222 2c0262af bellard
void OPPROTO op_cmc(void)
1223 2c0262af bellard
{
1224 2c0262af bellard
    int eflags;
1225 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1226 2c0262af bellard
    eflags ^= CC_C;
1227 2c0262af bellard
    CC_SRC = eflags;
1228 2c0262af bellard
}
1229 2c0262af bellard
1230 2c0262af bellard
void OPPROTO op_salc(void)
1231 2c0262af bellard
{
1232 2c0262af bellard
    int cf;
1233 2c0262af bellard
    cf = cc_table[CC_OP].compute_c();
1234 2c0262af bellard
    EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1235 2c0262af bellard
}
1236 2c0262af bellard
1237 2c0262af bellard
static int compute_all_eflags(void)
1238 2c0262af bellard
{
1239 2c0262af bellard
    return CC_SRC;
1240 2c0262af bellard
}
1241 2c0262af bellard
1242 2c0262af bellard
static int compute_c_eflags(void)
1243 2c0262af bellard
{
1244 2c0262af bellard
    return CC_SRC & CC_C;
1245 2c0262af bellard
}
1246 2c0262af bellard
1247 2c0262af bellard
CCTable cc_table[CC_OP_NB] = {
1248 2c0262af bellard
    [CC_OP_DYNAMIC] = { /* should never happen */ },
1249 2c0262af bellard
1250 2c0262af bellard
    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1251 2c0262af bellard
1252 d36cd60e bellard
    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1253 d36cd60e bellard
    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1254 d36cd60e bellard
    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1255 2c0262af bellard
1256 2c0262af bellard
    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1257 2c0262af bellard
    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1258 2c0262af bellard
    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1259 2c0262af bellard
1260 2c0262af bellard
    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1261 2c0262af bellard
    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1262 2c0262af bellard
    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1263 2c0262af bellard
1264 2c0262af bellard
    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1265 2c0262af bellard
    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1266 2c0262af bellard
    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1267 2c0262af bellard
    
1268 2c0262af bellard
    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1269 2c0262af bellard
    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1270 2c0262af bellard
    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1271 2c0262af bellard
    
1272 2c0262af bellard
    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1273 2c0262af bellard
    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1274 2c0262af bellard
    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1275 2c0262af bellard
    
1276 2c0262af bellard
    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1277 2c0262af bellard
    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1278 2c0262af bellard
    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1279 2c0262af bellard
    
1280 2c0262af bellard
    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1281 2c0262af bellard
    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1282 2c0262af bellard
    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1283 2c0262af bellard
    
1284 2c0262af bellard
    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1285 2c0262af bellard
    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1286 2c0262af bellard
    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1287 2c0262af bellard
1288 2c0262af bellard
    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1289 2c0262af bellard
    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1290 2c0262af bellard
    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1291 2c0262af bellard
};
1292 2c0262af bellard
1293 2c0262af bellard
/* floating point support. Some of the code for complicated x87
1294 2c0262af bellard
   functions comes from the LGPL'ed x86 emulator found in the Willows
1295 2c0262af bellard
   TWIN windows emulator. */
1296 2c0262af bellard
1297 2c0262af bellard
#if defined(__powerpc__)
1298 2c0262af bellard
extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
1299 2c0262af bellard
1300 2c0262af bellard
/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
1301 2c0262af bellard
double qemu_rint(double x)
1302 2c0262af bellard
{
1303 2c0262af bellard
    double y = 4503599627370496.0;
1304 2c0262af bellard
    if (fabs(x) >= y)
1305 2c0262af bellard
        return x;
1306 2c0262af bellard
    if (x < 0) 
1307 2c0262af bellard
        y = -y;
1308 2c0262af bellard
    y = (x + y) - y;
1309 2c0262af bellard
    if (y == 0.0)
1310 2c0262af bellard
        y = copysign(y, x);
1311 2c0262af bellard
    return y;
1312 2c0262af bellard
}
1313 2c0262af bellard
1314 2c0262af bellard
#define rint qemu_rint
1315 2c0262af bellard
#endif
1316 2c0262af bellard
1317 2c0262af bellard
/* fp load FT0 */
1318 2c0262af bellard
1319 2c0262af bellard
void OPPROTO op_flds_FT0_A0(void)
1320 2c0262af bellard
{
1321 2c0262af bellard
#ifdef USE_FP_CONVERT
1322 2c0262af bellard
    FP_CONVERT.i32 = ldl((void *)A0);
1323 2c0262af bellard
    FT0 = FP_CONVERT.f;
1324 2c0262af bellard
#else
1325 2c0262af bellard
    FT0 = ldfl((void *)A0);
1326 2c0262af bellard
#endif
1327 2c0262af bellard
}
1328 2c0262af bellard
1329 2c0262af bellard
void OPPROTO op_fldl_FT0_A0(void)
1330 2c0262af bellard
{
1331 2c0262af bellard
#ifdef USE_FP_CONVERT
1332 2c0262af bellard
    FP_CONVERT.i64 = ldq((void *)A0);
1333 2c0262af bellard
    FT0 = FP_CONVERT.d;
1334 2c0262af bellard
#else
1335 2c0262af bellard
    FT0 = ldfq((void *)A0);
1336 2c0262af bellard
#endif
1337 2c0262af bellard
}
1338 2c0262af bellard
1339 2c0262af bellard
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1340 2c0262af bellard
#ifdef USE_INT_TO_FLOAT_HELPERS
1341 2c0262af bellard
1342 2c0262af bellard
void helper_fild_FT0_A0(void)
1343 2c0262af bellard
{
1344 2c0262af bellard
    FT0 = (CPU86_LDouble)ldsw((void *)A0);
1345 2c0262af bellard
}
1346 2c0262af bellard
1347 2c0262af bellard
void helper_fildl_FT0_A0(void)
1348 2c0262af bellard
{
1349 2c0262af bellard
    FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1350 2c0262af bellard
}
1351 2c0262af bellard
1352 2c0262af bellard
void helper_fildll_FT0_A0(void)
1353 2c0262af bellard
{
1354 2c0262af bellard
    FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1355 2c0262af bellard
}
1356 2c0262af bellard
1357 2c0262af bellard
void OPPROTO op_fild_FT0_A0(void)
1358 2c0262af bellard
{
1359 2c0262af bellard
    helper_fild_FT0_A0();
1360 2c0262af bellard
}
1361 2c0262af bellard
1362 2c0262af bellard
void OPPROTO op_fildl_FT0_A0(void)
1363 2c0262af bellard
{
1364 2c0262af bellard
    helper_fildl_FT0_A0();
1365 2c0262af bellard
}
1366 2c0262af bellard
1367 2c0262af bellard
void OPPROTO op_fildll_FT0_A0(void)
1368 2c0262af bellard
{
1369 2c0262af bellard
    helper_fildll_FT0_A0();
1370 2c0262af bellard
}
1371 2c0262af bellard
1372 2c0262af bellard
#else
1373 2c0262af bellard
1374 2c0262af bellard
void OPPROTO op_fild_FT0_A0(void)
1375 2c0262af bellard
{
1376 2c0262af bellard
#ifdef USE_FP_CONVERT
1377 2c0262af bellard
    FP_CONVERT.i32 = ldsw((void *)A0);
1378 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1379 2c0262af bellard
#else
1380 2c0262af bellard
    FT0 = (CPU86_LDouble)ldsw((void *)A0);
1381 2c0262af bellard
#endif
1382 2c0262af bellard
}
1383 2c0262af bellard
1384 2c0262af bellard
void OPPROTO op_fildl_FT0_A0(void)
1385 2c0262af bellard
{
1386 2c0262af bellard
#ifdef USE_FP_CONVERT
1387 2c0262af bellard
    FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
1388 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1389 2c0262af bellard
#else
1390 2c0262af bellard
    FT0 = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1391 2c0262af bellard
#endif
1392 2c0262af bellard
}
1393 2c0262af bellard
1394 2c0262af bellard
void OPPROTO op_fildll_FT0_A0(void)
1395 2c0262af bellard
{
1396 2c0262af bellard
#ifdef USE_FP_CONVERT
1397 2c0262af bellard
    FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
1398 2c0262af bellard
    FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1399 2c0262af bellard
#else
1400 2c0262af bellard
    FT0 = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1401 2c0262af bellard
#endif
1402 2c0262af bellard
}
1403 2c0262af bellard
#endif
1404 2c0262af bellard
1405 2c0262af bellard
/* fp load ST0 */
1406 2c0262af bellard
1407 2c0262af bellard
void OPPROTO op_flds_ST0_A0(void)
1408 2c0262af bellard
{
1409 2c0262af bellard
    int new_fpstt;
1410 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1411 2c0262af bellard
#ifdef USE_FP_CONVERT
1412 2c0262af bellard
    FP_CONVERT.i32 = ldl((void *)A0);
1413 2c0262af bellard
    env->fpregs[new_fpstt] = FP_CONVERT.f;
1414 2c0262af bellard
#else
1415 2c0262af bellard
    env->fpregs[new_fpstt] = ldfl((void *)A0);
1416 2c0262af bellard
#endif
1417 2c0262af bellard
    env->fpstt = new_fpstt;
1418 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1419 2c0262af bellard
}
1420 2c0262af bellard
1421 2c0262af bellard
void OPPROTO op_fldl_ST0_A0(void)
1422 2c0262af bellard
{
1423 2c0262af bellard
    int new_fpstt;
1424 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1425 2c0262af bellard
#ifdef USE_FP_CONVERT
1426 2c0262af bellard
    FP_CONVERT.i64 = ldq((void *)A0);
1427 2c0262af bellard
    env->fpregs[new_fpstt] = FP_CONVERT.d;
1428 2c0262af bellard
#else
1429 2c0262af bellard
    env->fpregs[new_fpstt] = ldfq((void *)A0);
1430 2c0262af bellard
#endif
1431 2c0262af bellard
    env->fpstt = new_fpstt;
1432 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1433 2c0262af bellard
}
1434 2c0262af bellard
1435 2c0262af bellard
void OPPROTO op_fldt_ST0_A0(void)
1436 2c0262af bellard
{
1437 2c0262af bellard
    helper_fldt_ST0_A0();
1438 2c0262af bellard
}
1439 2c0262af bellard
1440 2c0262af bellard
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1441 2c0262af bellard
#ifdef USE_INT_TO_FLOAT_HELPERS
1442 2c0262af bellard
1443 2c0262af bellard
void helper_fild_ST0_A0(void)
1444 2c0262af bellard
{
1445 2c0262af bellard
    int new_fpstt;
1446 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1447 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
1448 2c0262af bellard
    env->fpstt = new_fpstt;
1449 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1450 2c0262af bellard
}
1451 2c0262af bellard
1452 2c0262af bellard
void helper_fildl_ST0_A0(void)
1453 2c0262af bellard
{
1454 2c0262af bellard
    int new_fpstt;
1455 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1456 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1457 2c0262af bellard
    env->fpstt = new_fpstt;
1458 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1459 2c0262af bellard
}
1460 2c0262af bellard
1461 2c0262af bellard
void helper_fildll_ST0_A0(void)
1462 2c0262af bellard
{
1463 2c0262af bellard
    int new_fpstt;
1464 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1465 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1466 2c0262af bellard
    env->fpstt = new_fpstt;
1467 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1468 2c0262af bellard
}
1469 2c0262af bellard
1470 2c0262af bellard
void OPPROTO op_fild_ST0_A0(void)
1471 2c0262af bellard
{
1472 2c0262af bellard
    helper_fild_ST0_A0();
1473 2c0262af bellard
}
1474 2c0262af bellard
1475 2c0262af bellard
void OPPROTO op_fildl_ST0_A0(void)
1476 2c0262af bellard
{
1477 2c0262af bellard
    helper_fildl_ST0_A0();
1478 2c0262af bellard
}
1479 2c0262af bellard
1480 2c0262af bellard
void OPPROTO op_fildll_ST0_A0(void)
1481 2c0262af bellard
{
1482 2c0262af bellard
    helper_fildll_ST0_A0();
1483 2c0262af bellard
}
1484 2c0262af bellard
1485 2c0262af bellard
#else
1486 2c0262af bellard
1487 2c0262af bellard
void OPPROTO op_fild_ST0_A0(void)
1488 2c0262af bellard
{
1489 2c0262af bellard
    int new_fpstt;
1490 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1491 2c0262af bellard
#ifdef USE_FP_CONVERT
1492 2c0262af bellard
    FP_CONVERT.i32 = ldsw((void *)A0);
1493 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
1494 2c0262af bellard
#else
1495 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)ldsw((void *)A0);
1496 2c0262af bellard
#endif
1497 2c0262af bellard
    env->fpstt = new_fpstt;
1498 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1499 2c0262af bellard
}
1500 2c0262af bellard
1501 2c0262af bellard
void OPPROTO op_fildl_ST0_A0(void)
1502 2c0262af bellard
{
1503 2c0262af bellard
    int new_fpstt;
1504 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1505 2c0262af bellard
#ifdef USE_FP_CONVERT
1506 2c0262af bellard
    FP_CONVERT.i32 = (int32_t) ldl((void *)A0);
1507 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i32;
1508 2c0262af bellard
#else
1509 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int32_t)ldl((void *)A0));
1510 2c0262af bellard
#endif
1511 2c0262af bellard
    env->fpstt = new_fpstt;
1512 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1513 2c0262af bellard
}
1514 2c0262af bellard
1515 2c0262af bellard
void OPPROTO op_fildll_ST0_A0(void)
1516 2c0262af bellard
{
1517 2c0262af bellard
    int new_fpstt;
1518 2c0262af bellard
    new_fpstt = (env->fpstt - 1) & 7;
1519 2c0262af bellard
#ifdef USE_FP_CONVERT
1520 2c0262af bellard
    FP_CONVERT.i64 = (int64_t) ldq((void *)A0);
1521 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)FP_CONVERT.i64;
1522 2c0262af bellard
#else
1523 2c0262af bellard
    env->fpregs[new_fpstt] = (CPU86_LDouble)((int64_t)ldq((void *)A0));
1524 2c0262af bellard
#endif
1525 2c0262af bellard
    env->fpstt = new_fpstt;
1526 2c0262af bellard
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1527 2c0262af bellard
}
1528 2c0262af bellard
1529 2c0262af bellard
#endif
1530 2c0262af bellard
1531 2c0262af bellard
/* fp store */
1532 2c0262af bellard
1533 2c0262af bellard
void OPPROTO op_fsts_ST0_A0(void)
1534 2c0262af bellard
{
1535 2c0262af bellard
#ifdef USE_FP_CONVERT
1536 2c0262af bellard
    FP_CONVERT.f = (float)ST0;
1537 2c0262af bellard
    stfl((void *)A0, FP_CONVERT.f);
1538 2c0262af bellard
#else
1539 2c0262af bellard
    stfl((void *)A0, (float)ST0);
1540 2c0262af bellard
#endif
1541 2c0262af bellard
}
1542 2c0262af bellard
1543 2c0262af bellard
void OPPROTO op_fstl_ST0_A0(void)
1544 2c0262af bellard
{
1545 2c0262af bellard
    stfq((void *)A0, (double)ST0);
1546 2c0262af bellard
}
1547 2c0262af bellard
1548 2c0262af bellard
void OPPROTO op_fstt_ST0_A0(void)
1549 2c0262af bellard
{
1550 2c0262af bellard
    helper_fstt_ST0_A0();
1551 2c0262af bellard
}
1552 2c0262af bellard
1553 2c0262af bellard
void OPPROTO op_fist_ST0_A0(void)
1554 2c0262af bellard
{
1555 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1556 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1557 2c0262af bellard
#else
1558 2c0262af bellard
    CPU86_LDouble d;
1559 2c0262af bellard
#endif
1560 2c0262af bellard
    int val;
1561 2c0262af bellard
1562 2c0262af bellard
    d = ST0;
1563 2c0262af bellard
    val = lrint(d);
1564 2c0262af bellard
    if (val != (int16_t)val)
1565 2c0262af bellard
        val = -32768;
1566 2c0262af bellard
    stw((void *)A0, val);
1567 2c0262af bellard
}
1568 2c0262af bellard
1569 2c0262af bellard
void OPPROTO op_fistl_ST0_A0(void)
1570 2c0262af bellard
{
1571 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1572 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1573 2c0262af bellard
#else
1574 2c0262af bellard
    CPU86_LDouble d;
1575 2c0262af bellard
#endif
1576 2c0262af bellard
    int val;
1577 2c0262af bellard
1578 2c0262af bellard
    d = ST0;
1579 2c0262af bellard
    val = lrint(d);
1580 2c0262af bellard
    stl((void *)A0, val);
1581 2c0262af bellard
}
1582 2c0262af bellard
1583 2c0262af bellard
void OPPROTO op_fistll_ST0_A0(void)
1584 2c0262af bellard
{
1585 2c0262af bellard
#if defined(__sparc__) && !defined(__sparc_v9__)
1586 2c0262af bellard
    register CPU86_LDouble d asm("o0");
1587 2c0262af bellard
#else
1588 2c0262af bellard
    CPU86_LDouble d;
1589 2c0262af bellard
#endif
1590 2c0262af bellard
    int64_t val;
1591 2c0262af bellard
1592 2c0262af bellard
    d = ST0;
1593 2c0262af bellard
    val = llrint(d);
1594 2c0262af bellard
    stq((void *)A0, val);
1595 2c0262af bellard
}
1596 2c0262af bellard
1597 2c0262af bellard
void OPPROTO op_fbld_ST0_A0(void)
1598 2c0262af bellard
{
1599 2c0262af bellard
    helper_fbld_ST0_A0();
1600 2c0262af bellard
}
1601 2c0262af bellard
1602 2c0262af bellard
void OPPROTO op_fbst_ST0_A0(void)
1603 2c0262af bellard
{
1604 2c0262af bellard
    helper_fbst_ST0_A0();
1605 2c0262af bellard
}
1606 2c0262af bellard
1607 2c0262af bellard
/* FPU move */
1608 2c0262af bellard
1609 2c0262af bellard
void OPPROTO op_fpush(void)
1610 2c0262af bellard
{
1611 2c0262af bellard
    fpush();
1612 2c0262af bellard
}
1613 2c0262af bellard
1614 2c0262af bellard
void OPPROTO op_fpop(void)
1615 2c0262af bellard
{
1616 2c0262af bellard
    fpop();
1617 2c0262af bellard
}
1618 2c0262af bellard
1619 2c0262af bellard
void OPPROTO op_fdecstp(void)
1620 2c0262af bellard
{
1621 2c0262af bellard
    env->fpstt = (env->fpstt - 1) & 7;
1622 2c0262af bellard
    env->fpus &= (~0x4700);
1623 2c0262af bellard
}
1624 2c0262af bellard
1625 2c0262af bellard
void OPPROTO op_fincstp(void)
1626 2c0262af bellard
{
1627 2c0262af bellard
    env->fpstt = (env->fpstt + 1) & 7;
1628 2c0262af bellard
    env->fpus &= (~0x4700);
1629 2c0262af bellard
}
1630 2c0262af bellard
1631 2c0262af bellard
void OPPROTO op_fmov_ST0_FT0(void)
1632 2c0262af bellard
{
1633 2c0262af bellard
    ST0 = FT0;
1634 2c0262af bellard
}
1635 2c0262af bellard
1636 2c0262af bellard
void OPPROTO op_fmov_FT0_STN(void)
1637 2c0262af bellard
{
1638 2c0262af bellard
    FT0 = ST(PARAM1);
1639 2c0262af bellard
}
1640 2c0262af bellard
1641 2c0262af bellard
void OPPROTO op_fmov_ST0_STN(void)
1642 2c0262af bellard
{
1643 2c0262af bellard
    ST0 = ST(PARAM1);
1644 2c0262af bellard
}
1645 2c0262af bellard
1646 2c0262af bellard
void OPPROTO op_fmov_STN_ST0(void)
1647 2c0262af bellard
{
1648 2c0262af bellard
    ST(PARAM1) = ST0;
1649 2c0262af bellard
}
1650 2c0262af bellard
1651 2c0262af bellard
void OPPROTO op_fxchg_ST0_STN(void)
1652 2c0262af bellard
{
1653 2c0262af bellard
    CPU86_LDouble tmp;
1654 2c0262af bellard
    tmp = ST(PARAM1);
1655 2c0262af bellard
    ST(PARAM1) = ST0;
1656 2c0262af bellard
    ST0 = tmp;
1657 2c0262af bellard
}
1658 2c0262af bellard
1659 2c0262af bellard
/* FPU operations */
1660 2c0262af bellard
1661 2c0262af bellard
/* XXX: handle nans */
1662 2c0262af bellard
void OPPROTO op_fcom_ST0_FT0(void)
1663 2c0262af bellard
{
1664 2c0262af bellard
    env->fpus &= (~0x4500);        /* (C3,C2,C0) <-- 000 */
1665 2c0262af bellard
    if (ST0 < FT0)
1666 2c0262af bellard
        env->fpus |= 0x100;        /* (C3,C2,C0) <-- 001 */
1667 2c0262af bellard
    else if (ST0 == FT0)
1668 2c0262af bellard
        env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1669 2c0262af bellard
    FORCE_RET();
1670 2c0262af bellard
}
1671 2c0262af bellard
1672 2c0262af bellard
/* XXX: handle nans */
1673 2c0262af bellard
void OPPROTO op_fucom_ST0_FT0(void)
1674 2c0262af bellard
{
1675 2c0262af bellard
    env->fpus &= (~0x4500);        /* (C3,C2,C0) <-- 000 */
1676 2c0262af bellard
    if (ST0 < FT0)
1677 2c0262af bellard
        env->fpus |= 0x100;        /* (C3,C2,C0) <-- 001 */
1678 2c0262af bellard
    else if (ST0 == FT0)
1679 2c0262af bellard
        env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
1680 2c0262af bellard
    FORCE_RET();
1681 2c0262af bellard
}
1682 2c0262af bellard
1683 2c0262af bellard
/* XXX: handle nans */
1684 2c0262af bellard
void OPPROTO op_fcomi_ST0_FT0(void)
1685 2c0262af bellard
{
1686 2c0262af bellard
    int eflags;
1687 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1688 2c0262af bellard
    eflags &= ~(CC_Z | CC_P | CC_C);
1689 2c0262af bellard
    if (ST0 < FT0)
1690 2c0262af bellard
        eflags |= CC_C;
1691 2c0262af bellard
    else if (ST0 == FT0)
1692 2c0262af bellard
        eflags |= CC_Z;
1693 2c0262af bellard
    CC_SRC = eflags;
1694 2c0262af bellard
    FORCE_RET();
1695 2c0262af bellard
}
1696 2c0262af bellard
1697 2c0262af bellard
/* XXX: handle nans */
1698 2c0262af bellard
void OPPROTO op_fucomi_ST0_FT0(void)
1699 2c0262af bellard
{
1700 2c0262af bellard
    int eflags;
1701 2c0262af bellard
    eflags = cc_table[CC_OP].compute_all();
1702 2c0262af bellard
    eflags &= ~(CC_Z | CC_P | CC_C);
1703 2c0262af bellard
    if (ST0 < FT0)
1704 2c0262af bellard
        eflags |= CC_C;
1705 2c0262af bellard
    else if (ST0 == FT0)
1706 2c0262af bellard
        eflags |= CC_Z;
1707 2c0262af bellard
    CC_SRC = eflags;
1708 2c0262af bellard
    FORCE_RET();
1709 2c0262af bellard
}
1710 2c0262af bellard
1711 80043406 bellard
void OPPROTO op_fcmov_ST0_STN_T0(void)
1712 80043406 bellard
{
1713 80043406 bellard
    if (T0) {
1714 80043406 bellard
        ST0 = ST(PARAM1);
1715 80043406 bellard
    }
1716 80043406 bellard
    FORCE_RET();
1717 80043406 bellard
}
1718 80043406 bellard
1719 2c0262af bellard
void OPPROTO op_fadd_ST0_FT0(void)
1720 2c0262af bellard
{
1721 2c0262af bellard
    ST0 += FT0;
1722 2c0262af bellard
}
1723 2c0262af bellard
1724 2c0262af bellard
void OPPROTO op_fmul_ST0_FT0(void)
1725 2c0262af bellard
{
1726 2c0262af bellard
    ST0 *= FT0;
1727 2c0262af bellard
}
1728 2c0262af bellard
1729 2c0262af bellard
void OPPROTO op_fsub_ST0_FT0(void)
1730 2c0262af bellard
{
1731 2c0262af bellard
    ST0 -= FT0;
1732 2c0262af bellard
}
1733 2c0262af bellard
1734 2c0262af bellard
void OPPROTO op_fsubr_ST0_FT0(void)
1735 2c0262af bellard
{
1736 2c0262af bellard
    ST0 = FT0 - ST0;
1737 2c0262af bellard
}
1738 2c0262af bellard
1739 2c0262af bellard
void OPPROTO op_fdiv_ST0_FT0(void)
1740 2c0262af bellard
{
1741 2ee73ac3 bellard
    ST0 = helper_fdiv(ST0, FT0);
1742 2c0262af bellard
}
1743 2c0262af bellard
1744 2c0262af bellard
void OPPROTO op_fdivr_ST0_FT0(void)
1745 2c0262af bellard
{
1746 2ee73ac3 bellard
    ST0 = helper_fdiv(FT0, ST0);
1747 2c0262af bellard
}
1748 2c0262af bellard
1749 2c0262af bellard
/* fp operations between STN and ST0 */
1750 2c0262af bellard
1751 2c0262af bellard
void OPPROTO op_fadd_STN_ST0(void)
1752 2c0262af bellard
{
1753 2c0262af bellard
    ST(PARAM1) += ST0;
1754 2c0262af bellard
}
1755 2c0262af bellard
1756 2c0262af bellard
void OPPROTO op_fmul_STN_ST0(void)
1757 2c0262af bellard
{
1758 2c0262af bellard
    ST(PARAM1) *= ST0;
1759 2c0262af bellard
}
1760 2c0262af bellard
1761 2c0262af bellard
void OPPROTO op_fsub_STN_ST0(void)
1762 2c0262af bellard
{
1763 2c0262af bellard
    ST(PARAM1) -= ST0;
1764 2c0262af bellard
}
1765 2c0262af bellard
1766 2c0262af bellard
void OPPROTO op_fsubr_STN_ST0(void)
1767 2c0262af bellard
{
1768 2c0262af bellard
    CPU86_LDouble *p;
1769 2c0262af bellard
    p = &ST(PARAM1);
1770 2c0262af bellard
    *p = ST0 - *p;
1771 2c0262af bellard
}
1772 2c0262af bellard
1773 2c0262af bellard
void OPPROTO op_fdiv_STN_ST0(void)
1774 2c0262af bellard
{
1775 2ee73ac3 bellard
    CPU86_LDouble *p;
1776 2ee73ac3 bellard
    p = &ST(PARAM1);
1777 2ee73ac3 bellard
    *p = helper_fdiv(*p, ST0);
1778 2c0262af bellard
}
1779 2c0262af bellard
1780 2c0262af bellard
void OPPROTO op_fdivr_STN_ST0(void)
1781 2c0262af bellard
{
1782 2c0262af bellard
    CPU86_LDouble *p;
1783 2c0262af bellard
    p = &ST(PARAM1);
1784 2ee73ac3 bellard
    *p = helper_fdiv(ST0, *p);
1785 2c0262af bellard
}
1786 2c0262af bellard
1787 2c0262af bellard
/* misc FPU operations */
1788 2c0262af bellard
void OPPROTO op_fchs_ST0(void)
1789 2c0262af bellard
{
1790 2c0262af bellard
    ST0 = -ST0;
1791 2c0262af bellard
}
1792 2c0262af bellard
1793 2c0262af bellard
void OPPROTO op_fabs_ST0(void)
1794 2c0262af bellard
{
1795 2c0262af bellard
    ST0 = fabs(ST0);
1796 2c0262af bellard
}
1797 2c0262af bellard
1798 2c0262af bellard
void OPPROTO op_fxam_ST0(void)
1799 2c0262af bellard
{
1800 2c0262af bellard
    helper_fxam_ST0();
1801 2c0262af bellard
}
1802 2c0262af bellard
1803 2c0262af bellard
void OPPROTO op_fld1_ST0(void)
1804 2c0262af bellard
{
1805 2c0262af bellard
    ST0 = f15rk[1];
1806 2c0262af bellard
}
1807 2c0262af bellard
1808 2c0262af bellard
void OPPROTO op_fldl2t_ST0(void)
1809 2c0262af bellard
{
1810 2c0262af bellard
    ST0 = f15rk[6];
1811 2c0262af bellard
}
1812 2c0262af bellard
1813 2c0262af bellard
void OPPROTO op_fldl2e_ST0(void)
1814 2c0262af bellard
{
1815 2c0262af bellard
    ST0 = f15rk[5];
1816 2c0262af bellard
}
1817 2c0262af bellard
1818 2c0262af bellard
void OPPROTO op_fldpi_ST0(void)
1819 2c0262af bellard
{
1820 2c0262af bellard
    ST0 = f15rk[2];
1821 2c0262af bellard
}
1822 2c0262af bellard
1823 2c0262af bellard
void OPPROTO op_fldlg2_ST0(void)
1824 2c0262af bellard
{
1825 2c0262af bellard
    ST0 = f15rk[3];
1826 2c0262af bellard
}
1827 2c0262af bellard
1828 2c0262af bellard
void OPPROTO op_fldln2_ST0(void)
1829 2c0262af bellard
{
1830 2c0262af bellard
    ST0 = f15rk[4];
1831 2c0262af bellard
}
1832 2c0262af bellard
1833 2c0262af bellard
void OPPROTO op_fldz_ST0(void)
1834 2c0262af bellard
{
1835 2c0262af bellard
    ST0 = f15rk[0];
1836 2c0262af bellard
}
1837 2c0262af bellard
1838 2c0262af bellard
void OPPROTO op_fldz_FT0(void)
1839 2c0262af bellard
{
1840 6a8c397d bellard
    FT0 = f15rk[0];
1841 2c0262af bellard
}
1842 2c0262af bellard
1843 2c0262af bellard
/* associated heplers to reduce generated code length and to simplify
1844 2c0262af bellard
   relocation (FP constants are usually stored in .rodata section) */
1845 2c0262af bellard
1846 2c0262af bellard
void OPPROTO op_f2xm1(void)
1847 2c0262af bellard
{
1848 2c0262af bellard
    helper_f2xm1();
1849 2c0262af bellard
}
1850 2c0262af bellard
1851 2c0262af bellard
void OPPROTO op_fyl2x(void)
1852 2c0262af bellard
{
1853 2c0262af bellard
    helper_fyl2x();
1854 2c0262af bellard
}
1855 2c0262af bellard
1856 2c0262af bellard
void OPPROTO op_fptan(void)
1857 2c0262af bellard
{
1858 2c0262af bellard
    helper_fptan();
1859 2c0262af bellard
}
1860 2c0262af bellard
1861 2c0262af bellard
void OPPROTO op_fpatan(void)
1862 2c0262af bellard
{
1863 2c0262af bellard
    helper_fpatan();
1864 2c0262af bellard
}
1865 2c0262af bellard
1866 2c0262af bellard
void OPPROTO op_fxtract(void)
1867 2c0262af bellard
{
1868 2c0262af bellard
    helper_fxtract();
1869 2c0262af bellard
}
1870 2c0262af bellard
1871 2c0262af bellard
void OPPROTO op_fprem1(void)
1872 2c0262af bellard
{
1873 2c0262af bellard
    helper_fprem1();
1874 2c0262af bellard
}
1875 2c0262af bellard
1876 2c0262af bellard
1877 2c0262af bellard
void OPPROTO op_fprem(void)
1878 2c0262af bellard
{
1879 2c0262af bellard
    helper_fprem();
1880 2c0262af bellard
}
1881 2c0262af bellard
1882 2c0262af bellard
void OPPROTO op_fyl2xp1(void)
1883 2c0262af bellard
{
1884 2c0262af bellard
    helper_fyl2xp1();
1885 2c0262af bellard
}
1886 2c0262af bellard
1887 2c0262af bellard
void OPPROTO op_fsqrt(void)
1888 2c0262af bellard
{
1889 2c0262af bellard
    helper_fsqrt();
1890 2c0262af bellard
}
1891 2c0262af bellard
1892 2c0262af bellard
void OPPROTO op_fsincos(void)
1893 2c0262af bellard
{
1894 2c0262af bellard
    helper_fsincos();
1895 2c0262af bellard
}
1896 2c0262af bellard
1897 2c0262af bellard
void OPPROTO op_frndint(void)
1898 2c0262af bellard
{
1899 2c0262af bellard
    helper_frndint();
1900 2c0262af bellard
}
1901 2c0262af bellard
1902 2c0262af bellard
void OPPROTO op_fscale(void)
1903 2c0262af bellard
{
1904 2c0262af bellard
    helper_fscale();
1905 2c0262af bellard
}
1906 2c0262af bellard
1907 2c0262af bellard
void OPPROTO op_fsin(void)
1908 2c0262af bellard
{
1909 2c0262af bellard
    helper_fsin();
1910 2c0262af bellard
}
1911 2c0262af bellard
1912 2c0262af bellard
void OPPROTO op_fcos(void)
1913 2c0262af bellard
{
1914 2c0262af bellard
    helper_fcos();
1915 2c0262af bellard
}
1916 2c0262af bellard
1917 2c0262af bellard
void OPPROTO op_fnstsw_A0(void)
1918 2c0262af bellard
{
1919 2c0262af bellard
    int fpus;
1920 2c0262af bellard
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1921 2c0262af bellard
    stw((void *)A0, fpus);
1922 2c0262af bellard
}
1923 2c0262af bellard
1924 2c0262af bellard
void OPPROTO op_fnstsw_EAX(void)
1925 2c0262af bellard
{
1926 2c0262af bellard
    int fpus;
1927 2c0262af bellard
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
1928 2c0262af bellard
    EAX = (EAX & 0xffff0000) | fpus;
1929 2c0262af bellard
}
1930 2c0262af bellard
1931 2c0262af bellard
void OPPROTO op_fnstcw_A0(void)
1932 2c0262af bellard
{
1933 2c0262af bellard
    stw((void *)A0, env->fpuc);
1934 2c0262af bellard
}
1935 2c0262af bellard
1936 2c0262af bellard
void OPPROTO op_fldcw_A0(void)
1937 2c0262af bellard
{
1938 2c0262af bellard
    int rnd_type;
1939 2c0262af bellard
    env->fpuc = lduw((void *)A0);
1940 2c0262af bellard
    /* set rounding mode */
1941 7d3505c5 bellard
#ifdef _BSD
1942 7d3505c5 bellard
    switch(env->fpuc & RC_MASK) {
1943 7d3505c5 bellard
    default:
1944 7d3505c5 bellard
    case RC_NEAR:
1945 7d3505c5 bellard
        rnd_type = FP_RN;
1946 7d3505c5 bellard
        break;
1947 7d3505c5 bellard
    case RC_DOWN:
1948 7d3505c5 bellard
        rnd_type = FP_RM;
1949 7d3505c5 bellard
        break;
1950 7d3505c5 bellard
    case RC_UP:
1951 7d3505c5 bellard
        rnd_type = FP_RP;
1952 7d3505c5 bellard
        break;
1953 7d3505c5 bellard
    case RC_CHOP:
1954 7d3505c5 bellard
        rnd_type = FP_RZ;
1955 7d3505c5 bellard
        break;
1956 7d3505c5 bellard
    }
1957 7d3505c5 bellard
    fpsetround(rnd_type);
1958 7d3505c5 bellard
#else
1959 2c0262af bellard
    switch(env->fpuc & RC_MASK) {
1960 2c0262af bellard
    default:
1961 2c0262af bellard
    case RC_NEAR:
1962 2c0262af bellard
        rnd_type = FE_TONEAREST;
1963 2c0262af bellard
        break;
1964 2c0262af bellard
    case RC_DOWN:
1965 2c0262af bellard
        rnd_type = FE_DOWNWARD;
1966 2c0262af bellard
        break;
1967 2c0262af bellard
    case RC_UP:
1968 2c0262af bellard
        rnd_type = FE_UPWARD;
1969 2c0262af bellard
        break;
1970 2c0262af bellard
    case RC_CHOP:
1971 2c0262af bellard
        rnd_type = FE_TOWARDZERO;
1972 2c0262af bellard
        break;
1973 2c0262af bellard
    }
1974 2c0262af bellard
    fesetround(rnd_type);
1975 7d3505c5 bellard
#endif
1976 2c0262af bellard
}
1977 2c0262af bellard
1978 2c0262af bellard
void OPPROTO op_fclex(void)
1979 2c0262af bellard
{
1980 2c0262af bellard
    env->fpus &= 0x7f00;
1981 2c0262af bellard
}
1982 2c0262af bellard
1983 2ee73ac3 bellard
void OPPROTO op_fwait(void)
1984 2ee73ac3 bellard
{
1985 2ee73ac3 bellard
    if (env->fpus & FPUS_SE)
1986 2ee73ac3 bellard
        fpu_raise_exception();
1987 2ee73ac3 bellard
    FORCE_RET();
1988 2ee73ac3 bellard
}
1989 2ee73ac3 bellard
1990 2c0262af bellard
void OPPROTO op_fninit(void)
1991 2c0262af bellard
{
1992 2c0262af bellard
    env->fpus = 0;
1993 2c0262af bellard
    env->fpstt = 0;
1994 2c0262af bellard
    env->fpuc = 0x37f;
1995 2c0262af bellard
    env->fptags[0] = 1;
1996 2c0262af bellard
    env->fptags[1] = 1;
1997 2c0262af bellard
    env->fptags[2] = 1;
1998 2c0262af bellard
    env->fptags[3] = 1;
1999 2c0262af bellard
    env->fptags[4] = 1;
2000 2c0262af bellard
    env->fptags[5] = 1;
2001 2c0262af bellard
    env->fptags[6] = 1;
2002 2c0262af bellard
    env->fptags[7] = 1;
2003 2c0262af bellard
}
2004 2c0262af bellard
2005 2c0262af bellard
void OPPROTO op_fnstenv_A0(void)
2006 2c0262af bellard
{
2007 2c0262af bellard
    helper_fstenv((uint8_t *)A0, PARAM1);
2008 2c0262af bellard
}
2009 2c0262af bellard
2010 2c0262af bellard
void OPPROTO op_fldenv_A0(void)
2011 2c0262af bellard
{
2012 2c0262af bellard
    helper_fldenv((uint8_t *)A0, PARAM1);
2013 2c0262af bellard
}
2014 2c0262af bellard
2015 2c0262af bellard
void OPPROTO op_fnsave_A0(void)
2016 2c0262af bellard
{
2017 2c0262af bellard
    helper_fsave((uint8_t *)A0, PARAM1);
2018 2c0262af bellard
}
2019 2c0262af bellard
2020 2c0262af bellard
void OPPROTO op_frstor_A0(void)
2021 2c0262af bellard
{
2022 2c0262af bellard
    helper_frstor((uint8_t *)A0, PARAM1);
2023 2c0262af bellard
}
2024 2c0262af bellard
2025 2c0262af bellard
/* threading support */
2026 2c0262af bellard
void OPPROTO op_lock(void)
2027 2c0262af bellard
{
2028 2c0262af bellard
    cpu_lock();
2029 2c0262af bellard
}
2030 2c0262af bellard
2031 2c0262af bellard
void OPPROTO op_unlock(void)
2032 2c0262af bellard
{
2033 2c0262af bellard
    cpu_unlock();
2034 2c0262af bellard
}