Revision 7d77bf20 target-sparc/translate.c

b/target-sparc/translate.c
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static const sparc_def_t sparc_defs[] = {
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#ifdef TARGET_SPARC64
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    {
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        .name = "Fujitsu Sparc64",
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        .iu_version = ((0x04ULL << 48) | (0x02ULL << 32) | (0ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Fujitsu Sparc64 III",
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        .iu_version = ((0x04ULL << 48) | (0x03ULL << 32) | (0ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Fujitsu Sparc64 IV",
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        .iu_version = ((0x04ULL << 48) | (0x04ULL << 32) | (0ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Fujitsu Sparc64 V",
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        .iu_version = ((0x04ULL << 48) | (0x05ULL << 32) | (0x51ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "TI UltraSparc I",
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        .iu_version = ((0x17ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "TI UltraSparc II",
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        .iu_version = ((0x17ULL << 48) | (0x11ULL << 32) | (0 << 24)
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        .iu_version = ((0x17ULL << 48) | (0x11ULL << 32) | (0x20ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "TI UltraSparc IIi",
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        .iu_version = ((0x17ULL << 48) | (0x12ULL << 32) | (0x91ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "TI UltraSparc IIe",
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        .iu_version = ((0x17ULL << 48) | (0x13ULL << 32) | (0x14ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc III",
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        .iu_version = ((0x3eULL << 48) | (0x14ULL << 32) | (0x34ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc III Cu",
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        .iu_version = ((0x3eULL << 48) | (0x15ULL << 32) | (0x41ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc IIIi",
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        .iu_version = ((0x3eULL << 48) | (0x16ULL << 32) | (0x34ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc IV",
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        .iu_version = ((0x3eULL << 48) | (0x18ULL << 32) | (0x31ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc IV+",
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        .iu_version = ((0x3eULL << 48) | (0x19ULL << 32) | (0x22ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "Sun UltraSparc IIIi+",
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        .iu_version = ((0x3eULL << 48) | (0x22ULL << 32) | (0ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,
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    },
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    {
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        .name = "NEC UltraSparc I",
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        .iu_version = ((0x22ULL << 48) | (0x10ULL << 32) | (0x40ULL << 24)
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                       | (MAXTL << 8) | (NWINDOWS - 1)),
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        .fpu_version = 0x00000000,
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        .mmu_version = 0,

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