Revision 7d85892b target-sparc/op_helper.c
b/target-sparc/op_helper.c | ||
---|---|---|
418 | 418 |
break; |
419 | 419 |
} |
420 | 420 |
break; |
421 |
case 0x2e: /* MMU passthrough, 0xexxxxxxxx */ |
|
422 |
case 0x2f: /* MMU passthrough, 0xfxxxxxxxx */ |
|
421 |
case 0x21 ... 0x2f: /* MMU passthrough, 0x100000000 to 0xfffffffff */ |
|
423 | 422 |
switch(size) { |
424 | 423 |
case 1: |
425 | 424 |
ret = ldub_phys((target_phys_addr_t)T0 |
... | ... | |
445 | 444 |
case 0x39: /* data cache diagnostic register */ |
446 | 445 |
ret = 0; |
447 | 446 |
break; |
448 |
case 0x21 ... 0x2d: /* MMU passthrough, unassigned */ |
|
449 | 447 |
default: |
450 | 448 |
do_unassigned_access(T0, 0, 0, asi); |
451 | 449 |
ret = 0; |
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