Revision 7d890b40
| b/tests/xtensa/Makefile | ||
|---|---|---|
| 1 |
-include ../../config-host.mak |
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| 2 |
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| 3 |
CROSS=xtensa-dc232b-elf- |
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| 4 |
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| 5 |
ifndef XT |
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| 6 |
SIM = qemu-system-xtensa |
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| 7 |
SIMFLAGS = -M dc232b -nographic -semihosting $(EXTFLAGS) -kernel |
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| 8 |
SIMDEBUG = -s -S |
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| 9 |
else |
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| 10 |
SIM = xt-run |
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| 11 |
SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS) |
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| 12 |
SIMDEBUG = --gdbserve=0 |
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| 13 |
endif |
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| 14 |
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| 15 |
CC = $(CROSS)gcc |
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| 16 |
AS = $(CROSS)gcc -x assembler |
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| 17 |
LD = $(CROSS)ld |
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| 18 |
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LDFLAGS = -Tlinker.ld |
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| 20 |
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| 21 |
CRT = crt.o vectors.o |
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| 22 |
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| 23 |
TESTCASES += test_b.tst |
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| 24 |
TESTCASES += test_bi.tst |
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| 25 |
#TESTCASES += test_boolean.tst |
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| 26 |
TESTCASES += test_bz.tst |
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| 27 |
TESTCASES += test_clamps.tst |
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| 28 |
TESTCASES += test_fail.tst |
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| 29 |
TESTCASES += test_interrupt.tst |
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| 30 |
TESTCASES += test_loop.tst |
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| 31 |
TESTCASES += test_max.tst |
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| 32 |
TESTCASES += test_min.tst |
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| 33 |
TESTCASES += test_mmu.tst |
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| 34 |
TESTCASES += test_mul16.tst |
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| 35 |
TESTCASES += test_mul32.tst |
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| 36 |
TESTCASES += test_nsa.tst |
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| 37 |
ifdef XT |
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TESTCASES += test_pipeline.tst |
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endif |
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TESTCASES += test_quo.tst |
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| 41 |
TESTCASES += test_rem.tst |
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| 42 |
TESTCASES += test_rst0.tst |
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| 43 |
TESTCASES += test_sar.tst |
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| 44 |
TESTCASES += test_sext.tst |
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| 45 |
TESTCASES += test_shift.tst |
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TESTCASES += test_timer.tst |
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TESTCASES += test_windowed.tst |
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| 48 |
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| 49 |
all: build |
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| 50 |
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%.o: $(SRC_PATH)/tests/xtensa/%.c |
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$(CC) $(CFLAGS) -c $< -o $@ |
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| 53 |
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%.o: $(SRC_PATH)/tests/xtensa/%.S |
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$(AS) $(ASFLAGS) -c $< -o $@ |
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| 56 |
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%.tst: %.o macros.inc $(CRT) Makefile |
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$(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@ |
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| 59 |
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build: $(TESTCASES) |
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| 61 |
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check: $(addprefix run-, $(TESTCASES)) |
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| 63 |
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run-%.tst: %.tst |
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$(SIM) $(SIMFLAGS) ./$< |
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| 66 |
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run-test_fail.tst: test_fail.tst |
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! $(SIM) $(SIMFLAGS) ./$< |
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debug-%.tst: %.tst |
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$(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$< |
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| 72 |
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clean: |
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$(RM) -fr $(TESTCASES) $(CRT) |
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| b/tests/xtensa/crt.S | ||
|---|---|---|
| 1 |
.section .init |
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| 2 |
j 1f |
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| 3 |
.section .init.text |
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| 4 |
1: |
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movi a2, _start |
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jx a2 |
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| 7 |
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| 8 |
.text |
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| 9 |
.global _start |
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| 10 |
_start: |
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movi a2, 1 |
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| 12 |
wsr a2, windowstart |
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| 13 |
movi a2, 0 |
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| 14 |
wsr a2, windowbase |
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| 15 |
movi a1, _fstack |
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| 16 |
movi a2, 0x4000f |
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wsr a2, ps |
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isync |
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| 19 |
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call0 main |
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mov a3, a2 |
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movi a2, 1 |
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simcall |
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| b/tests/xtensa/linker.ld | ||
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| 1 |
OUTPUT_FORMAT("elf32-xtensa-le")
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| 2 |
ENTRY(_start) |
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| 3 |
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__DYNAMIC = 0; |
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MEMORY {
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ram : ORIGIN = 0xd0000000, LENGTH = 0x08000000 /* 128M */ |
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rom : ORIGIN = 0xfe000000, LENGTH = 0x00001000 /* 4k */ |
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} |
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SECTIONS |
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{
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.init : |
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{
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*(.init) |
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*(.init.*) |
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} > rom |
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.vector : |
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{
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. = 0x00000000; |
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*(.vector.window_overflow_4) |
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*(.vector.window_overflow_4.*) |
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. = 0x00000040; |
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*(.vector.window_underflow_4) |
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*(.vector.window_underflow_4.*) |
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. = 0x00000080; |
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*(.vector.window_overflow_8) |
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*(.vector.window_overflow_8.*) |
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. = 0x000000c0; |
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*(.vector.window_underflow_8) |
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*(.vector.window_underflow_8.*) |
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. = 0x00000100; |
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*(.vector.window_overflow_12) |
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*(.vector.window_overflow_12.*) |
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. = 0x00000140; |
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*(.vector.window_underflow_12) |
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*(.vector.window_underflow_12.*) |
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. = 0x00000180; |
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*(.vector.level2) |
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*(.vector.level2.*) |
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. = 0x000001c0; |
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*(.vector.level3) |
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*(.vector.level3.*) |
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. = 0x00000200; |
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*(.vector.level4) |
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*(.vector.level4.*) |
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. = 0x00000240; |
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*(.vector.level5) |
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*(.vector.level5.*) |
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. = 0x00000280; |
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*(.vector.level6) |
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*(.vector.level6.*) |
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. = 0x000002c0; |
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*(.vector.level7) |
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*(.vector.level7.*) |
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. = 0x00000300; |
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*(.vector.kernel) |
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*(.vector.kernel.*) |
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. = 0x00000340; |
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*(.vector.user) |
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*(.vector.user.*) |
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. = 0x000003c0; |
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*(.vector.double) |
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*(.vector.double.*) |
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} > ram |
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.text : |
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{
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_ftext = .; |
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*(.text .stub .text.* .gnu.linkonce.t.* .literal .literal.*) |
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_etext = .; |
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} > ram |
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.rodata : |
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{
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. = ALIGN(4); |
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_frodata = .; |
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*(.rodata .rodata.* .gnu.linkonce.r.*) |
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| 82 |
*(.rodata1) |
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| 83 |
_erodata = .; |
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| 84 |
} > ram |
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| 85 |
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| 86 |
.data : |
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| 87 |
{
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. = ALIGN(4); |
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_fdata = .; |
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*(.data .data.* .gnu.linkonce.d.*) |
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| 91 |
*(.data1) |
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| 92 |
_gp = ALIGN(16); |
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| 93 |
*(.sdata .sdata.* .gnu.linkonce.s.*) |
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| 94 |
_edata = .; |
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| 95 |
} > ram |
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| 96 |
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| 97 |
.bss : |
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| 98 |
{
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. = ALIGN(4); |
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_fbss = .; |
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| 101 |
*(.dynsbss) |
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| 102 |
*(.sbss .sbss.* .gnu.linkonce.sb.*) |
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| 103 |
*(.scommon) |
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| 104 |
*(.dynbss) |
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| 105 |
*(.bss .bss.* .gnu.linkonce.b.*) |
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| 106 |
*(COMMON) |
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_ebss = .; |
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_end = .; |
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| 109 |
} > ram |
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| 110 |
} |
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| 111 |
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| 112 |
PROVIDE(_fstack = ORIGIN(ram) + LENGTH(ram) - 4); |
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| b/tests/xtensa/macros.inc | ||
|---|---|---|
| 1 |
.macro test_suite name |
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| 2 |
.data |
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| 3 |
status: .word result |
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| 4 |
result: .space 20 |
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| 5 |
.text |
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| 6 |
.global main |
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| 7 |
.align 4 |
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main: |
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.endm |
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| 10 |
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| 11 |
.macro reset_ps |
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| 12 |
movi a2, 0x4000f |
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| 13 |
wsr a2, ps |
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| 14 |
isync |
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.endm |
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.macro test_suite_end |
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| 18 |
reset_ps |
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| 19 |
movi a0, status |
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l32i a2, a0, 0 |
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| 21 |
movi a0, result |
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| 22 |
sub a2, a2, a0 |
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| 23 |
movi a3, 0 |
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| 24 |
loopnez a2, 1f |
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| 25 |
l8ui a2, a0, 0 |
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or a3, a3, a2 |
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addi a0, a0, 1 |
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| 28 |
1: |
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exit |
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| 30 |
.endm |
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| 31 |
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.macro test name |
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.endm |
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| 34 |
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| 35 |
.macro test_end |
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| 36 |
99: |
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| 37 |
reset_ps |
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| 38 |
movi a2, status |
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| 39 |
l32i a3, a2, 0 |
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| 40 |
addi a3, a3, 1 |
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| 41 |
s32i a3, a2, 0 |
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| 42 |
.endm |
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| 43 |
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| 44 |
.macro exit |
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| 45 |
movi a2, 1 |
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| 46 |
simcall |
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| 47 |
.endm |
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| 48 |
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| 49 |
.macro test_fail |
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| 50 |
movi a2, status |
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| 51 |
l32i a2, a2, 0 |
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| 52 |
movi a3, 1 |
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| 53 |
s8i a3, a2, 0 |
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| 54 |
j 99f |
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| 55 |
.endm |
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| 56 |
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| 57 |
.macro assert cond, arg1, arg2 |
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| 58 |
b\cond \arg1, \arg2, 90f |
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| 59 |
test_fail |
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| 60 |
90: |
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| 61 |
nop |
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| 62 |
.endm |
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| 63 |
|
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| 64 |
.macro set_vector vector, addr |
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| 65 |
movi a2, handler_\vector |
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| 66 |
movi a3, \addr |
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| 67 |
s32i a3, a2, 0 |
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| 68 |
.endm |
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| b/tests/xtensa/test_b.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
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| 2 |
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| 3 |
test_suite b |
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| 4 |
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| 5 |
test bnone |
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| 6 |
movi a2, 0xa5a5ff00 |
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| 7 |
movi a3, 0x5a5a00ff |
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| 8 |
bnone a2, a3, 1f |
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| 9 |
test_fail |
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| 10 |
1: |
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| 11 |
movi a2, 0xa5a5ff01 |
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| 12 |
bnone a2, a3, 1f |
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| 13 |
j 2f |
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| 14 |
1: |
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| 15 |
test_fail |
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| 16 |
2: |
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| 17 |
test_end |
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| 18 |
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| 19 |
test beq |
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| 20 |
movi a2, 0 |
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| 21 |
movi a3, 0 |
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| 22 |
beq a2, a3, 1f |
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| 23 |
test_fail |
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| 24 |
1: |
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| 25 |
movi a2, 1 |
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| 26 |
beq a2, a3, 1f |
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| 27 |
j 2f |
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| 28 |
1: |
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| 29 |
test_fail |
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| 30 |
2: |
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| 31 |
test_end |
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| 32 |
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| 33 |
test blt |
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| 34 |
movi a2, 6 |
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| 35 |
movi a3, 7 |
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| 36 |
blt a2, a3, 1f |
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| 37 |
test_fail |
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| 38 |
1: |
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| 39 |
movi a2, 0xffffffff |
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| 40 |
blt a2, a3, 1f |
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| 41 |
test_fail |
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| 42 |
1: |
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| 43 |
movi a2, 7 |
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| 44 |
blt a2, a3, 1f |
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| 45 |
j 2f |
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| 46 |
1: |
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| 47 |
test_fail |
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| 48 |
2: |
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| 49 |
test_end |
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| 50 |
|
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| 51 |
test bltu |
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| 52 |
movi a2, 6 |
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| 53 |
movi a3, 7 |
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| 54 |
bltu a2, a3, 1f |
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| 55 |
test_fail |
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| 56 |
1: |
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| 57 |
movi a2, 7 |
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| 58 |
bltu a2, a3, 1f |
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| 59 |
j 2f |
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| 60 |
1: |
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| 61 |
test_fail |
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| 62 |
2: |
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| 63 |
movi a2, 0xffffffff |
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| 64 |
bltu a2, a3, 1f |
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| 65 |
j 2f |
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| 66 |
1: |
|
| 67 |
test_fail |
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| 68 |
2: |
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| 69 |
test_end |
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| 70 |
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| 71 |
test ball |
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| 72 |
movi a2, 0xa5a5ffa5 |
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| 73 |
movi a3, 0xa5a5ff00 |
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| 74 |
ball a2, a3, 1f |
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| 75 |
test_fail |
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| 76 |
1: |
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| 77 |
movi a2, 0xa5a5a5a5 |
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| 78 |
ball a2, a3, 1f |
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| 79 |
j 2f |
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| 80 |
1: |
|
| 81 |
test_fail |
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| 82 |
2: |
|
| 83 |
test_end |
|
| 84 |
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| 85 |
test bbc |
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| 86 |
movi a2, 0xfffffffd |
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| 87 |
movi a3, 0xffffff01 |
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| 88 |
bbc a2, a3, 1f |
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| 89 |
test_fail |
|
| 90 |
1: |
|
| 91 |
movi a2, 8 |
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| 92 |
movi a3, 0xffffff03 |
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| 93 |
bbc a2, a3, 1f |
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| 94 |
j 2f |
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| 95 |
1: |
|
| 96 |
test_fail |
|
| 97 |
2: |
|
| 98 |
test_end |
|
| 99 |
|
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| 100 |
test bbci |
|
| 101 |
movi a2, 0xfffdffff |
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| 102 |
bbci a2, 17, 1f |
|
| 103 |
test_fail |
|
| 104 |
1: |
|
| 105 |
movi a2, 0x00020000 |
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| 106 |
bbci a2, 17, 1f |
|
| 107 |
j 2f |
|
| 108 |
1: |
|
| 109 |
test_fail |
|
| 110 |
2: |
|
| 111 |
test_end |
|
| 112 |
|
|
| 113 |
test bany |
|
| 114 |
movi a2, 0xa5a5ff01 |
|
| 115 |
movi a3, 0x5a5a00ff |
|
| 116 |
bany a2, a3, 1f |
|
| 117 |
test_fail |
|
| 118 |
1: |
|
| 119 |
movi a2, 0xa5a5ff00 |
|
| 120 |
bany a2, a3, 1f |
|
| 121 |
j 2f |
|
| 122 |
1: |
|
| 123 |
test_fail |
|
| 124 |
2: |
|
| 125 |
test_end |
|
| 126 |
|
|
| 127 |
test bne |
|
| 128 |
movi a2, 1 |
|
| 129 |
movi a3, 0 |
|
| 130 |
bne a2, a3, 1f |
|
| 131 |
test_fail |
|
| 132 |
1: |
|
| 133 |
movi a2, 0 |
|
| 134 |
bne a2, a3, 1f |
|
| 135 |
j 2f |
|
| 136 |
1: |
|
| 137 |
test_fail |
|
| 138 |
2: |
|
| 139 |
test_end |
|
| 140 |
|
|
| 141 |
test bge |
|
| 142 |
movi a2, 7 |
|
| 143 |
movi a3, 7 |
|
| 144 |
bge a2, a3, 1f |
|
| 145 |
test_fail |
|
| 146 |
1: |
|
| 147 |
movi a2, 6 |
|
| 148 |
bge a2, a3, 1f |
|
| 149 |
j 2f |
|
| 150 |
1: |
|
| 151 |
test_fail |
|
| 152 |
2: |
|
| 153 |
movi a2, 0xffffffff |
|
| 154 |
bge a2, a3, 1f |
|
| 155 |
j 2f |
|
| 156 |
1: |
|
| 157 |
test_fail |
|
| 158 |
2: |
|
| 159 |
test_end |
|
| 160 |
|
|
| 161 |
test bgeu |
|
| 162 |
movi a2, 7 |
|
| 163 |
movi a3, 7 |
|
| 164 |
bgeu a2, a3, 1f |
|
| 165 |
test_fail |
|
| 166 |
1: |
|
| 167 |
movi a2, 0xffffffff |
|
| 168 |
bgeu a2, a3, 1f |
|
| 169 |
test_fail |
|
| 170 |
1: |
|
| 171 |
movi a2, 6 |
|
| 172 |
bgeu a2, a3, 1f |
|
| 173 |
j 2f |
|
| 174 |
1: |
|
| 175 |
test_fail |
|
| 176 |
2: |
|
| 177 |
test_end |
|
| 178 |
|
|
| 179 |
test bnall |
|
| 180 |
movi a2, 0xa5a5a5a5 |
|
| 181 |
movi a3, 0xa5a5ff00 |
|
| 182 |
bnall a2, a3, 1f |
|
| 183 |
test_fail |
|
| 184 |
1: |
|
| 185 |
movi a2, 0xa5a5ffa5 |
|
| 186 |
bnall a2, a3, 1f |
|
| 187 |
j 2f |
|
| 188 |
1: |
|
| 189 |
test_fail |
|
| 190 |
2: |
|
| 191 |
test_end |
|
| 192 |
|
|
| 193 |
test bbs |
|
| 194 |
movi a2, 8 |
|
| 195 |
movi a3, 0xffffff03 |
|
| 196 |
bbs a2, a3, 1f |
|
| 197 |
test_fail |
|
| 198 |
1: |
|
| 199 |
movi a2, 0xfffffffd |
|
| 200 |
movi a3, 0xffffff01 |
|
| 201 |
bbs a2, a3, 1f |
|
| 202 |
j 2f |
|
| 203 |
1: |
|
| 204 |
test_fail |
|
| 205 |
2: |
|
| 206 |
test_end |
|
| 207 |
|
|
| 208 |
test bbsi |
|
| 209 |
movi a2, 0x00020000 |
|
| 210 |
bbsi a2, 17, 1f |
|
| 211 |
test_fail |
|
| 212 |
1: |
|
| 213 |
movi a2, 0xfffdffff |
|
| 214 |
bbsi a2, 17, 1f |
|
| 215 |
j 2f |
|
| 216 |
1: |
|
| 217 |
test_fail |
|
| 218 |
2: |
|
| 219 |
test_end |
|
| 220 |
|
|
| 221 |
test_suite_end |
|
| b/tests/xtensa/test_bi.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite bi |
|
| 4 |
|
|
| 5 |
test beqi |
|
| 6 |
movi a2, 7 |
|
| 7 |
beqi a2, 7, 1f |
|
| 8 |
test_fail |
|
| 9 |
1: |
|
| 10 |
movi a2, 1 |
|
| 11 |
beqi a2, 7, 1f |
|
| 12 |
j 2f |
|
| 13 |
1: |
|
| 14 |
test_fail |
|
| 15 |
2: |
|
| 16 |
test_end |
|
| 17 |
|
|
| 18 |
test bnei |
|
| 19 |
movi a2, 1 |
|
| 20 |
bnei a2, 7, 1f |
|
| 21 |
test_fail |
|
| 22 |
1: |
|
| 23 |
movi a2, 7 |
|
| 24 |
bnei a2, 7, 1f |
|
| 25 |
j 2f |
|
| 26 |
1: |
|
| 27 |
test_fail |
|
| 28 |
2: |
|
| 29 |
test_end |
|
| 30 |
|
|
| 31 |
test blti |
|
| 32 |
movi a2, 6 |
|
| 33 |
blti a2, 7, 1f |
|
| 34 |
test_fail |
|
| 35 |
1: |
|
| 36 |
movi a2, 0xffffffff |
|
| 37 |
blti a2, 7, 1f |
|
| 38 |
test_fail |
|
| 39 |
1: |
|
| 40 |
movi a2, 7 |
|
| 41 |
blti a2, 7, 1f |
|
| 42 |
j 2f |
|
| 43 |
1: |
|
| 44 |
test_fail |
|
| 45 |
2: |
|
| 46 |
test_end |
|
| 47 |
|
|
| 48 |
test bgei |
|
| 49 |
movi a2, 7 |
|
| 50 |
bgei a2, 7, 1f |
|
| 51 |
test_fail |
|
| 52 |
1: |
|
| 53 |
movi a2, 6 |
|
| 54 |
bgei a2, 7, 1f |
|
| 55 |
j 2f |
|
| 56 |
1: |
|
| 57 |
test_fail |
|
| 58 |
2: |
|
| 59 |
movi a2, 0xffffffff |
|
| 60 |
bgei a2, 7, 1f |
|
| 61 |
j 2f |
|
| 62 |
1: |
|
| 63 |
test_fail |
|
| 64 |
2: |
|
| 65 |
test_end |
|
| 66 |
|
|
| 67 |
test bltui |
|
| 68 |
movi a2, 6 |
|
| 69 |
bltui a2, 7, 1f |
|
| 70 |
test_fail |
|
| 71 |
1: |
|
| 72 |
movi a2, 7 |
|
| 73 |
bltui a2, 7, 1f |
|
| 74 |
j 2f |
|
| 75 |
1: |
|
| 76 |
test_fail |
|
| 77 |
2: |
|
| 78 |
movi a2, 0xffffffff |
|
| 79 |
bltui a2, 7, 1f |
|
| 80 |
j 2f |
|
| 81 |
1: |
|
| 82 |
test_fail |
|
| 83 |
2: |
|
| 84 |
test_end |
|
| 85 |
|
|
| 86 |
test bgeui |
|
| 87 |
movi a2, 7 |
|
| 88 |
bgeui a2, 7, 1f |
|
| 89 |
test_fail |
|
| 90 |
1: |
|
| 91 |
movi a2, 0xffffffff |
|
| 92 |
bgeui a2, 7, 1f |
|
| 93 |
test_fail |
|
| 94 |
1: |
|
| 95 |
movi a2, 6 |
|
| 96 |
bgeui a2, 7, 1f |
|
| 97 |
j 2f |
|
| 98 |
1: |
|
| 99 |
test_fail |
|
| 100 |
2: |
|
| 101 |
test_end |
|
| 102 |
|
|
| 103 |
test_suite_end |
|
| b/tests/xtensa/test_boolean.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite boolean |
|
| 4 |
|
|
| 5 |
test all4 |
|
| 6 |
movi a2, 0xfec0 |
|
| 7 |
wsr a2, br |
|
| 8 |
all4 b0, b0 |
|
| 9 |
rsr a3, br |
|
| 10 |
assert eq, a2, a3 |
|
| 11 |
all4 b0, b4 |
|
| 12 |
rsr a3, br |
|
| 13 |
assert eq, a2, a3 |
|
| 14 |
all4 b0, b8 |
|
| 15 |
rsr a3, br |
|
| 16 |
assert eq, a2, a3 |
|
| 17 |
all4 b0, b12 |
|
| 18 |
rsr a3, br |
|
| 19 |
addi a2, a2, 1 |
|
| 20 |
assert eq, a2, a3 |
|
| 21 |
test_end |
|
| 22 |
|
|
| 23 |
test_suite_end |
|
| b/tests/xtensa/test_bz.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite bz |
|
| 4 |
|
|
| 5 |
test beqz |
|
| 6 |
movi a2, 0 |
|
| 7 |
_beqz a2, 1f |
|
| 8 |
test_fail |
|
| 9 |
1: |
|
| 10 |
movi a2, 1 |
|
| 11 |
_beqz a2, 1f |
|
| 12 |
j 2f |
|
| 13 |
1: |
|
| 14 |
test_fail |
|
| 15 |
2: |
|
| 16 |
test_end |
|
| 17 |
|
|
| 18 |
test bnez |
|
| 19 |
movi a2, 1 |
|
| 20 |
_bnez a2, 1f |
|
| 21 |
test_fail |
|
| 22 |
1: |
|
| 23 |
movi a2, 0 |
|
| 24 |
_bnez a2, 1f |
|
| 25 |
j 2f |
|
| 26 |
1: |
|
| 27 |
test_fail |
|
| 28 |
2: |
|
| 29 |
test_end |
|
| 30 |
|
|
| 31 |
test bltz |
|
| 32 |
movi a2, 0xffffffff |
|
| 33 |
bltz a2, 1f |
|
| 34 |
test_fail |
|
| 35 |
1: |
|
| 36 |
movi a2, 0 |
|
| 37 |
bltz a2, 1f |
|
| 38 |
j 2f |
|
| 39 |
1: |
|
| 40 |
test_fail |
|
| 41 |
2: |
|
| 42 |
test_end |
|
| 43 |
|
|
| 44 |
test bgez |
|
| 45 |
movi a2, 0 |
|
| 46 |
bgez a2, 1f |
|
| 47 |
test_fail |
|
| 48 |
1: |
|
| 49 |
movi a2, 0xffffffff |
|
| 50 |
bgez a2, 1f |
|
| 51 |
j 2f |
|
| 52 |
1: |
|
| 53 |
test_fail |
|
| 54 |
2: |
|
| 55 |
test_end |
|
| 56 |
|
|
| 57 |
test_suite_end |
|
| b/tests/xtensa/test_clamps.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite clamps |
|
| 4 |
|
|
| 5 |
test clamps |
|
| 6 |
movi a2, 0 |
|
| 7 |
movi a3, 0 |
|
| 8 |
clamps a4, a2, 7 |
|
| 9 |
assert eq, a3, a4 |
|
| 10 |
|
|
| 11 |
movi a2, 0x7f |
|
| 12 |
movi a3, 0x7f |
|
| 13 |
clamps a4, a2, 7 |
|
| 14 |
assert eq, a3, a4 |
|
| 15 |
|
|
| 16 |
movi a2, 0xffffff80 |
|
| 17 |
movi a3, 0xffffff80 |
|
| 18 |
clamps a4, a2, 7 |
|
| 19 |
assert eq, a3, a4 |
|
| 20 |
|
|
| 21 |
movi a2, 0x80 |
|
| 22 |
movi a3, 0x7f |
|
| 23 |
clamps a2, a2, 7 |
|
| 24 |
assert eq, a3, a2 |
|
| 25 |
|
|
| 26 |
movi a2, 0xffffff7f |
|
| 27 |
movi a3, 0xffffff80 |
|
| 28 |
clamps a2, a2, 7 |
|
| 29 |
assert eq, a3, a2 |
|
| 30 |
|
|
| 31 |
movi a2, 0x7fffffff |
|
| 32 |
movi a3, 0x7f |
|
| 33 |
clamps a2, a2, 7 |
|
| 34 |
assert eq, a3, a2 |
|
| 35 |
|
|
| 36 |
movi a2, 0x80000000 |
|
| 37 |
movi a3, 0xffffff80 |
|
| 38 |
clamps a2, a2, 7 |
|
| 39 |
assert eq, a3, a2 |
|
| 40 |
test_end |
|
| 41 |
|
|
| 42 |
test_suite_end |
|
| b/tests/xtensa/test_fail.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite fail |
|
| 4 |
|
|
| 5 |
test fail |
|
| 6 |
test_fail |
|
| 7 |
test_end |
|
| 8 |
|
|
| 9 |
test_suite_end |
|
| b/tests/xtensa/test_interrupt.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite interrupt |
|
| 4 |
|
|
| 5 |
.macro clear_interrupts |
|
| 6 |
movi a2, 0 |
|
| 7 |
wsr a2, intenable |
|
| 8 |
wsr a2, ccompare0 |
|
| 9 |
wsr a2, ccompare1 |
|
| 10 |
wsr a2, ccompare2 |
|
| 11 |
esync |
|
| 12 |
rsr a2, interrupt |
|
| 13 |
wsr a2, intclear |
|
| 14 |
|
|
| 15 |
esync |
|
| 16 |
rsr a2, interrupt |
|
| 17 |
assert eqi, a2, 0 |
|
| 18 |
.endm |
|
| 19 |
|
|
| 20 |
.macro check_l1 |
|
| 21 |
rsr a2, ps |
|
| 22 |
movi a3, 0x1f /* EXCM | INTMASK */ |
|
| 23 |
and a2, a2, a3 |
|
| 24 |
assert eqi, a2, 0x10 /* only EXCM is set for level-1 interrupt */ |
|
| 25 |
rsr a2, exccause |
|
| 26 |
assert eqi, a2, 4 |
|
| 27 |
.endm |
|
| 28 |
|
|
| 29 |
test rsil |
|
| 30 |
clear_interrupts |
|
| 31 |
|
|
| 32 |
rsr a2, ps |
|
| 33 |
rsil a3, 7 |
|
| 34 |
rsr a4, ps |
|
| 35 |
assert eq, a2, a3 |
|
| 36 |
movi a2, 0xf |
|
| 37 |
and a2, a4, a2 |
|
| 38 |
assert eqi, a2, 7 |
|
| 39 |
xor a3, a3, a4 |
|
| 40 |
movi a2, 0xfffffff0 |
|
| 41 |
and a2, a3, a2 |
|
| 42 |
assert eqi, a2, 0 |
|
| 43 |
test_end |
|
| 44 |
|
|
| 45 |
test soft_disabled |
|
| 46 |
set_vector kernel, 1f |
|
| 47 |
clear_interrupts |
|
| 48 |
|
|
| 49 |
movi a2, 0x80 |
|
| 50 |
wsr a2, intset |
|
| 51 |
esync |
|
| 52 |
rsr a3, interrupt |
|
| 53 |
assert eq, a2, a3 |
|
| 54 |
wsr a2, intclear |
|
| 55 |
esync |
|
| 56 |
rsr a3, interrupt |
|
| 57 |
assert eqi, a3, 0 |
|
| 58 |
j 2f |
|
| 59 |
1: |
|
| 60 |
test_fail |
|
| 61 |
2: |
|
| 62 |
test_end |
|
| 63 |
|
|
| 64 |
test soft_intenable |
|
| 65 |
set_vector kernel, 1f |
|
| 66 |
clear_interrupts |
|
| 67 |
|
|
| 68 |
movi a2, 0x80 |
|
| 69 |
wsr a2, intset |
|
| 70 |
esync |
|
| 71 |
rsr a3, interrupt |
|
| 72 |
assert eq, a2, a3 |
|
| 73 |
rsil a3, 0 |
|
| 74 |
wsr a2, intenable |
|
| 75 |
esync |
|
| 76 |
test_fail |
|
| 77 |
1: |
|
| 78 |
check_l1 |
|
| 79 |
test_end |
|
| 80 |
|
|
| 81 |
test soft_rsil |
|
| 82 |
set_vector kernel, 1f |
|
| 83 |
clear_interrupts |
|
| 84 |
|
|
| 85 |
movi a2, 0x80 |
|
| 86 |
wsr a2, intset |
|
| 87 |
esync |
|
| 88 |
rsr a3, interrupt |
|
| 89 |
assert eq, a2, a3 |
|
| 90 |
wsr a2, intenable |
|
| 91 |
rsil a3, 0 |
|
| 92 |
esync |
|
| 93 |
test_fail |
|
| 94 |
1: |
|
| 95 |
check_l1 |
|
| 96 |
test_end |
|
| 97 |
|
|
| 98 |
test soft_waiti |
|
| 99 |
set_vector kernel, 1f |
|
| 100 |
clear_interrupts |
|
| 101 |
|
|
| 102 |
movi a2, 0x80 |
|
| 103 |
wsr a2, intset |
|
| 104 |
esync |
|
| 105 |
rsr a3, interrupt |
|
| 106 |
assert eq, a2, a3 |
|
| 107 |
wsr a2, intenable |
|
| 108 |
waiti 0 |
|
| 109 |
test_fail |
|
| 110 |
1: |
|
| 111 |
check_l1 |
|
| 112 |
test_end |
|
| 113 |
|
|
| 114 |
test soft_user |
|
| 115 |
set_vector kernel, 1f |
|
| 116 |
set_vector user, 2f |
|
| 117 |
clear_interrupts |
|
| 118 |
|
|
| 119 |
movi a2, 0x80 |
|
| 120 |
wsr a2, intset |
|
| 121 |
esync |
|
| 122 |
rsr a3, interrupt |
|
| 123 |
assert eq, a2, a3 |
|
| 124 |
wsr a2, intenable |
|
| 125 |
|
|
| 126 |
rsr a2, ps |
|
| 127 |
movi a3, 0x20 |
|
| 128 |
or a2, a2, a3 |
|
| 129 |
wsr a2, ps |
|
| 130 |
waiti 0 |
|
| 131 |
1: |
|
| 132 |
test_fail |
|
| 133 |
2: |
|
| 134 |
check_l1 |
|
| 135 |
test_end |
|
| 136 |
|
|
| 137 |
test soft_priority |
|
| 138 |
set_vector kernel, 1f |
|
| 139 |
set_vector level3, 2f |
|
| 140 |
clear_interrupts |
|
| 141 |
|
|
| 142 |
movi a2, 0x880 |
|
| 143 |
wsr a2, intenable |
|
| 144 |
rsil a3, 0 |
|
| 145 |
esync |
|
| 146 |
wsr a2, intset |
|
| 147 |
esync |
|
| 148 |
1: |
|
| 149 |
test_fail |
|
| 150 |
2: |
|
| 151 |
rsr a2, ps |
|
| 152 |
movi a3, 0x1f /* EXCM | INTMASK */ |
|
| 153 |
and a2, a2, a3 |
|
| 154 |
movi a3, 0x13 |
|
| 155 |
assert eq, a2, a3 /* EXCM and INTMASK are set |
|
| 156 |
for high-priority interrupt */ |
|
| 157 |
test_end |
|
| 158 |
|
|
| 159 |
test eps_epc_rfi |
|
| 160 |
set_vector level3, 3f |
|
| 161 |
clear_interrupts |
|
| 162 |
reset_ps |
|
| 163 |
|
|
| 164 |
movi a2, 0x880 |
|
| 165 |
wsr a2, intenable |
|
| 166 |
rsil a3, 0 |
|
| 167 |
rsr a3, ps |
|
| 168 |
esync |
|
| 169 |
wsr a2, intset |
|
| 170 |
1: |
|
| 171 |
esync |
|
| 172 |
2: |
|
| 173 |
test_fail |
|
| 174 |
3: |
|
| 175 |
rsr a2, eps3 |
|
| 176 |
assert eq, a2, a3 |
|
| 177 |
rsr a2, epc3 |
|
| 178 |
movi a3, 1b |
|
| 179 |
assert ge, a2, a3 |
|
| 180 |
movi a3, 2b |
|
| 181 |
assert ge, a3, a2 |
|
| 182 |
movi a2, 4f |
|
| 183 |
wsr a2, epc3 |
|
| 184 |
movi a2, 0x40003 |
|
| 185 |
wsr a2, eps3 |
|
| 186 |
rfi 3 |
|
| 187 |
test_fail |
|
| 188 |
4: |
|
| 189 |
rsr a2, ps |
|
| 190 |
movi a3, 0x40003 |
|
| 191 |
assert eq, a2, a3 |
|
| 192 |
test_end |
|
| 193 |
|
|
| 194 |
test_suite_end |
|
| b/tests/xtensa/test_loop.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite loop |
|
| 4 |
|
|
| 5 |
test loop |
|
| 6 |
movi a2, 0 |
|
| 7 |
movi a3, 5 |
|
| 8 |
loop a3, 1f |
|
| 9 |
addi a2, a2, 1 |
|
| 10 |
1: |
|
| 11 |
assert eqi, a2, 5 |
|
| 12 |
test_end |
|
| 13 |
|
|
| 14 |
test loop0 |
|
| 15 |
movi a2, 0 |
|
| 16 |
loop a2, 1f |
|
| 17 |
rsr a2, lcount |
|
| 18 |
assert eqi, a2, -1 |
|
| 19 |
j 1f |
|
| 20 |
1: |
|
| 21 |
test_end |
|
| 22 |
|
|
| 23 |
test loop_jump |
|
| 24 |
movi a2, 0 |
|
| 25 |
movi a3, 5 |
|
| 26 |
loop a3, 1f |
|
| 27 |
addi a2, a2, 1 |
|
| 28 |
j 1f |
|
| 29 |
1: |
|
| 30 |
assert eqi, a2, 1 |
|
| 31 |
test_end |
|
| 32 |
|
|
| 33 |
test loop_branch |
|
| 34 |
movi a2, 0 |
|
| 35 |
movi a3, 5 |
|
| 36 |
loop a3, 1f |
|
| 37 |
addi a2, a2, 1 |
|
| 38 |
beqi a2, 3, 1f |
|
| 39 |
1: |
|
| 40 |
assert eqi, a2, 3 |
|
| 41 |
test_end |
|
| 42 |
|
|
| 43 |
test loop_manual |
|
| 44 |
movi a2, 0 |
|
| 45 |
movi a3, 5 |
|
| 46 |
movi a4, 1f |
|
| 47 |
movi a5, 2f |
|
| 48 |
wsr a3, lcount |
|
| 49 |
wsr a4, lbeg |
|
| 50 |
wsr a5, lend |
|
| 51 |
isync |
|
| 52 |
j 1f |
|
| 53 |
.align 4 |
|
| 54 |
1: |
|
| 55 |
addi a2, a2, 1 |
|
| 56 |
2: |
|
| 57 |
assert eqi, a2, 6 |
|
| 58 |
test_end |
|
| 59 |
|
|
| 60 |
test loop_excm |
|
| 61 |
movi a2, 0 |
|
| 62 |
movi a3, 5 |
|
| 63 |
rsr a4, ps |
|
| 64 |
movi a5, 0x10 |
|
| 65 |
or a4, a4, a5 |
|
| 66 |
wsr a4, ps |
|
| 67 |
isync |
|
| 68 |
loop a3, 1f |
|
| 69 |
addi a2, a2, 1 |
|
| 70 |
1: |
|
| 71 |
xor a4, a4, a5 |
|
| 72 |
isync |
|
| 73 |
wsr a4, ps |
|
| 74 |
assert eqi, a2, 1 |
|
| 75 |
test_end |
|
| 76 |
|
|
| 77 |
test_suite_end |
|
| b/tests/xtensa/test_max.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite max |
|
| 4 |
|
|
| 5 |
test max |
|
| 6 |
movi a2, 0xffffffff |
|
| 7 |
movi a3, 1 |
|
| 8 |
movi a4, 1 |
|
| 9 |
max a5, a2, a3 |
|
| 10 |
assert eq, a5, a4 |
|
| 11 |
|
|
| 12 |
movi a2, 1 |
|
| 13 |
movi a3, 0xffffffff |
|
| 14 |
movi a4, 1 |
|
| 15 |
max a5, a2, a3 |
|
| 16 |
assert eq, a5, a4 |
|
| 17 |
|
|
| 18 |
movi a2, 0xffffffff |
|
| 19 |
movi a3, 1 |
|
| 20 |
movi a4, 1 |
|
| 21 |
max a2, a2, a3 |
|
| 22 |
assert eq, a2, a4 |
|
| 23 |
|
|
| 24 |
movi a2, 0xffffffff |
|
| 25 |
movi a3, 1 |
|
| 26 |
movi a4, 1 |
|
| 27 |
max a3, a2, a3 |
|
| 28 |
assert eq, a3, a4 |
|
| 29 |
|
|
| 30 |
movi a2, 1 |
|
| 31 |
movi a3, 0xffffffff |
|
| 32 |
movi a4, 1 |
|
| 33 |
max a2, a2, a3 |
|
| 34 |
assert eq, a2, a4 |
|
| 35 |
|
|
| 36 |
movi a2, 1 |
|
| 37 |
movi a3, 0xffffffff |
|
| 38 |
movi a4, 1 |
|
| 39 |
max a3, a2, a3 |
|
| 40 |
assert eq, a3, a4 |
|
| 41 |
test_end |
|
| 42 |
|
|
| 43 |
test maxu |
|
| 44 |
movi a2, 0xffffffff |
|
| 45 |
movi a3, 1 |
|
| 46 |
movi a4, 0xffffffff |
|
| 47 |
maxu a5, a2, a3 |
|
| 48 |
assert eq, a5, a4 |
|
| 49 |
|
|
| 50 |
movi a2, 1 |
|
| 51 |
movi a3, 0xffffffff |
|
| 52 |
movi a4, 0xffffffff |
|
| 53 |
maxu a5, a2, a3 |
|
| 54 |
assert eq, a5, a4 |
|
| 55 |
|
|
| 56 |
movi a2, 0xffffffff |
|
| 57 |
movi a3, 1 |
|
| 58 |
movi a4, 0xffffffff |
|
| 59 |
maxu a2, a2, a3 |
|
| 60 |
assert eq, a2, a4 |
|
| 61 |
|
|
| 62 |
movi a2, 0xffffffff |
|
| 63 |
movi a3, 1 |
|
| 64 |
movi a4, 0xffffffff |
|
| 65 |
maxu a3, a2, a3 |
|
| 66 |
assert eq, a3, a4 |
|
| 67 |
|
|
| 68 |
movi a2, 1 |
|
| 69 |
movi a3, 0xffffffff |
|
| 70 |
movi a4, 0xffffffff |
|
| 71 |
maxu a2, a2, a3 |
|
| 72 |
assert eq, a2, a4 |
|
| 73 |
|
|
| 74 |
movi a2, 1 |
|
| 75 |
movi a3, 0xffffffff |
|
| 76 |
movi a4, 0xffffffff |
|
| 77 |
maxu a3, a2, a3 |
|
| 78 |
assert eq, a3, a4 |
|
| 79 |
test_end |
|
| 80 |
|
|
| 81 |
test_suite_end |
|
| b/tests/xtensa/test_min.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite min |
|
| 4 |
|
|
| 5 |
test min |
|
| 6 |
movi a2, 0xffffffff |
|
| 7 |
movi a3, 1 |
|
| 8 |
movi a4, 0xffffffff |
|
| 9 |
min a5, a2, a3 |
|
| 10 |
assert eq, a5, a4 |
|
| 11 |
|
|
| 12 |
movi a2, 1 |
|
| 13 |
movi a3, 0xffffffff |
|
| 14 |
movi a4, 0xffffffff |
|
| 15 |
min a5, a2, a3 |
|
| 16 |
assert eq, a5, a4 |
|
| 17 |
|
|
| 18 |
movi a2, 0xffffffff |
|
| 19 |
movi a3, 1 |
|
| 20 |
movi a4, 0xffffffff |
|
| 21 |
min a2, a2, a3 |
|
| 22 |
assert eq, a2, a4 |
|
| 23 |
|
|
| 24 |
movi a2, 0xffffffff |
|
| 25 |
movi a3, 1 |
|
| 26 |
movi a4, 0xffffffff |
|
| 27 |
min a3, a2, a3 |
|
| 28 |
assert eq, a3, a4 |
|
| 29 |
|
|
| 30 |
movi a2, 1 |
|
| 31 |
movi a3, 0xffffffff |
|
| 32 |
movi a4, 0xffffffff |
|
| 33 |
min a2, a2, a3 |
|
| 34 |
assert eq, a2, a4 |
|
| 35 |
|
|
| 36 |
movi a2, 1 |
|
| 37 |
movi a3, 0xffffffff |
|
| 38 |
movi a4, 0xffffffff |
|
| 39 |
min a3, a2, a3 |
|
| 40 |
assert eq, a3, a4 |
|
| 41 |
test_end |
|
| 42 |
|
|
| 43 |
test minu |
|
| 44 |
movi a2, 0xffffffff |
|
| 45 |
movi a3, 1 |
|
| 46 |
movi a4, 1 |
|
| 47 |
minu a5, a2, a3 |
|
| 48 |
assert eq, a5, a4 |
|
| 49 |
|
|
| 50 |
movi a2, 1 |
|
| 51 |
movi a3, 0xffffffff |
|
| 52 |
movi a4, 1 |
|
| 53 |
minu a5, a2, a3 |
|
| 54 |
assert eq, a5, a4 |
|
| 55 |
|
|
| 56 |
movi a2, 0xffffffff |
|
| 57 |
movi a3, 1 |
|
| 58 |
movi a4, 1 |
|
| 59 |
minu a2, a2, a3 |
|
| 60 |
assert eq, a2, a4 |
|
| 61 |
|
|
| 62 |
movi a2, 0xffffffff |
|
| 63 |
movi a3, 1 |
|
| 64 |
movi a4, 1 |
|
| 65 |
minu a3, a2, a3 |
|
| 66 |
assert eq, a3, a4 |
|
| 67 |
|
|
| 68 |
movi a2, 1 |
|
| 69 |
movi a3, 0xffffffff |
|
| 70 |
movi a4, 1 |
|
| 71 |
minu a2, a2, a3 |
|
| 72 |
assert eq, a2, a4 |
|
| 73 |
|
|
| 74 |
movi a2, 1 |
|
| 75 |
movi a3, 0xffffffff |
|
| 76 |
movi a4, 1 |
|
| 77 |
minu a3, a2, a3 |
|
| 78 |
assert eq, a3, a4 |
|
| 79 |
test_end |
|
| 80 |
|
|
| 81 |
test_suite_end |
|
| b/tests/xtensa/test_mmu.S | ||
|---|---|---|
| 1 |
.include "macros.inc" |
|
| 2 |
|
|
| 3 |
test_suite mmu |
|
| 4 |
|
|
| 5 |
.purgem test |
|
| 6 |
|
|
| 7 |
.macro test name |
|
| 8 |
movi a2, 0x00000004 |
|
| 9 |
idtlb a2 |
|
| 10 |
movi a2, 0x00100004 |
|
| 11 |
idtlb a2 |
|
| 12 |
movi a2, 0x00200004 |
|
| 13 |
idtlb a2 |
|
| 14 |
movi a2, 0x00300004 |
|
| 15 |
idtlb a2 |
|
| 16 |
movi a2, 0x00000007 |
|
| 17 |
idtlb a2 |
|
| 18 |
.endm |
|
| 19 |
|
|
| 20 |
test tlb_group |
|
| 21 |
movi a2, 0x04000002 /* PPN */ |
|
| 22 |
movi a3, 0x01200004 /* VPN */ |
|
| 23 |
wdtlb a2, a3 |
|
| 24 |
witlb a2, a3 |
|
| 25 |
movi a3, 0x00200004 |
|
| 26 |
rdtlb0 a1, a3 |
|
| 27 |
ritlb0 a2, a3 |
|
| 28 |
movi a3, 0x01000001 |
|
| 29 |
assert eq, a1, a3 |
|
| 30 |
assert eq, a2, a3 |
|
| 31 |
movi a3, 0x00200004 |
|
| 32 |
rdtlb1 a1, a3 |
|
| 33 |
ritlb1 a2, a3 |
|
| 34 |
movi a3, 0x04000002 |
|
| 35 |
assert eq, a1, a3 |
|
| 36 |
assert eq, a2, a3 |
|
| 37 |
movi a3, 0x01234567 |
|
| 38 |
pdtlb a1, a3 |
|
| 39 |
pitlb a2, a3 |
|
| 40 |
movi a3, 0x01234014 |
|
| 41 |
assert eq, a1, a3 |
|
| 42 |
movi a3, 0x0123400c |
|
| 43 |
assert eq, a2, a3 |
|
| 44 |
movi a3, 0x00200004 |
|
| 45 |
idtlb a3 |
|
| 46 |
iitlb a3 |
|
| 47 |
movi a3, 0x01234567 |
|
| 48 |
pdtlb a1, a3 |
|
| 49 |
pitlb a2, a3 |
|
| 50 |
movi a3, 0x00000010 |
|
| 51 |
and a1, a1, a3 |
|
| 52 |
assert eqi, a1, 0 |
|
| 53 |
movi a3, 0x00000008 |
|
| 54 |
and a2, a2, a3 |
|
| 55 |
assert eqi, a2, 0 |
|
| 56 |
test_end |
|
| 57 |
|
|
| 58 |
test itlb_miss |
|
| 59 |
set_vector kernel, 1f |
|
| 60 |
|
|
| 61 |
movi a3, 0x00100000 |
|
| 62 |
jx a3 |
|
| 63 |
test_fail |
|
| 64 |
1: |
|
| 65 |
rsr a2, excvaddr |
|
| 66 |
assert eq, a2, a3 |
|
| 67 |
rsr a2, exccause |
|
| 68 |
movi a3, 16 |
|
| 69 |
assert eq, a2, a3 |
|
| 70 |
test_end |
|
| 71 |
|
|
| 72 |
test dtlb_miss |
|
| 73 |
set_vector kernel, 1f |
|
| 74 |
|
|
| 75 |
movi a3, 0x00100000 |
|
| 76 |
l8ui a2, a3, 0 |
|
| 77 |
test_fail |
|
| 78 |
1: |
|
| 79 |
rsr a2, excvaddr |
|
| 80 |
assert eq, a2, a3 |
|
| 81 |
rsr a2, exccause |
|
| 82 |
movi a3, 24 |
|
| 83 |
assert eq, a2, a3 |
|
| 84 |
test_end |
|
| 85 |
|
|
| 86 |
test itlb_multi_hit |
|
| 87 |
set_vector kernel, 1f |
|
| 88 |
|
|
| 89 |
movi a2, 0x04000002 /* PPN */ |
|
| 90 |
movi a3, 0xf0000004 /* VPN */ |
|
| 91 |
witlb a2, a3 |
|
| 92 |
movi a3, 0xf0000000 |
|
| 93 |
pitlb a2, a3 |
|
| 94 |
test_fail |
|
| 95 |
1: |
|
| 96 |
rsr a2, exccause |
|
| 97 |
movi a3, 17 |
|
| 98 |
assert eq, a2, a3 |
|
| 99 |
test_end |
|
| 100 |
|
|
| 101 |
test dtlb_multi_hit |
|
| 102 |
set_vector kernel, 1f |
|
| 103 |
|
|
| 104 |
movi a2, 0x04000002 /* PPN */ |
|
| 105 |
movi a3, 0x01200004 /* VPN */ |
|
| 106 |
wdtlb a2, a3 |
|
| 107 |
movi a3, 0x01200007 /* VPN */ |
|
| 108 |
wdtlb a2, a3 |
|
| 109 |
movi a3, 0x01200000 |
|
| 110 |
pdtlb a2, a3 |
|
| 111 |
test_fail |
|
| 112 |
1: |
|
| 113 |
rsr a2, exccause |
|
| 114 |
movi a3, 25 |
|
| 115 |
assert eq, a2, a3 |
|
| 116 |
test_end |
|
| 117 |
|
|
| 118 |
test inst_fetch_privilege |
|
| 119 |
set_vector kernel, 3f |
|
| 120 |
|
|
| 121 |
movi a2, 0x4004f |
|
| 122 |
wsr a2, ps |
|
| 123 |
1: |
|
| 124 |
isync |
|
| 125 |
nop |
|
| 126 |
2: |
|
| 127 |
test_fail |
|
| 128 |
3: |
|
| 129 |
movi a1, 1b |
|
| 130 |
rsr a2, excvaddr |
|
| 131 |
rsr a3, epc1 |
|
| 132 |
assert ge, a2, a1 |
|
| 133 |
assert ge, a3, a1 |
|
| 134 |
movi a1, 2b |
|
| 135 |
assert lt, a2, a1 |
|
| 136 |
assert lt, a3, a1 |
|
| 137 |
rsr a2, exccause |
|
| 138 |
movi a3, 18 |
|
| 139 |
assert eq, a2, a3 |
|
| 140 |
rsr a2, ps |
|
| 141 |
movi a3, 0x4005f |
|
| 142 |
assert eq, a2, a3 |
|
| 143 |
test_end |
|
| 144 |
|
|
| 145 |
test load_store_privilege |
|
| 146 |
set_vector kernel, 2f |
|
| 147 |
|
|
| 148 |
movi a3, 10f |
|
| 149 |
pitlb a3, a3 |
|
| 150 |
ritlb1 a2, a3 |
|
| 151 |
movi a1, 0x10 |
|
| 152 |
or a2, a2, a1 |
|
| 153 |
movi a1, 0x000ff000 |
|
| 154 |
and a3, a3, a1 |
|
| 155 |
movi a1, 4 |
|
| 156 |
or a3, a3, a1 |
|
| 157 |
witlb a2, a3 |
|
| 158 |
movi a3, 10f |
|
| 159 |
movi a1, 0x000fffff |
|
| 160 |
and a1, a3, a1 |
|
| 161 |
|
|
| 162 |
movi a2, 0x04000003 /* PPN */ |
|
| 163 |
movi a3, 0x01200004 /* VPN */ |
|
| 164 |
wdtlb a2, a3 |
|
| 165 |
movi a3, 0x01200001 |
|
| 166 |
movi a2, 0x4004f |
|
| 167 |
jx a1 |
|
| 168 |
10: |
|
| 169 |
wsr a2, ps |
|
| 170 |
isync |
|
| 171 |
1: |
|
| 172 |
l8ui a2, a3, 0 |
|
| 173 |
test_fail |
|
| 174 |
2: |
|
| 175 |
rsr a2, excvaddr |
|
| 176 |
assert eq, a2, a3 |
|
| 177 |
rsr a2, epc1 |
|
| 178 |
movi a3, 1b |
|
| 179 |
movi a1, 0x000fffff |
|
| 180 |
and a3, a3, a1 |
|
| 181 |
assert eq, a2, a3 |
|
| 182 |
rsr a2, exccause |
|
| 183 |
movi a3, 26 |
|
| 184 |
assert eq, a2, a3 |
|
| 185 |
rsr a2, ps |
|
| 186 |
movi a3, 0x4005f |
|
| 187 |
assert eq, a2, a3 |
|
| 188 |
test_end |
|
| 189 |
|
|
| 190 |
test cring_load_store_privilege |
|
| 191 |
set_vector kernel, 0 |
|
| 192 |
set_vector double, 2f |
|
| 193 |
|
|
| 194 |
movi a2, 0x04000003 /* PPN */ |
|
| 195 |
movi a3, 0x01200004 /* VPN */ |
|
| 196 |
wdtlb a2, a3 |
|
| 197 |
movi a3, 0x01200004 |
|
| 198 |
movi a2, 0x4005f /* ring 1 + excm => cring == 0 */ |
|
| 199 |
wsr a2, ps |
|
| 200 |
isync |
|
| 201 |
l8ui a2, a3, 0 /* cring used */ |
|
| 202 |
1: |
|
| 203 |
l32e a2, a3, -4 /* ring used */ |
|
| 204 |
test_fail |
|
| 205 |
2: |
|
| 206 |
rsr a2, excvaddr |
|
| 207 |
addi a2, a2, 4 |
|
| 208 |
assert eq, a2, a3 |
|
| 209 |
rsr a2, depc |
|
| 210 |
movi a3, 1b |
|
| 211 |
assert eq, a2, a3 |
|
| 212 |
rsr a2, exccause |
|
| 213 |
movi a3, 26 |
|
| 214 |
assert eq, a2, a3 |
|
| 215 |
rsr a2, ps |
|
| 216 |
movi a3, 0x4005f |
|
| 217 |
assert eq, a2, a3 |
|
| 218 |
test_end |
|
| 219 |
|
|
| 220 |
test inst_fetch_prohibited |
|
| 221 |
set_vector kernel, 2f |
|
| 222 |
|
|
| 223 |
movi a3, 10f |
|
| 224 |
pitlb a3, a3 |
|
| 225 |
ritlb1 a2, a3 |
|
| 226 |
movi a1, 0xfffff000 |
|
| 227 |
and a2, a2, a1 |
|
| 228 |
movi a1, 0x4 |
|
| 229 |
or a2, a2, a1 |
|
| 230 |
movi a1, 0x000ff000 |
|
| 231 |
and a3, a3, a1 |
|
| 232 |
movi a1, 4 |
|
| 233 |
or a3, a3, a1 |
|
| 234 |
witlb a2, a3 |
|
| 235 |
movi a3, 10f |
|
| 236 |
movi a1, 0x000fffff |
|
Also available in: Unified diff