Revision 7de141cb
b/target-cris/translate.c | ||
---|---|---|
227 | 227 |
} |
228 | 228 |
} |
229 | 229 |
|
230 |
static int cris_fetch(DisasContext *dc, uint32_t addr, |
|
231 |
unsigned int size, unsigned int sign) |
|
232 |
{ |
|
233 |
int r; |
|
234 |
|
|
235 |
switch (size) { |
|
236 |
case 4: |
|
237 |
{ |
|
238 |
r = ldl_code(addr); |
|
239 |
break; |
|
240 |
} |
|
241 |
case 2: |
|
242 |
{ |
|
243 |
if (sign) { |
|
244 |
r = ldsw_code(addr); |
|
245 |
} else { |
|
246 |
r = lduw_code(addr); |
|
247 |
} |
|
248 |
break; |
|
249 |
} |
|
250 |
case 1: |
|
251 |
{ |
|
252 |
if (sign) { |
|
253 |
r = ldsb_code(addr); |
|
254 |
} else { |
|
255 |
r = ldub_code(addr); |
|
256 |
} |
|
257 |
break; |
|
258 |
} |
|
259 |
default: |
|
260 |
cpu_abort(dc->env, "Invalid fetch size %d\n", size); |
|
261 |
break; |
|
262 |
} |
|
263 |
return r; |
|
264 |
} |
|
265 |
|
|
230 | 266 |
static void cris_lock_irq(DisasContext *dc) |
231 | 267 |
{ |
232 | 268 |
dc->clear_locked_irq = 0; |
... | ... | |
1306 | 1342 |
if (memsize == 1) |
1307 | 1343 |
insn_len++; |
1308 | 1344 |
|
1309 |
if (memsize != 4) { |
|
1310 |
if (s_ext) { |
|
1311 |
if (memsize == 1) |
|
1312 |
imm = ldsb_code(dc->pc + 2); |
|
1313 |
else |
|
1314 |
imm = ldsw_code(dc->pc + 2); |
|
1315 |
} else { |
|
1316 |
if (memsize == 1) |
|
1317 |
imm = ldub_code(dc->pc + 2); |
|
1318 |
else |
|
1319 |
imm = lduw_code(dc->pc + 2); |
|
1320 |
} |
|
1321 |
} else |
|
1322 |
imm = ldl_code(dc->pc + 2); |
|
1323 |
|
|
1345 |
imm = cris_fetch(dc, dc->pc + 2, memsize, s_ext); |
|
1324 | 1346 |
tcg_gen_movi_tl(dst, imm); |
1325 | 1347 |
dc->postinc = 0; |
1326 | 1348 |
} else { |
... | ... | |
2758 | 2780 |
rd = dc->op2; |
2759 | 2781 |
|
2760 | 2782 |
cris_cc_mask(dc, 0); |
2761 |
imm = ldl_code(dc->pc + 2);
|
|
2783 |
imm = cris_fetch(dc, dc->pc + 2, 4, 0);
|
|
2762 | 2784 |
LOG_DIS("lapc 0x%x, $r%u\n", imm + dc->pc, dc->op2); |
2763 | 2785 |
|
2764 | 2786 |
pc = dc->pc; |
... | ... | |
2801 | 2823 |
{ |
2802 | 2824 |
uint32_t imm; |
2803 | 2825 |
|
2804 |
imm = ldl_code(dc->pc + 2);
|
|
2826 |
imm = cris_fetch(dc, dc->pc + 2, 4, 0);
|
|
2805 | 2827 |
|
2806 | 2828 |
LOG_DIS("jas 0x%x\n", imm); |
2807 | 2829 |
cris_cc_mask(dc, 0); |
... | ... | |
2817 | 2839 |
{ |
2818 | 2840 |
uint32_t imm; |
2819 | 2841 |
|
2820 |
imm = ldl_code(dc->pc + 2);
|
|
2842 |
imm = cris_fetch(dc, dc->pc + 2, 4, 0);
|
|
2821 | 2843 |
|
2822 | 2844 |
LOG_DIS("jasc 0x%x\n", imm); |
2823 | 2845 |
cris_cc_mask(dc, 0); |
... | ... | |
2845 | 2867 |
int32_t offset; |
2846 | 2868 |
uint32_t cond = dc->op2; |
2847 | 2869 |
|
2848 |
offset = ldsw_code(dc->pc + 2);
|
|
2870 |
offset = cris_fetch(dc, dc->pc + 2, 2, 1);
|
|
2849 | 2871 |
|
2850 | 2872 |
LOG_DIS("b%s %d pc=%x dst=%x\n", |
2851 | 2873 |
cc_name(cond), offset, |
... | ... | |
2862 | 2884 |
int32_t simm; |
2863 | 2885 |
|
2864 | 2886 |
|
2865 |
simm = ldl_code(dc->pc + 2);
|
|
2887 |
simm = cris_fetch(dc, dc->pc + 2, 4, 0);
|
|
2866 | 2888 |
|
2867 | 2889 |
LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2); |
2868 | 2890 |
cris_cc_mask(dc, 0); |
... | ... | |
2877 | 2899 |
static int dec_basc_im(DisasContext *dc) |
2878 | 2900 |
{ |
2879 | 2901 |
int32_t simm; |
2880 |
simm = ldl_code(dc->pc + 2);
|
|
2902 |
simm = cris_fetch(dc, dc->pc + 2, 4, 0);
|
|
2881 | 2903 |
|
2882 | 2904 |
LOG_DIS("basc 0x%x, $p%u\n", dc->pc + simm, dc->op2); |
2883 | 2905 |
cris_cc_mask(dc, 0); |
... | ... | |
3075 | 3097 |
tcg_gen_debug_insn_start(dc->pc); |
3076 | 3098 |
|
3077 | 3099 |
/* Load a halfword onto the instruction register. */ |
3078 |
dc->ir = lduw_code(dc->pc);
|
|
3100 |
dc->ir = cris_fetch(dc, dc->pc, 2, 0);
|
|
3079 | 3101 |
|
3080 | 3102 |
/* Now decode it. */ |
3081 | 3103 |
dc->opcode = EXTRACT_FIELD(dc->ir, 4, 11); |
Also available in: Unified diff