root / tcg / tcg-op.h @ 7e4597d7
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifdef CONFIG_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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|
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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|
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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|
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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|
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{
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if (GET_TCGV(ret) != GET_TCGV(arg))
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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|
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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|
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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|
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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|
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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|
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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|
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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|
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
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|
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{
|
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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|
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{
|
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
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} |
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|
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
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tcg_gen_movi_i32(ret, 0);
|
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} else if (arg2 == 0xffffffff) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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|
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{
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tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
| 371 |
} |
| 372 |
|
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{
|
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/* some cases can be optimized here */
|
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if (arg2 == 0xffffffff) { |
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tcg_gen_movi_i32(ret, 0xffffffff);
|
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} else if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
| 380 |
} else {
|
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tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
| 384 |
|
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static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{
|
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
| 388 |
} |
| 389 |
|
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{
|
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
|
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tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
| 399 |
|
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 401 |
{
|
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
| 403 |
} |
| 404 |
|
| 405 |
static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
| 406 |
{
|
| 407 |
if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
| 409 |
} else {
|
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tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
| 411 |
} |
| 412 |
} |
| 413 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 415 |
{
|
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
| 417 |
} |
| 418 |
|
| 419 |
static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
| 420 |
{
|
| 421 |
if (arg2 == 0) { |
| 422 |
tcg_gen_mov_i32(ret, arg1); |
| 423 |
} else {
|
| 424 |
tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
| 425 |
} |
| 426 |
} |
| 427 |
|
| 428 |
static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 429 |
{
|
| 430 |
tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
| 431 |
} |
| 432 |
|
| 433 |
static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
| 434 |
{
|
| 435 |
if (arg2 == 0) { |
| 436 |
tcg_gen_mov_i32(ret, arg1); |
| 437 |
} else {
|
| 438 |
tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
| 439 |
} |
| 440 |
} |
| 441 |
|
| 442 |
static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
| 443 |
int label_index)
|
| 444 |
{
|
| 445 |
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
| 446 |
} |
| 447 |
|
| 448 |
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 449 |
{
|
| 450 |
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
| 451 |
} |
| 452 |
|
| 453 |
static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
| 454 |
{
|
| 455 |
tcg_gen_mul_i32(ret, arg1, tcg_const_i32(arg2)); |
| 456 |
} |
| 457 |
|
| 458 |
#ifdef TCG_TARGET_HAS_div_i32
|
| 459 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 460 |
{
|
| 461 |
tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
| 462 |
} |
| 463 |
|
| 464 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 465 |
{
|
| 466 |
tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
| 467 |
} |
| 468 |
|
| 469 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 470 |
{
|
| 471 |
tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
| 472 |
} |
| 473 |
|
| 474 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 475 |
{
|
| 476 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
| 477 |
} |
| 478 |
#else
|
| 479 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 480 |
{
|
| 481 |
TCGv t0; |
| 482 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 483 |
tcg_gen_sari_i32(t0, arg1, 31);
|
| 484 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
| 485 |
} |
| 486 |
|
| 487 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 488 |
{
|
| 489 |
TCGv t0; |
| 490 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 491 |
tcg_gen_sari_i32(t0, arg1, 31);
|
| 492 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
| 493 |
} |
| 494 |
|
| 495 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 496 |
{
|
| 497 |
TCGv t0; |
| 498 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 499 |
tcg_gen_movi_i32(t0, 0);
|
| 500 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
| 501 |
} |
| 502 |
|
| 503 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
| 504 |
{
|
| 505 |
TCGv t0; |
| 506 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 507 |
tcg_gen_movi_i32(t0, 0);
|
| 508 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
| 509 |
} |
| 510 |
#endif
|
| 511 |
|
| 512 |
#if TCG_TARGET_REG_BITS == 32 |
| 513 |
|
| 514 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
| 515 |
{
|
| 516 |
if (GET_TCGV(ret) != GET_TCGV(arg)) {
|
| 517 |
tcg_gen_mov_i32(ret, arg); |
| 518 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
| 519 |
} |
| 520 |
} |
| 521 |
|
| 522 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
| 523 |
{
|
| 524 |
tcg_gen_movi_i32(ret, arg); |
| 525 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
| 526 |
} |
| 527 |
|
| 528 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 529 |
{
|
| 530 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
| 531 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 532 |
} |
| 533 |
|
| 534 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 535 |
{
|
| 536 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
| 537 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 538 |
} |
| 539 |
|
| 540 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 541 |
{
|
| 542 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
| 543 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 544 |
} |
| 545 |
|
| 546 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 547 |
{
|
| 548 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
| 549 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 550 |
} |
| 551 |
|
| 552 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 553 |
{
|
| 554 |
tcg_gen_ld_i32(ret, arg2, offset); |
| 555 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 556 |
} |
| 557 |
|
| 558 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 559 |
{
|
| 560 |
tcg_gen_ld_i32(ret, arg2, offset); |
| 561 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 562 |
} |
| 563 |
|
| 564 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 565 |
{
|
| 566 |
/* since arg2 and ret have different types, they cannot be the
|
| 567 |
same temporary */
|
| 568 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
| 569 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
| 570 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
| 571 |
#else
|
| 572 |
tcg_gen_ld_i32(ret, arg2, offset); |
| 573 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
| 574 |
#endif
|
| 575 |
} |
| 576 |
|
| 577 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
| 578 |
{
|
| 579 |
tcg_gen_st8_i32(arg1, arg2, offset); |
| 580 |
} |
| 581 |
|
| 582 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
| 583 |
{
|
| 584 |
tcg_gen_st16_i32(arg1, arg2, offset); |
| 585 |
} |
| 586 |
|
| 587 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
| 588 |
{
|
| 589 |
tcg_gen_st_i32(arg1, arg2, offset); |
| 590 |
} |
| 591 |
|
| 592 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
| 593 |
{
|
| 594 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
| 595 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
| 596 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
| 597 |
#else
|
| 598 |
tcg_gen_st_i32(arg1, arg2, offset); |
| 599 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
| 600 |
#endif
|
| 601 |
} |
| 602 |
|
| 603 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 604 |
{
|
| 605 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
| 606 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
| 607 |
} |
| 608 |
|
| 609 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 610 |
{
|
| 611 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
| 612 |
} |
| 613 |
|
| 614 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 615 |
{
|
| 616 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
| 617 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
| 618 |
} |
| 619 |
|
| 620 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 621 |
{
|
| 622 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
| 623 |
} |
| 624 |
|
| 625 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 626 |
{
|
| 627 |
tcg_gen_and_i32(ret, arg1, arg2); |
| 628 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
| 629 |
} |
| 630 |
|
| 631 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 632 |
{
|
| 633 |
tcg_gen_andi_i32(ret, arg1, arg2); |
| 634 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
| 635 |
} |
| 636 |
|
| 637 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 638 |
{
|
| 639 |
tcg_gen_or_i32(ret, arg1, arg2); |
| 640 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
| 641 |
} |
| 642 |
|
| 643 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 644 |
{
|
| 645 |
tcg_gen_ori_i32(ret, arg1, arg2); |
| 646 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
| 647 |
} |
| 648 |
|
| 649 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 650 |
{
|
| 651 |
tcg_gen_xor_i32(ret, arg1, arg2); |
| 652 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
| 653 |
} |
| 654 |
|
| 655 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 656 |
{
|
| 657 |
tcg_gen_xori_i32(ret, arg1, arg2); |
| 658 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
| 659 |
} |
| 660 |
|
| 661 |
/* XXX: use generic code when basic block handling is OK or CPU
|
| 662 |
specific code (x86) */
|
| 663 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 664 |
{
|
| 665 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
| 666 |
} |
| 667 |
|
| 668 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 669 |
{
|
| 670 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
| 671 |
} |
| 672 |
|
| 673 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 674 |
{
|
| 675 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
| 676 |
} |
| 677 |
|
| 678 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 679 |
{
|
| 680 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
| 681 |
} |
| 682 |
|
| 683 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 684 |
{
|
| 685 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
| 686 |
} |
| 687 |
|
| 688 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 689 |
{
|
| 690 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
| 691 |
} |
| 692 |
|
| 693 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
| 694 |
int label_index)
|
| 695 |
{
|
| 696 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
| 697 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
| 698 |
cond, label_index); |
| 699 |
} |
| 700 |
|
| 701 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 702 |
{
|
| 703 |
TCGv t0, t1; |
| 704 |
|
| 705 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
| 706 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
| 707 |
|
| 708 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
| 709 |
|
| 710 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
| 711 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
| 712 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
| 713 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
| 714 |
|
| 715 |
tcg_gen_mov_i64(ret, t0); |
| 716 |
} |
| 717 |
|
| 718 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 719 |
{
|
| 720 |
tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); |
| 721 |
} |
| 722 |
|
| 723 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 724 |
{
|
| 725 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
| 726 |
} |
| 727 |
|
| 728 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 729 |
{
|
| 730 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
| 731 |
} |
| 732 |
|
| 733 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 734 |
{
|
| 735 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
| 736 |
} |
| 737 |
|
| 738 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 739 |
{
|
| 740 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
| 741 |
} |
| 742 |
|
| 743 |
#else
|
| 744 |
|
| 745 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
| 746 |
{
|
| 747 |
if (GET_TCGV(ret) != GET_TCGV(arg))
|
| 748 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
| 749 |
} |
| 750 |
|
| 751 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
| 752 |
{
|
| 753 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
| 754 |
} |
| 755 |
|
| 756 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
| 757 |
tcg_target_long offset) |
| 758 |
{
|
| 759 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
| 760 |
} |
| 761 |
|
| 762 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
| 763 |
tcg_target_long offset) |
| 764 |
{
|
| 765 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
| 766 |
} |
| 767 |
|
| 768 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
| 769 |
tcg_target_long offset) |
| 770 |
{
|
| 771 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
| 772 |
} |
| 773 |
|
| 774 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
| 775 |
tcg_target_long offset) |
| 776 |
{
|
| 777 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
| 778 |
} |
| 779 |
|
| 780 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
| 781 |
tcg_target_long offset) |
| 782 |
{
|
| 783 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
| 784 |
} |
| 785 |
|
| 786 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
| 787 |
tcg_target_long offset) |
| 788 |
{
|
| 789 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
| 790 |
} |
| 791 |
|
| 792 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
| 793 |
{
|
| 794 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
| 795 |
} |
| 796 |
|
| 797 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
| 798 |
tcg_target_long offset) |
| 799 |
{
|
| 800 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
| 801 |
} |
| 802 |
|
| 803 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
| 804 |
tcg_target_long offset) |
| 805 |
{
|
| 806 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
| 807 |
} |
| 808 |
|
| 809 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
| 810 |
tcg_target_long offset) |
| 811 |
{
|
| 812 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
| 813 |
} |
| 814 |
|
| 815 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
| 816 |
{
|
| 817 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
| 818 |
} |
| 819 |
|
| 820 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 821 |
{
|
| 822 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
| 823 |
} |
| 824 |
|
| 825 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 826 |
{
|
| 827 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
| 828 |
} |
| 829 |
|
| 830 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 831 |
{
|
| 832 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
| 833 |
} |
| 834 |
|
| 835 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 836 |
{
|
| 837 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
| 838 |
} |
| 839 |
|
| 840 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 841 |
{
|
| 842 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
| 843 |
} |
| 844 |
|
| 845 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 846 |
{
|
| 847 |
tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
| 848 |
} |
| 849 |
|
| 850 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 851 |
{
|
| 852 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
| 853 |
} |
| 854 |
|
| 855 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 856 |
{
|
| 857 |
tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
| 858 |
} |
| 859 |
|
| 860 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 861 |
{
|
| 862 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
| 863 |
} |
| 864 |
|
| 865 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 866 |
{
|
| 867 |
tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
| 868 |
} |
| 869 |
|
| 870 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 871 |
{
|
| 872 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
| 873 |
} |
| 874 |
|
| 875 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 876 |
{
|
| 877 |
if (arg2 == 0) { |
| 878 |
tcg_gen_mov_i64(ret, arg1); |
| 879 |
} else {
|
| 880 |
tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
| 881 |
} |
| 882 |
} |
| 883 |
|
| 884 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 885 |
{
|
| 886 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
| 887 |
} |
| 888 |
|
| 889 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 890 |
{
|
| 891 |
if (arg2 == 0) { |
| 892 |
tcg_gen_mov_i64(ret, arg1); |
| 893 |
} else {
|
| 894 |
tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
| 895 |
} |
| 896 |
} |
| 897 |
|
| 898 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 899 |
{
|
| 900 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
| 901 |
} |
| 902 |
|
| 903 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 904 |
{
|
| 905 |
if (arg2 == 0) { |
| 906 |
tcg_gen_mov_i64(ret, arg1); |
| 907 |
} else {
|
| 908 |
tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
| 909 |
} |
| 910 |
} |
| 911 |
|
| 912 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
| 913 |
int label_index)
|
| 914 |
{
|
| 915 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
| 916 |
} |
| 917 |
|
| 918 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 919 |
{
|
| 920 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
| 921 |
} |
| 922 |
|
| 923 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 924 |
{
|
| 925 |
tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); |
| 926 |
} |
| 927 |
|
| 928 |
#ifdef TCG_TARGET_HAS_div_i64
|
| 929 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 930 |
{
|
| 931 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
| 932 |
} |
| 933 |
|
| 934 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 935 |
{
|
| 936 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
| 937 |
} |
| 938 |
|
| 939 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 940 |
{
|
| 941 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
| 942 |
} |
| 943 |
|
| 944 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 945 |
{
|
| 946 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
| 947 |
} |
| 948 |
#else
|
| 949 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 950 |
{
|
| 951 |
TCGv t0; |
| 952 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
| 953 |
tcg_gen_sari_i64(t0, arg1, 63);
|
| 954 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
| 955 |
} |
| 956 |
|
| 957 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 958 |
{
|
| 959 |
TCGv t0; |
| 960 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
| 961 |
tcg_gen_sari_i64(t0, arg1, 63);
|
| 962 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
| 963 |
} |
| 964 |
|
| 965 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 966 |
{
|
| 967 |
TCGv t0; |
| 968 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
| 969 |
tcg_gen_movi_i64(t0, 0);
|
| 970 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
| 971 |
} |
| 972 |
|
| 973 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
| 974 |
{
|
| 975 |
TCGv t0; |
| 976 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
| 977 |
tcg_gen_movi_i64(t0, 0);
|
| 978 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
| 979 |
} |
| 980 |
#endif
|
| 981 |
|
| 982 |
#endif
|
| 983 |
|
| 984 |
/***************************************/
|
| 985 |
/* optional operations */
|
| 986 |
|
| 987 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
| 988 |
{
|
| 989 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
| 990 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
| 991 |
#else
|
| 992 |
tcg_gen_shli_i32(ret, arg, 24);
|
| 993 |
tcg_gen_sari_i32(ret, ret, 24);
|
| 994 |
#endif
|
| 995 |
} |
| 996 |
|
| 997 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
| 998 |
{
|
| 999 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
| 1000 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
| 1001 |
#else
|
| 1002 |
tcg_gen_shli_i32(ret, arg, 16);
|
| 1003 |
tcg_gen_sari_i32(ret, ret, 16);
|
| 1004 |
#endif
|
| 1005 |
} |
| 1006 |
|
| 1007 |
/* These are currently just for convenience.
|
| 1008 |
We assume a target will recognise these automatically . */
|
| 1009 |
static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
| 1010 |
{
|
| 1011 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
| 1012 |
} |
| 1013 |
|
| 1014 |
static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
| 1015 |
{
|
| 1016 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
| 1017 |
} |
| 1018 |
|
| 1019 |
/* Note: we assume the two high bytes are set to zero */
|
| 1020 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
| 1021 |
{
|
| 1022 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
| 1023 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
| 1024 |
#else
|
| 1025 |
TCGv t0, t1; |
| 1026 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1027 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1028 |
|
| 1029 |
tcg_gen_shri_i32(t0, arg, 8);
|
| 1030 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
| 1031 |
tcg_gen_shli_i32(t1, t1, 8);
|
| 1032 |
tcg_gen_or_i32(ret, t0, t1); |
| 1033 |
#endif
|
| 1034 |
} |
| 1035 |
|
| 1036 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
| 1037 |
{
|
| 1038 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
| 1039 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
| 1040 |
#else
|
| 1041 |
TCGv t0, t1; |
| 1042 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1043 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1044 |
|
| 1045 |
tcg_gen_shli_i32(t0, arg, 24);
|
| 1046 |
|
| 1047 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
| 1048 |
tcg_gen_shli_i32(t1, t1, 8);
|
| 1049 |
tcg_gen_or_i32(t0, t0, t1); |
| 1050 |
|
| 1051 |
tcg_gen_shri_i32(t1, arg, 8);
|
| 1052 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
| 1053 |
tcg_gen_or_i32(t0, t0, t1); |
| 1054 |
|
| 1055 |
tcg_gen_shri_i32(t1, arg, 24);
|
| 1056 |
tcg_gen_or_i32(ret, t0, t1); |
| 1057 |
#endif
|
| 1058 |
} |
| 1059 |
|
| 1060 |
#if TCG_TARGET_REG_BITS == 32 |
| 1061 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
| 1062 |
{
|
| 1063 |
tcg_gen_ext8s_i32(ret, arg); |
| 1064 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1065 |
} |
| 1066 |
|
| 1067 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
| 1068 |
{
|
| 1069 |
tcg_gen_ext16s_i32(ret, arg); |
| 1070 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1071 |
} |
| 1072 |
|
| 1073 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
| 1074 |
{
|
| 1075 |
tcg_gen_mov_i32(ret, arg); |
| 1076 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1077 |
} |
| 1078 |
|
| 1079 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
| 1080 |
{
|
| 1081 |
tcg_gen_ext8u_i32(ret, arg); |
| 1082 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1083 |
} |
| 1084 |
|
| 1085 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
| 1086 |
{
|
| 1087 |
tcg_gen_ext16u_i32(ret, arg); |
| 1088 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1089 |
} |
| 1090 |
|
| 1091 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
| 1092 |
{
|
| 1093 |
tcg_gen_mov_i32(ret, arg); |
| 1094 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1095 |
} |
| 1096 |
|
| 1097 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
| 1098 |
{
|
| 1099 |
tcg_gen_mov_i32(ret, arg); |
| 1100 |
} |
| 1101 |
|
| 1102 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
| 1103 |
{
|
| 1104 |
tcg_gen_mov_i32(ret, arg); |
| 1105 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1106 |
} |
| 1107 |
|
| 1108 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
| 1109 |
{
|
| 1110 |
tcg_gen_mov_i32(ret, arg); |
| 1111 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1112 |
} |
| 1113 |
|
| 1114 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
| 1115 |
{
|
| 1116 |
TCGv t0, t1; |
| 1117 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1118 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1119 |
|
| 1120 |
tcg_gen_bswap_i32(t0, arg); |
| 1121 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
| 1122 |
tcg_gen_mov_i32(ret, t1); |
| 1123 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
| 1124 |
} |
| 1125 |
#else
|
| 1126 |
|
| 1127 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
| 1128 |
{
|
| 1129 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
| 1130 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
| 1131 |
#else
|
| 1132 |
tcg_gen_shli_i64(ret, arg, 56);
|
| 1133 |
tcg_gen_sari_i64(ret, ret, 56);
|
| 1134 |
#endif
|
| 1135 |
} |
| 1136 |
|
| 1137 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
| 1138 |
{
|
| 1139 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
| 1140 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
| 1141 |
#else
|
| 1142 |
tcg_gen_shli_i64(ret, arg, 48);
|
| 1143 |
tcg_gen_sari_i64(ret, ret, 48);
|
| 1144 |
#endif
|
| 1145 |
} |
| 1146 |
|
| 1147 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
| 1148 |
{
|
| 1149 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
| 1150 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
| 1151 |
#else
|
| 1152 |
tcg_gen_shli_i64(ret, arg, 32);
|
| 1153 |
tcg_gen_sari_i64(ret, ret, 32);
|
| 1154 |
#endif
|
| 1155 |
} |
| 1156 |
|
| 1157 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
| 1158 |
{
|
| 1159 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
| 1160 |
} |
| 1161 |
|
| 1162 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
| 1163 |
{
|
| 1164 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
| 1165 |
} |
| 1166 |
|
| 1167 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
| 1168 |
{
|
| 1169 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
| 1170 |
} |
| 1171 |
|
| 1172 |
/* Note: we assume the target supports move between 32 and 64 bit
|
| 1173 |
registers. This will probably break MIPS64 targets. */
|
| 1174 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
| 1175 |
{
|
| 1176 |
tcg_gen_mov_i32(ret, arg); |
| 1177 |
} |
| 1178 |
|
| 1179 |
/* Note: we assume the target supports move between 32 and 64 bit
|
| 1180 |
registers */
|
| 1181 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
| 1182 |
{
|
| 1183 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
| 1184 |
} |
| 1185 |
|
| 1186 |
/* Note: we assume the target supports move between 32 and 64 bit
|
| 1187 |
registers */
|
| 1188 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
| 1189 |
{
|
| 1190 |
tcg_gen_ext32s_i64(ret, arg); |
| 1191 |
} |
| 1192 |
|
| 1193 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
| 1194 |
{
|
| 1195 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
| 1196 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
| 1197 |
#else
|
| 1198 |
TCGv t0, t1; |
| 1199 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1200 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1201 |
|
| 1202 |
tcg_gen_shli_i64(t0, arg, 56);
|
| 1203 |
|
| 1204 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
| 1205 |
tcg_gen_shli_i64(t1, t1, 40);
|
| 1206 |
tcg_gen_or_i64(t0, t0, t1); |
| 1207 |
|
| 1208 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
| 1209 |
tcg_gen_shli_i64(t1, t1, 24);
|
| 1210 |
tcg_gen_or_i64(t0, t0, t1); |
| 1211 |
|
| 1212 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
| 1213 |
tcg_gen_shli_i64(t1, t1, 8);
|
| 1214 |
tcg_gen_or_i64(t0, t0, t1); |
| 1215 |
|
| 1216 |
tcg_gen_shri_i64(t1, arg, 8);
|
| 1217 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
| 1218 |
tcg_gen_or_i64(t0, t0, t1); |
| 1219 |
|
| 1220 |
tcg_gen_shri_i64(t1, arg, 24);
|
| 1221 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
| 1222 |
tcg_gen_or_i64(t0, t0, t1); |
| 1223 |
|
| 1224 |
tcg_gen_shri_i64(t1, arg, 40);
|
| 1225 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
| 1226 |
tcg_gen_or_i64(t0, t0, t1); |
| 1227 |
|
| 1228 |
tcg_gen_shri_i64(t1, arg, 56);
|
| 1229 |
tcg_gen_or_i64(ret, t0, t1); |
| 1230 |
#endif
|
| 1231 |
} |
| 1232 |
|
| 1233 |
#endif
|
| 1234 |
|
| 1235 |
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
| 1236 |
{
|
| 1237 |
#ifdef TCG_TARGET_HAS_neg_i32
|
| 1238 |
tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
| 1239 |
#else
|
| 1240 |
tcg_gen_sub_i32(ret, tcg_const_i32(0), arg);
|
| 1241 |
#endif
|
| 1242 |
} |
| 1243 |
|
| 1244 |
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
| 1245 |
{
|
| 1246 |
#ifdef TCG_TARGET_HAS_neg_i64
|
| 1247 |
tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
| 1248 |
#else
|
| 1249 |
tcg_gen_sub_i64(ret, tcg_const_i64(0), arg);
|
| 1250 |
#endif
|
| 1251 |
} |
| 1252 |
|
| 1253 |
static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
| 1254 |
{
|
| 1255 |
tcg_gen_xor_i32(ret, arg, tcg_const_i32(-1));
|
| 1256 |
} |
| 1257 |
|
| 1258 |
static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) |
| 1259 |
{
|
| 1260 |
tcg_gen_xor_i64(ret, arg, tcg_const_i64(-1));
|
| 1261 |
} |
| 1262 |
|
| 1263 |
static inline void tcg_gen_discard_i32(TCGv arg) |
| 1264 |
{
|
| 1265 |
tcg_gen_op1(INDEX_op_discard, arg); |
| 1266 |
} |
| 1267 |
|
| 1268 |
#if TCG_TARGET_REG_BITS == 32 |
| 1269 |
static inline void tcg_gen_discard_i64(TCGv arg) |
| 1270 |
{
|
| 1271 |
tcg_gen_discard_i32(arg); |
| 1272 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
| 1273 |
} |
| 1274 |
#else
|
| 1275 |
static inline void tcg_gen_discard_i64(TCGv arg) |
| 1276 |
{
|
| 1277 |
tcg_gen_op1(INDEX_op_discard, arg); |
| 1278 |
} |
| 1279 |
#endif
|
| 1280 |
|
| 1281 |
/***************************************/
|
| 1282 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
| 1283 |
{
|
| 1284 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
| 1285 |
} |
| 1286 |
|
| 1287 |
/***************************************/
|
| 1288 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
| 1289 |
type. */
|
| 1290 |
#ifndef TARGET_LONG_BITS
|
| 1291 |
#error must include QEMU headers
|
| 1292 |
#endif
|
| 1293 |
|
| 1294 |
/* debug info: write the PC of the corresponding QEMU CPU instruction */
|
| 1295 |
static inline void tcg_gen_debug_insn_start(uint64_t pc) |
| 1296 |
{
|
| 1297 |
/* XXX: must really use a 32 bit size for TCGArg in all cases */
|
| 1298 |
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
|
| 1299 |
tcg_gen_op2i(INDEX_op_debug_insn_start, |
| 1300 |
(uint32_t)(pc), (uint32_t)(pc >> 32));
|
| 1301 |
#else
|
| 1302 |
tcg_gen_op1i(INDEX_op_debug_insn_start, pc); |
| 1303 |
#endif
|
| 1304 |
} |
| 1305 |
|
| 1306 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
| 1307 |
{
|
| 1308 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
| 1309 |
} |
| 1310 |
|
| 1311 |
static inline void tcg_gen_goto_tb(int idx) |
| 1312 |
{
|
| 1313 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
| 1314 |
} |
| 1315 |
|
| 1316 |
#if TCG_TARGET_REG_BITS == 32 |
| 1317 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
| 1318 |
{
|
| 1319 |
#if TARGET_LONG_BITS == 32 |
| 1320 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
| 1321 |
#else
|
| 1322 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1323 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1324 |
#endif
|
| 1325 |
} |
| 1326 |
|
| 1327 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
| 1328 |
{
|
| 1329 |
#if TARGET_LONG_BITS == 32 |
| 1330 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
| 1331 |
#else
|
| 1332 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1333 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1334 |
#endif
|
| 1335 |
} |
| 1336 |
|
| 1337 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
| 1338 |
{
|
| 1339 |
#if TARGET_LONG_BITS == 32 |
| 1340 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
| 1341 |
#else
|
| 1342 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1343 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1344 |
#endif
|
| 1345 |
} |
| 1346 |
|
| 1347 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
| 1348 |
{
|
| 1349 |
#if TARGET_LONG_BITS == 32 |
| 1350 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
| 1351 |
#else
|
| 1352 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1353 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1354 |
#endif
|
| 1355 |
} |
| 1356 |
|
| 1357 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
| 1358 |
{
|
| 1359 |
#if TARGET_LONG_BITS == 32 |
| 1360 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
| 1361 |
#else
|
| 1362 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1363 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
| 1364 |
#endif
|
| 1365 |
} |
| 1366 |
|
| 1367 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
| 1368 |
{
|
| 1369 |
#if TARGET_LONG_BITS == 32 |
| 1370 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
| 1371 |
#else
|
| 1372 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1373 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
| 1374 |
#endif
|
| 1375 |
} |
| 1376 |
|
| 1377 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
| 1378 |
{
|
| 1379 |
#if TARGET_LONG_BITS == 32 |
| 1380 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
| 1381 |
#else
|
| 1382 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
| 1383 |
addr, TCGV_HIGH(addr), mem_index); |
| 1384 |
#endif
|
| 1385 |
} |
| 1386 |
|
| 1387 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
| 1388 |
{
|
| 1389 |
#if TARGET_LONG_BITS == 32 |
| 1390 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
| 1391 |
#else
|
| 1392 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
| 1393 |
#endif
|
| 1394 |
} |
| 1395 |
|
| 1396 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
| 1397 |
{
|
| 1398 |
#if TARGET_LONG_BITS == 32 |
| 1399 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
| 1400 |
#else
|
| 1401 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
| 1402 |
#endif
|
| 1403 |
} |
| 1404 |
|
| 1405 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
| 1406 |
{
|
| 1407 |
#if TARGET_LONG_BITS == 32 |
| 1408 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
| 1409 |
#else
|
| 1410 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
| 1411 |
#endif
|
| 1412 |
} |
| 1413 |
|
| 1414 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
| 1415 |
{
|
| 1416 |
#if TARGET_LONG_BITS == 32 |
| 1417 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
| 1418 |
#else
|
| 1419 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
| 1420 |
addr, TCGV_HIGH(addr), mem_index); |
| 1421 |
#endif
|
| 1422 |
} |
| 1423 |
|
| 1424 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
| 1425 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
| 1426 |
|
| 1427 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
| 1428 |
|
| 1429 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
| 1430 |
{
|
| 1431 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
| 1432 |
} |
| 1433 |
|
| 1434 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
| 1435 |
{
|
| 1436 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
| 1437 |
} |
| 1438 |
|
| 1439 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
| 1440 |
{
|
| 1441 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
| 1442 |
} |
| 1443 |
|
| 1444 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
| 1445 |
{
|
| 1446 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
| 1447 |
} |
| 1448 |
|
| 1449 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
| 1450 |
{
|
| 1451 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
| 1452 |
} |
| 1453 |
|
| 1454 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
| 1455 |
{
|
| 1456 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
| 1457 |
} |
| 1458 |
|
| 1459 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
| 1460 |
{
|
| 1461 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
| 1462 |
} |
| 1463 |
|
| 1464 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
| 1465 |
{
|
| 1466 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
| 1467 |
} |
| 1468 |
|
| 1469 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
| 1470 |
{
|
| 1471 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
| 1472 |
} |
| 1473 |
|
| 1474 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
| 1475 |
{
|
| 1476 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
| 1477 |
} |
| 1478 |
|
| 1479 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
| 1480 |
{
|
| 1481 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
| 1482 |
} |
| 1483 |
|
| 1484 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
| 1485 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
| 1486 |
|
| 1487 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
| 1488 |
|
| 1489 |
#if TARGET_LONG_BITS == 64 |
| 1490 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
| 1491 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
| 1492 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
| 1493 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
| 1494 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
| 1495 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
| 1496 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
| 1497 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
| 1498 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
| 1499 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
| 1500 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
| 1501 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
| 1502 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
| 1503 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
| 1504 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
| 1505 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
| 1506 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
| 1507 |
#define tcg_gen_neg_tl tcg_gen_neg_i64
|
| 1508 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
| 1509 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
| 1510 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
| 1511 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
| 1512 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
| 1513 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
| 1514 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
| 1515 |
#define tcg_gen_not_tl tcg_gen_not_i64
|
| 1516 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
| 1517 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
| 1518 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
| 1519 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
| 1520 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
| 1521 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
| 1522 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
| 1523 |
#define tcg_gen_mul_tl tcg_gen_mul_i64
|
| 1524 |
#define tcg_gen_muli_tl tcg_gen_muli_i64
|
| 1525 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
| 1526 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
| 1527 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
| 1528 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
| 1529 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
| 1530 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
| 1531 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
| 1532 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
|
| 1533 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
|
| 1534 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
|
| 1535 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
|
| 1536 |
#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
|
| 1537 |
#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
|
| 1538 |
#define tcg_const_tl tcg_const_i64
|
| 1539 |
#else
|
| 1540 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
| 1541 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
| 1542 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
| 1543 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
| 1544 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
| 1545 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
| 1546 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
| 1547 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
| 1548 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
| 1549 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
| 1550 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
| 1551 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
| 1552 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
| 1553 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
| 1554 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
| 1555 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
| 1556 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
| 1557 |
#define tcg_gen_neg_tl tcg_gen_neg_i32
|
| 1558 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
| 1559 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
| 1560 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
| 1561 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
| 1562 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
| 1563 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
| 1564 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
| 1565 |
#define tcg_gen_not_tl tcg_gen_not_i32
|
| 1566 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
| 1567 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
| 1568 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
| 1569 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
| 1570 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
| 1571 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
| 1572 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
| 1573 |
#define tcg_gen_mul_tl tcg_gen_mul_i32
|
| 1574 |
#define tcg_gen_muli_tl tcg_gen_muli_i32
|
| 1575 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
| 1576 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
| 1577 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
| 1578 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
| 1579 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
| 1580 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
| 1581 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
| 1582 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
|
| 1583 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
|
| 1584 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
|
| 1585 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
|
| 1586 |
#define tcg_gen_ext32u_tl tcg_gen_mov_i32
|
| 1587 |
#define tcg_gen_ext32s_tl tcg_gen_mov_i32
|
| 1588 |
#define tcg_const_tl tcg_const_i32
|
| 1589 |
#endif
|
| 1590 |
|
| 1591 |
#if TCG_TARGET_REG_BITS == 32 |
| 1592 |
#define tcg_gen_add_ptr tcg_gen_add_i32
|
| 1593 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
| 1594 |
#define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
|
| 1595 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
| 1596 |
#define tcg_gen_add_ptr tcg_gen_add_i64
|
| 1597 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
| 1598 |
#define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
|
| 1599 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
| 1600 |
|