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#ifndef QEMU_I2C_H
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#define QEMU_I2C_H
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/* The QEMU I2C implementation only supports simple transfers that complete
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   immediately.  It does not support slave devices that need to be able to
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   defer their response (eg. CPU slave interfaces where the data is supplied
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   by the device driver in response to an interrupt).  */
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enum i2c_event {
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    I2C_START_RECV,
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    I2C_START_SEND,
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    I2C_FINISH,
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    I2C_NACK /* Masker NACKed a receive byte.  */
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};
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/* Master to slave.  */
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typedef int (*i2c_send_cb)(i2c_slave *s, uint8_t data);
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/* Slave to master.  */
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typedef int (*i2c_recv_cb)(i2c_slave *s);
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/* Notify the slave of a bus state change.  */
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typedef void (*i2c_event_cb)(i2c_slave *s, enum i2c_event event);
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struct i2c_slave
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{
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    /* Callbacks to be set by the device.  */
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    i2c_event_cb event;
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    i2c_recv_cb recv;
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    i2c_send_cb send;
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    /* Remaining fields for internal use by the I2C code.  */
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    int address;
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    void *next;
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};
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i2c_bus *i2c_init_bus(void);
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i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size);
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void i2c_set_slave_address(i2c_slave *dev, int address);
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int i2c_bus_busy(i2c_bus *bus);
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int i2c_start_transfer(i2c_bus *bus, int address, int recv);
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void i2c_end_transfer(i2c_bus *bus);
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void i2c_nack(i2c_bus *bus);
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int i2c_send(i2c_bus *bus, uint8_t data);
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int i2c_recv(i2c_bus *bus);
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void i2c_bus_save(QEMUFile *f, i2c_bus *bus);
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void i2c_bus_load(QEMUFile *f, i2c_bus *bus);
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void i2c_slave_save(QEMUFile *f, i2c_slave *dev);
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void i2c_slave_load(QEMUFile *f, i2c_slave *dev);
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/* max111x.c */
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struct max111x_s;
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uint32_t max111x_read(void *opaque);
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void max111x_write(void *opaque, uint32_t value);
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struct max111x_s *max1110_init(qemu_irq cb);
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struct max111x_s *max1111_init(qemu_irq cb);
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void max111x_set_input(struct max111x_s *s, int line, uint8_t value);
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/* max7310.c */
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i2c_slave *max7310_init(i2c_bus *bus);
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void max7310_reset(i2c_slave *i2c);
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qemu_irq *max7310_gpio_in_get(i2c_slave *i2c);
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void max7310_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler);
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/* wm8750.c */
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i2c_slave *wm8750_init(i2c_bus *bus, AudioState *audio);
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void wm8750_reset(i2c_slave *i2c);
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void wm8750_data_req_set(i2c_slave *i2c,
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                void (*data_req)(void *, int, int), void *opaque);
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void wm8750_dac_dat(void *opaque, uint32_t sample);
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uint32_t wm8750_adc_dat(void *opaque);
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/* ssd0303.c */
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void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address);
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/* twl92230.c */
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i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq);
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qemu_irq *twl92230_gpio_in_get(i2c_slave *i2c);
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void twl92230_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler);
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/* tmp105.c */
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struct i2c_slave *tmp105_init(i2c_bus *bus, qemu_irq alarm);
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void tmp105_reset(i2c_slave *i2c);
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void tmp105_set(i2c_slave *i2c, int temp);
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#endif