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Name Size
TODO 1.1 kB
cpu.h 26.6 kB
exec.h 9.2 kB
helper.c 60.4 kB
helper.h 6.2 kB
helper_template.h 8.6 kB
kvm.c 25.7 kB
machine.c 11 kB
op_helper.c 159.1 kB
ops_sse.h 57.2 kB
ops_sse_header.h 11.4 kB
svm.h 5.8 kB
translate.c 251.4 kB

Latest revisions

# Date Author Comment
09ac35ac 07/17/2009 01:28 am Andre Przywara

omit 3DNOW! CPUID bits from qemu64 CPU model

Since we recently do not disable 3DNOW! support anymore, we should
avoid setting the bits in the default qemu64 CPU model to ease
migration. TCG does not support it anyway and even AMD deprecates
it's usage nowadays....

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

84273177 07/16/2009 04:28 pm Jan Kiszka

gdbstub: x86: Support for setting segment registers

This allows to set segment registers via gdb also in system emulation
mode. Basic sanity checks are applied and nothing is changed if they
fail. But screwing up the target via this interface will never be...

d9db889f 07/10/2009 09:44 pm Jan Kiszka

kvm: Work around borken MSR_GET_INDEX_LIST

Allocate enough memory for KVM_GET_MSR_INDEX_LIST as older kernels shot
far beyond their limits, corrupting user space memory.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

e6a0575e 07/10/2009 09:41 pm Anthony Liguori

Make sure to mark MCE defines as ULL

Fixes build on 32-bit

Signed-off-by: Anthony Liguori <>

79c4f6b0 07/10/2009 12:04 am Huang Ying

QEMU: MCE: Add MCE simulation to qemu/tcg

- MCE features are initialized when VCPU is intialized according to CPUID.
- A monitor command "mce" is added to inject a MCE.
- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.

aliguori: fix build for linux-user...

6ad8702a 07/02/2009 08:07 pm Jan Kiszka

Use ctz64 in favor of ffsll

Not all host platforms support ffsll.

Signed-off-by: Jan Kiszka <>

97b35e35 07/01/2009 10:30 pm Blue Swirl

Suppress a GCC warning

Signed-off-by: Blue Swirl <>

059b8b1e 06/29/2009 10:18 pm Jan Kiszka

KVM: x86: Refactor persistent CPU state

This patch aligns the KVM-related layout and encoding of the CPU state
to be saved to disk or migrated with qemu-kvm. The major differences are
reordering of fields and a compressed interrupt_bitmap into a single
number as there can be no more than one pending IRQ at a time....

6c0d7ee8 06/29/2009 09:52 pm Andre Przywara

preserve the hypervisor bit while KVM trims the CPUID bits

The KVM kernel will disable all bits in CPUID which are not present in
the host. As this is mostly true for the hypervisor bit (1.ecx),
preserve its value before the trim and restore it afterwards....

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