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1
/*
2
 * QEMU PC System Emulator
3
 *
4
 * Copyright (c) 2003-2004 Fabrice Bellard
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7
 * of this software and associated documentation files (the "Software"), to deal
8
 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10
 * copies of the Software, and to permit persons to whom the Software is
11
 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
23
 */
24
#include "hw.h"
25
#include "pc.h"
26
#include "fdc.h"
27
#include "pci.h"
28
#include "block.h"
29
#include "sysemu.h"
30
#include "audio/audio.h"
31
#include "net.h"
32
#include "smbus.h"
33
#include "boards.h"
34

    
35
/* output Bochs bios info messages */
36
//#define DEBUG_BIOS
37

    
38
#define BIOS_FILENAME "bios.bin"
39
#define VGABIOS_FILENAME "vgabios.bin"
40
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
41

    
42
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
43

    
44
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
45
#define ACPI_DATA_SIZE       0x10000
46

    
47
#define MAX_IDE_BUS 2
48

    
49
static fdctrl_t *floppy_controller;
50
static RTCState *rtc_state;
51
static PITState *pit;
52
static IOAPICState *ioapic;
53
static PCIDevice *i440fx_state;
54

    
55
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
56
{
57
}
58

    
59
/* MSDOS compatibility mode FPU exception support */
60
static qemu_irq ferr_irq;
61
/* XXX: add IGNNE support */
62
void cpu_set_ferr(CPUX86State *s)
63
{
64
    qemu_irq_raise(ferr_irq);
65
}
66

    
67
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
68
{
69
    qemu_irq_lower(ferr_irq);
70
}
71

    
72
/* TSC handling */
73
uint64_t cpu_get_tsc(CPUX86State *env)
74
{
75
    /* Note: when using kqemu, it is more logical to return the host TSC
76
       because kqemu does not trap the RDTSC instruction for
77
       performance reasons */
78
#if USE_KQEMU
79
    if (env->kqemu_enabled) {
80
        return cpu_get_real_ticks();
81
    } else
82
#endif
83
    {
84
        return cpu_get_ticks();
85
    }
86
}
87

    
88
/* SMM support */
89
void cpu_smm_update(CPUState *env)
90
{
91
    if (i440fx_state && env == first_cpu)
92
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
93
}
94

    
95

    
96
/* IRQ handling */
97
int cpu_get_pic_interrupt(CPUState *env)
98
{
99
    int intno;
100

    
101
    intno = apic_get_interrupt(env);
102
    if (intno >= 0) {
103
        /* set irq request if a PIC irq is still pending */
104
        /* XXX: improve that */
105
        pic_update_irq(isa_pic);
106
        return intno;
107
    }
108
    /* read the irq from the PIC */
109
    if (!apic_accept_pic_intr(env))
110
        return -1;
111

    
112
    intno = pic_read_irq(isa_pic);
113
    return intno;
114
}
115

    
116
static void pic_irq_request(void *opaque, int irq, int level)
117
{
118
    CPUState *env = first_cpu;
119

    
120
    if (!level)
121
        return;
122

    
123
    while (env) {
124
        if (apic_accept_pic_intr(env))
125
            apic_local_deliver(env, APIC_LINT0);
126
        env = env->next_cpu;
127
    }
128
}
129

    
130
/* PC cmos mappings */
131

    
132
#define REG_EQUIPMENT_BYTE          0x14
133

    
134
static int cmos_get_fd_drive_type(int fd0)
135
{
136
    int val;
137

    
138
    switch (fd0) {
139
    case 0:
140
        /* 1.44 Mb 3"5 drive */
141
        val = 4;
142
        break;
143
    case 1:
144
        /* 2.88 Mb 3"5 drive */
145
        val = 5;
146
        break;
147
    case 2:
148
        /* 1.2 Mb 5"5 drive */
149
        val = 2;
150
        break;
151
    default:
152
        val = 0;
153
        break;
154
    }
155
    return val;
156
}
157

    
158
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
159
{
160
    RTCState *s = rtc_state;
161
    int cylinders, heads, sectors;
162
    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
163
    rtc_set_memory(s, type_ofs, 47);
164
    rtc_set_memory(s, info_ofs, cylinders);
165
    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
166
    rtc_set_memory(s, info_ofs + 2, heads);
167
    rtc_set_memory(s, info_ofs + 3, 0xff);
168
    rtc_set_memory(s, info_ofs + 4, 0xff);
169
    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
170
    rtc_set_memory(s, info_ofs + 6, cylinders);
171
    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
172
    rtc_set_memory(s, info_ofs + 8, sectors);
173
}
174

    
175
/* convert boot_device letter to something recognizable by the bios */
176
static int boot_device2nibble(char boot_device)
177
{
178
    switch(boot_device) {
179
    case 'a':
180
    case 'b':
181
        return 0x01; /* floppy boot */
182
    case 'c':
183
        return 0x02; /* hard drive boot */
184
    case 'd':
185
        return 0x03; /* CD-ROM boot */
186
    case 'n':
187
        return 0x04; /* Network boot */
188
    }
189
    return 0;
190
}
191

    
192
/* hd_table must contain 4 block drivers */
193
static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table)
194
{
195
    RTCState *s = rtc_state;
196
    int nbds, bds[3] = { 0, };
197
    int val;
198
    int fd0, fd1, nb;
199
    int i;
200

    
201
    /* various important CMOS locations needed by PC/Bochs bios */
202

    
203
    /* memory size */
204
    val = 640; /* base memory in K */
205
    rtc_set_memory(s, 0x15, val);
206
    rtc_set_memory(s, 0x16, val >> 8);
207

    
208
    val = (ram_size / 1024) - 1024;
209
    if (val > 65535)
210
        val = 65535;
211
    rtc_set_memory(s, 0x17, val);
212
    rtc_set_memory(s, 0x18, val >> 8);
213
    rtc_set_memory(s, 0x30, val);
214
    rtc_set_memory(s, 0x31, val >> 8);
215

    
216
    if (ram_size > (16 * 1024 * 1024))
217
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
218
    else
219
        val = 0;
220
    if (val > 65535)
221
        val = 65535;
222
    rtc_set_memory(s, 0x34, val);
223
    rtc_set_memory(s, 0x35, val >> 8);
224

    
225
    /* set the number of CPU */
226
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
227

    
228
    /* set boot devices, and disable floppy signature check if requested */
229
#define PC_MAX_BOOT_DEVICES 3
230
    nbds = strlen(boot_device);
231
    if (nbds > PC_MAX_BOOT_DEVICES) {
232
        fprintf(stderr, "Too many boot devices for PC\n");
233
        exit(1);
234
    }
235
    for (i = 0; i < nbds; i++) {
236
        bds[i] = boot_device2nibble(boot_device[i]);
237
        if (bds[i] == 0) {
238
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
239
                    boot_device[i]);
240
            exit(1);
241
        }
242
    }
243
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
244
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
245

    
246
    /* floppy type */
247

    
248
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
249
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
250

    
251
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
252
    rtc_set_memory(s, 0x10, val);
253

    
254
    val = 0;
255
    nb = 0;
256
    if (fd0 < 3)
257
        nb++;
258
    if (fd1 < 3)
259
        nb++;
260
    switch (nb) {
261
    case 0:
262
        break;
263
    case 1:
264
        val |= 0x01; /* 1 drive, ready for boot */
265
        break;
266
    case 2:
267
        val |= 0x41; /* 2 drives, ready for boot */
268
        break;
269
    }
270
    val |= 0x02; /* FPU is there */
271
    val |= 0x04; /* PS/2 mouse installed */
272
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
273

    
274
    /* hard drives */
275

    
276
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
277
    if (hd_table[0])
278
        cmos_init_hd(0x19, 0x1b, hd_table[0]);
279
    if (hd_table[1])
280
        cmos_init_hd(0x1a, 0x24, hd_table[1]);
281

    
282
    val = 0;
283
    for (i = 0; i < 4; i++) {
284
        if (hd_table[i]) {
285
            int cylinders, heads, sectors, translation;
286
            /* NOTE: bdrv_get_geometry_hint() returns the physical
287
                geometry.  It is always such that: 1 <= sects <= 63, 1
288
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
289
                geometry can be different if a translation is done. */
290
            translation = bdrv_get_translation_hint(hd_table[i]);
291
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
292
                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
293
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
294
                    /* No translation. */
295
                    translation = 0;
296
                } else {
297
                    /* LBA translation. */
298
                    translation = 1;
299
                }
300
            } else {
301
                translation--;
302
            }
303
            val |= translation << (i * 2);
304
        }
305
    }
306
    rtc_set_memory(s, 0x39, val);
307
}
308

    
309
void ioport_set_a20(int enable)
310
{
311
    /* XXX: send to all CPUs ? */
312
    cpu_x86_set_a20(first_cpu, enable);
313
}
314

    
315
int ioport_get_a20(void)
316
{
317
    return ((first_cpu->a20_mask >> 20) & 1);
318
}
319

    
320
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
321
{
322
    ioport_set_a20((val >> 1) & 1);
323
    /* XXX: bit 0 is fast reset */
324
}
325

    
326
static uint32_t ioport92_read(void *opaque, uint32_t addr)
327
{
328
    return ioport_get_a20() << 1;
329
}
330

    
331
/***********************************************************/
332
/* Bochs BIOS debug ports */
333

    
334
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
335
{
336
    static const char shutdown_str[8] = "Shutdown";
337
    static int shutdown_index = 0;
338

    
339
    switch(addr) {
340
        /* Bochs BIOS messages */
341
    case 0x400:
342
    case 0x401:
343
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
344
        exit(1);
345
    case 0x402:
346
    case 0x403:
347
#ifdef DEBUG_BIOS
348
        fprintf(stderr, "%c", val);
349
#endif
350
        break;
351
    case 0x8900:
352
        /* same as Bochs power off */
353
        if (val == shutdown_str[shutdown_index]) {
354
            shutdown_index++;
355
            if (shutdown_index == 8) {
356
                shutdown_index = 0;
357
                qemu_system_shutdown_request();
358
            }
359
        } else {
360
            shutdown_index = 0;
361
        }
362
        break;
363

    
364
        /* LGPL'ed VGA BIOS messages */
365
    case 0x501:
366
    case 0x502:
367
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
368
        exit(1);
369
    case 0x500:
370
    case 0x503:
371
#ifdef DEBUG_BIOS
372
        fprintf(stderr, "%c", val);
373
#endif
374
        break;
375
    }
376
}
377

    
378
static void bochs_bios_init(void)
379
{
380
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
381
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
382
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
383
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
384
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
385

    
386
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
387
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
388
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
389
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
390
}
391

    
392
/* Generate an initial boot sector which sets state and jump to
393
   a specified vector */
394
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
395
{
396
    uint8_t bootsect[512], *p;
397
    int i;
398
    int hda;
399

    
400
    hda = drive_get_index(IF_IDE, 0, 0);
401
    if (hda == -1) {
402
        fprintf(stderr, "A disk image must be given for 'hda' when booting "
403
                "a Linux kernel\n");
404
        exit(1);
405
    }
406

    
407
    memset(bootsect, 0, sizeof(bootsect));
408

    
409
    /* Copy the MSDOS partition table if possible */
410
    bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
411

    
412
    /* Make sure we have a partition signature */
413
    bootsect[510] = 0x55;
414
    bootsect[511] = 0xaa;
415

    
416
    /* Actual code */
417
    p = bootsect;
418
    *p++ = 0xfa;                /* CLI */
419
    *p++ = 0xfc;                /* CLD */
420

    
421
    for (i = 0; i < 6; i++) {
422
        if (i == 1)                /* Skip CS */
423
            continue;
424

    
425
        *p++ = 0xb8;                /* MOV AX,imm16 */
426
        *p++ = segs[i];
427
        *p++ = segs[i] >> 8;
428
        *p++ = 0x8e;                /* MOV <seg>,AX */
429
        *p++ = 0xc0 + (i << 3);
430
    }
431

    
432
    for (i = 0; i < 8; i++) {
433
        *p++ = 0x66;                /* 32-bit operand size */
434
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
435
        *p++ = gpr[i];
436
        *p++ = gpr[i] >> 8;
437
        *p++ = gpr[i] >> 16;
438
        *p++ = gpr[i] >> 24;
439
    }
440

    
441
    *p++ = 0xea;                /* JMP FAR */
442
    *p++ = ip;                        /* IP */
443
    *p++ = ip >> 8;
444
    *p++ = segs[1];                /* CS */
445
    *p++ = segs[1] >> 8;
446

    
447
    bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
448
}
449

    
450
static long get_file_size(FILE *f)
451
{
452
    long where, size;
453

    
454
    /* XXX: on Unix systems, using fstat() probably makes more sense */
455

    
456
    where = ftell(f);
457
    fseek(f, 0, SEEK_END);
458
    size = ftell(f);
459
    fseek(f, where, SEEK_SET);
460

    
461
    return size;
462
}
463

    
464
static void load_linux(const char *kernel_filename,
465
                       const char *initrd_filename,
466
                       const char *kernel_cmdline)
467
{
468
    uint16_t protocol;
469
    uint32_t gpr[8];
470
    uint16_t seg[6];
471
    uint16_t real_seg;
472
    int setup_size, kernel_size, initrd_size, cmdline_size;
473
    uint32_t initrd_max;
474
    uint8_t header[1024];
475
    uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
476
    FILE *f, *fi;
477

    
478
    /* Align to 16 bytes as a paranoia measure */
479
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
480

    
481
    /* load the kernel header */
482
    f = fopen(kernel_filename, "rb");
483
    if (!f || !(kernel_size = get_file_size(f)) ||
484
        fread(header, 1, 1024, f) != 1024) {
485
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
486
                kernel_filename);
487
        exit(1);
488
    }
489

    
490
    /* kernel protocol version */
491
#if 0
492
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
493
#endif
494
    if (ldl_p(header+0x202) == 0x53726448)
495
        protocol = lduw_p(header+0x206);
496
    else
497
        protocol = 0;
498

    
499
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
500
        /* Low kernel */
501
        real_addr    = phys_ram_base + 0x90000;
502
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
503
        prot_addr    = phys_ram_base + 0x10000;
504
    } else if (protocol < 0x202) {
505
        /* High but ancient kernel */
506
        real_addr    = phys_ram_base + 0x90000;
507
        cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
508
        prot_addr    = phys_ram_base + 0x100000;
509
    } else {
510
        /* High and recent kernel */
511
        real_addr    = phys_ram_base + 0x10000;
512
        cmdline_addr = phys_ram_base + 0x20000;
513
        prot_addr    = phys_ram_base + 0x100000;
514
    }
515

    
516
#if 0
517
    fprintf(stderr,
518
            "qemu: real_addr     = %#zx\n"
519
            "qemu: cmdline_addr  = %#zx\n"
520
            "qemu: prot_addr     = %#zx\n",
521
            real_addr-phys_ram_base,
522
            cmdline_addr-phys_ram_base,
523
            prot_addr-phys_ram_base);
524
#endif
525

    
526
    /* highest address for loading the initrd */
527
    if (protocol >= 0x203)
528
        initrd_max = ldl_p(header+0x22c);
529
    else
530
        initrd_max = 0x37ffffff;
531

    
532
    if (initrd_max >= ram_size-ACPI_DATA_SIZE)
533
        initrd_max = ram_size-ACPI_DATA_SIZE-1;
534

    
535
    /* kernel command line */
536
    pstrcpy((char*)cmdline_addr, 4096, kernel_cmdline);
537

    
538
    if (protocol >= 0x202) {
539
        stl_p(header+0x228, cmdline_addr-phys_ram_base);
540
    } else {
541
        stw_p(header+0x20, 0xA33F);
542
        stw_p(header+0x22, cmdline_addr-real_addr);
543
    }
544

    
545
    /* loader type */
546
    /* High nybble = B reserved for Qemu; low nybble is revision number.
547
       If this code is substantially changed, you may want to consider
548
       incrementing the revision. */
549
    if (protocol >= 0x200)
550
        header[0x210] = 0xB0;
551

    
552
    /* heap */
553
    if (protocol >= 0x201) {
554
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
555
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
556
    }
557

    
558
    /* load initrd */
559
    if (initrd_filename) {
560
        if (protocol < 0x200) {
561
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
562
            exit(1);
563
        }
564

    
565
        fi = fopen(initrd_filename, "rb");
566
        if (!fi) {
567
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
568
                    initrd_filename);
569
            exit(1);
570
        }
571

    
572
        initrd_size = get_file_size(fi);
573
        initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
574

    
575
        fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
576
                initrd_size, initrd_addr-phys_ram_base);
577

    
578
        if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
579
            fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
580
                    initrd_filename);
581
            exit(1);
582
        }
583
        fclose(fi);
584

    
585
        stl_p(header+0x218, initrd_addr-phys_ram_base);
586
        stl_p(header+0x21c, initrd_size);
587
    }
588

    
589
    /* store the finalized header and load the rest of the kernel */
590
    memcpy(real_addr, header, 1024);
591

    
592
    setup_size = header[0x1f1];
593
    if (setup_size == 0)
594
        setup_size = 4;
595

    
596
    setup_size = (setup_size+1)*512;
597
    kernel_size -= setup_size;        /* Size of protected-mode code */
598

    
599
    if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
600
        fread(prot_addr, 1, kernel_size, f) != kernel_size) {
601
        fprintf(stderr, "qemu: read error on kernel '%s'\n",
602
                kernel_filename);
603
        exit(1);
604
    }
605
    fclose(f);
606

    
607
    /* generate bootsector to set up the initial register state */
608
    real_seg = (real_addr-phys_ram_base) >> 4;
609
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
610
    seg[1] = real_seg+0x20;        /* CS */
611
    memset(gpr, 0, sizeof gpr);
612
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
613

    
614
    generate_bootsect(gpr, seg, 0);
615
}
616

    
617
static void main_cpu_reset(void *opaque)
618
{
619
    CPUState *env = opaque;
620
    cpu_reset(env);
621
}
622

    
623
static const int ide_iobase[2] = { 0x1f0, 0x170 };
624
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
625
static const int ide_irq[2] = { 14, 15 };
626

    
627
#define NE2000_NB_MAX 6
628

    
629
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
630
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
631

    
632
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
633
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
634

    
635
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
636
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
637

    
638
#ifdef HAS_AUDIO
639
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
640
{
641
    struct soundhw *c;
642
    int audio_enabled = 0;
643

    
644
    for (c = soundhw; !audio_enabled && c->name; ++c) {
645
        audio_enabled = c->enabled;
646
    }
647

    
648
    if (audio_enabled) {
649
        AudioState *s;
650

    
651
        s = AUD_init ();
652
        if (s) {
653
            for (c = soundhw; c->name; ++c) {
654
                if (c->enabled) {
655
                    if (c->isa) {
656
                        c->init.init_isa (s, pic);
657
                    }
658
                    else {
659
                        if (pci_bus) {
660
                            c->init.init_pci (pci_bus, s);
661
                        }
662
                    }
663
                }
664
            }
665
        }
666
    }
667
}
668
#endif
669

    
670
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
671
{
672
    static int nb_ne2k = 0;
673

    
674
    if (nb_ne2k == NE2000_NB_MAX)
675
        return;
676
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
677
    nb_ne2k++;
678
}
679

    
680
/* PC hardware initialisation */
681
static void pc_init1(int ram_size, int vga_ram_size,
682
                     const char *boot_device, DisplayState *ds,
683
                     const char *kernel_filename, const char *kernel_cmdline,
684
                     const char *initrd_filename,
685
                     int pci_enabled, const char *cpu_model)
686
{
687
    char buf[1024];
688
    int ret, linux_boot, i;
689
    ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
690
    int bios_size, isa_bios_size, vga_bios_size;
691
    PCIBus *pci_bus;
692
    int piix3_devfn = -1;
693
    CPUState *env;
694
    NICInfo *nd;
695
    qemu_irq *cpu_irq;
696
    qemu_irq *i8259;
697
    int index;
698
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
699
    BlockDriverState *fd[MAX_FD];
700

    
701
    linux_boot = (kernel_filename != NULL);
702

    
703
    /* init CPUs */
704
    if (cpu_model == NULL) {
705
#ifdef TARGET_X86_64
706
        cpu_model = "qemu64";
707
#else
708
        cpu_model = "qemu32";
709
#endif
710
    }
711
    
712
    for(i = 0; i < smp_cpus; i++) {
713
        env = cpu_init(cpu_model);
714
        if (!env) {
715
            fprintf(stderr, "Unable to find x86 CPU definition\n");
716
            exit(1);
717
        }
718
        if (i != 0)
719
            env->hflags |= HF_HALTED_MASK;
720
        if (smp_cpus > 1) {
721
            /* XXX: enable it in all cases */
722
            env->cpuid_features |= CPUID_APIC;
723
        }
724
        register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
725
        qemu_register_reset(main_cpu_reset, env);
726
        if (pci_enabled) {
727
            apic_init(env);
728
        }
729
    }
730

    
731
    vmport_init();
732

    
733
    /* allocate RAM */
734
    ram_addr = qemu_ram_alloc(ram_size);
735
    cpu_register_physical_memory(0, ram_size, ram_addr);
736

    
737
    /* allocate VGA RAM */
738
    vga_ram_addr = qemu_ram_alloc(vga_ram_size);
739

    
740
    /* BIOS load */
741
    if (bios_name == NULL)
742
        bios_name = BIOS_FILENAME;
743
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
744
    bios_size = get_image_size(buf);
745
    if (bios_size <= 0 ||
746
        (bios_size % 65536) != 0) {
747
        goto bios_error;
748
    }
749
    bios_offset = qemu_ram_alloc(bios_size);
750
    ret = load_image(buf, phys_ram_base + bios_offset);
751
    if (ret != bios_size) {
752
    bios_error:
753
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
754
        exit(1);
755
    }
756

    
757
    /* VGA BIOS load */
758
    if (cirrus_vga_enabled) {
759
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
760
    } else {
761
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
762
    }
763
    vga_bios_size = get_image_size(buf);
764
    if (vga_bios_size <= 0 || vga_bios_size > 65536)
765
        goto vga_bios_error;
766
    vga_bios_offset = qemu_ram_alloc(65536);
767

    
768
    ret = load_image(buf, phys_ram_base + vga_bios_offset);
769
    if (ret != vga_bios_size) {
770
    vga_bios_error:
771
        fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
772
        exit(1);
773
    }
774

    
775
    /* setup basic memory access */
776
    cpu_register_physical_memory(0xc0000, 0x10000,
777
                                 vga_bios_offset | IO_MEM_ROM);
778

    
779
    /* map the last 128KB of the BIOS in ISA space */
780
    isa_bios_size = bios_size;
781
    if (isa_bios_size > (128 * 1024))
782
        isa_bios_size = 128 * 1024;
783
    cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
784
                                 IO_MEM_UNASSIGNED);
785
    cpu_register_physical_memory(0x100000 - isa_bios_size,
786
                                 isa_bios_size,
787
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
788

    
789
    {
790
        ram_addr_t option_rom_offset;
791
        int size, offset;
792

    
793
        offset = 0;
794
        for (i = 0; i < nb_option_roms; i++) {
795
            size = get_image_size(option_rom[i]);
796
            if (size < 0) {
797
                fprintf(stderr, "Could not load option rom '%s'\n",
798
                        option_rom[i]);
799
                exit(1);
800
            }
801
            if (size > (0x10000 - offset))
802
                goto option_rom_error;
803
            option_rom_offset = qemu_ram_alloc(size);
804
            ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
805
            if (ret != size) {
806
            option_rom_error:
807
                fprintf(stderr, "Too many option ROMS\n");
808
                exit(1);
809
            }
810
            size = (size + 4095) & ~4095;
811
            cpu_register_physical_memory(0xd0000 + offset,
812
                                         size, option_rom_offset | IO_MEM_ROM);
813
            offset += size;
814
        }
815
    }
816

    
817
    /* map all the bios at the top of memory */
818
    cpu_register_physical_memory((uint32_t)(-bios_size),
819
                                 bios_size, bios_offset | IO_MEM_ROM);
820

    
821
    bochs_bios_init();
822

    
823
    if (linux_boot)
824
        load_linux(kernel_filename, initrd_filename, kernel_cmdline);
825

    
826
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
827
    i8259 = i8259_init(cpu_irq[0]);
828
    ferr_irq = i8259[13];
829

    
830
    if (pci_enabled) {
831
        pci_bus = i440fx_init(&i440fx_state, i8259);
832
        piix3_devfn = piix3_init(pci_bus, -1);
833
    } else {
834
        pci_bus = NULL;
835
    }
836

    
837
    /* init basic PC hardware */
838
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
839

    
840
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
841

    
842
    if (cirrus_vga_enabled) {
843
        if (pci_enabled) {
844
            pci_cirrus_vga_init(pci_bus,
845
                                ds, phys_ram_base + vga_ram_addr,
846
                                vga_ram_addr, vga_ram_size);
847
        } else {
848
            isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
849
                                vga_ram_addr, vga_ram_size);
850
        }
851
    } else if (vmsvga_enabled) {
852
        if (pci_enabled)
853
            pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
854
                            vga_ram_addr, vga_ram_size);
855
        else
856
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
857
    } else {
858
        if (pci_enabled) {
859
            pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
860
                         vga_ram_addr, vga_ram_size, 0, 0);
861
        } else {
862
            isa_vga_init(ds, phys_ram_base + vga_ram_addr,
863
                         vga_ram_addr, vga_ram_size);
864
        }
865
    }
866

    
867
    rtc_state = rtc_init(0x70, i8259[8]);
868

    
869
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
870
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
871

    
872
    if (pci_enabled) {
873
        ioapic = ioapic_init();
874
    }
875
    pit = pit_init(0x40, i8259[0]);
876
    pcspk_init(pit);
877
    if (pci_enabled) {
878
        pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
879
    }
880

    
881
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
882
        if (serial_hds[i]) {
883
            serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
884
        }
885
    }
886

    
887
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
888
        if (parallel_hds[i]) {
889
            parallel_init(parallel_io[i], i8259[parallel_irq[i]],
890
                          parallel_hds[i]);
891
        }
892
    }
893

    
894
    for(i = 0; i < nb_nics; i++) {
895
        nd = &nd_table[i];
896
        if (!nd->model) {
897
            if (pci_enabled) {
898
                nd->model = "ne2k_pci";
899
            } else {
900
                nd->model = "ne2k_isa";
901
            }
902
        }
903
        if (strcmp(nd->model, "ne2k_isa") == 0) {
904
            pc_init_ne2k_isa(nd, i8259);
905
        } else if (pci_enabled) {
906
            if (strcmp(nd->model, "?") == 0)
907
                fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
908
            pci_nic_init(pci_bus, nd, -1);
909
        } else if (strcmp(nd->model, "?") == 0) {
910
            fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
911
            exit(1);
912
        } else {
913
            fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
914
            exit(1);
915
        }
916
    }
917

    
918
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
919
        fprintf(stderr, "qemu: too many IDE bus\n");
920
        exit(1);
921
    }
922

    
923
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
924
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
925
        if (index != -1)
926
            hd[i] = drives_table[index].bdrv;
927
        else
928
            hd[i] = NULL;
929
    }
930

    
931
    if (pci_enabled) {
932
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
933
    } else {
934
        for(i = 0; i < MAX_IDE_BUS; i++) {
935
            isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
936
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
937
        }
938
    }
939

    
940
    i8042_init(i8259[1], i8259[12], 0x60);
941
    DMA_init(0);
942
#ifdef HAS_AUDIO
943
    audio_init(pci_enabled ? pci_bus : NULL, i8259);
944
#endif
945

    
946
    for(i = 0; i < MAX_FD; i++) {
947
        index = drive_get_index(IF_FLOPPY, 0, i);
948
        if (index != -1)
949
            fd[i] = drives_table[index].bdrv;
950
        else
951
            fd[i] = NULL;
952
    }
953
    floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
954

    
955
    cmos_init(ram_size, boot_device, hd);
956

    
957
    if (pci_enabled && usb_enabled) {
958
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
959
    }
960

    
961
    if (pci_enabled && acpi_enabled) {
962
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
963
        i2c_bus *smbus;
964

    
965
        /* TODO: Populate SPD eeprom data.  */
966
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
967
        for (i = 0; i < 8; i++) {
968
            smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
969
        }
970
    }
971

    
972
    if (i440fx_state) {
973
        i440fx_init_memory_mappings(i440fx_state);
974
    }
975

    
976
    if (pci_enabled) {
977
        int max_bus;
978
        int bus, unit;
979
        void *scsi;
980

    
981
        max_bus = drive_get_max_bus(IF_SCSI);
982

    
983
        for (bus = 0; bus <= max_bus; bus++) {
984
            scsi = lsi_scsi_init(pci_bus, -1);
985
            for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
986
                index = drive_get_index(IF_SCSI, bus, unit);
987
                if (index == -1)
988
                    continue;
989
                lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
990
            }
991
        }
992
    }
993
}
994

    
995
static void pc_init_pci(int ram_size, int vga_ram_size,
996
                        const char *boot_device, DisplayState *ds,
997
                        const char *kernel_filename,
998
                        const char *kernel_cmdline,
999
                        const char *initrd_filename,
1000
                        const char *cpu_model)
1001
{
1002
    pc_init1(ram_size, vga_ram_size, boot_device, ds,
1003
             kernel_filename, kernel_cmdline,
1004
             initrd_filename, 1, cpu_model);
1005
}
1006

    
1007
static void pc_init_isa(int ram_size, int vga_ram_size,
1008
                        const char *boot_device, DisplayState *ds,
1009
                        const char *kernel_filename,
1010
                        const char *kernel_cmdline,
1011
                        const char *initrd_filename,
1012
                        const char *cpu_model)
1013
{
1014
    pc_init1(ram_size, vga_ram_size, boot_device, ds,
1015
             kernel_filename, kernel_cmdline,
1016
             initrd_filename, 0, cpu_model);
1017
}
1018

    
1019
QEMUMachine pc_machine = {
1020
    "pc",
1021
    "Standard PC",
1022
    pc_init_pci,
1023
    VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1024
};
1025

    
1026
QEMUMachine isapc_machine = {
1027
    "isapc",
1028
    "ISA-only PC",
1029
    pc_init_isa,
1030
    VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1031
};