Revision 802670e6 hw/ppc440.c
| b/hw/ppc440.c | ||
|---|---|---|
| 12 | 12 |
*/ |
| 13 | 13 |
|
| 14 | 14 |
#include "hw.h" |
| 15 |
#include "pc.h" |
|
| 15 | 16 |
#include "isa.h" |
| 16 | 17 |
#include "ppc.h" |
| 17 | 18 |
#include "ppc4xx.h" |
| ... | ... | |
| 40 | 41 |
target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS]; |
| 41 | 42 |
target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS]; |
| 42 | 43 |
CPUState *env; |
| 43 |
ppc4xx_mmio_t *mmio; |
|
| 44 | 44 |
qemu_irq *pic; |
| 45 | 45 |
qemu_irq *irqs; |
| 46 | 46 |
qemu_irq *pci_irqs; |
| ... | ... | |
| 87 | 87 |
|
| 88 | 88 |
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN); |
| 89 | 89 |
|
| 90 |
/* MMIO -- most "miscellaneous" devices live above 0xef600000. */
|
|
| 91 |
mmio = ppc4xx_mmio_init(env, 0xef600000);
|
|
| 92 |
|
|
| 93 |
if (serial_hds[0])
|
|
| 94 |
ppc405_serial_init(env, mmio, 0x300, pic[0], serial_hds[0]);
|
|
| 95 |
|
|
| 96 |
if (serial_hds[1])
|
|
| 97 |
ppc405_serial_init(env, mmio, 0x400, pic[1], serial_hds[1]);
|
|
| 90 |
if (serial_hds[0] != NULL) {
|
|
| 91 |
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
|
|
| 92 |
serial_hds[0], 1); |
|
| 93 |
}
|
|
| 94 |
if (serial_hds[1] != NULL) {
|
|
| 95 |
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, |
|
| 96 |
serial_hds[1], 1);
|
|
| 97 |
}
|
|
| 98 | 98 |
|
| 99 | 99 |
return env; |
| 100 | 100 |
} |
Also available in: Unified diff