Revision 80337b66 hw/integratorcp.c

b/hw/integratorcp.c
305 305
  int parent_irq;
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} icp_pic_state;
307 307

  
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static void icp_pic_set_level(icp_pic_state *, int, int);
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static void icp_pic_update(icp_pic_state *s)
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{
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    CPUState *env;
......
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        uint32_t flags;
315 313

  
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        flags = (s->level & s->irq_enabled);
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        icp_pic_set_level((icp_pic_state *)s->parent, s->parent_irq,
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                          flags != 0);
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        pic_set_irq_new(s->parent, s->parent_irq,
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                        flags != 0);
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        return;
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    }
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    /* Raise CPU interrupt.  */
......
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    }
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}
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static void icp_pic_set_level(icp_pic_state *s, int n, int level)
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void pic_set_irq_new(void *opaque, int irq, int level)
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{
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    icp_pic_state *s = (icp_pic_state *)opaque;
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    if (level)
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        s->level |= 1 << n;
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        s->level |= 1 << irq;
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    else
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        s->level &= ~(1 << n);
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        s->level &= ~(1 << irq);
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    icp_pic_update(s);
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}
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......
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        break;
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    case 4: /* INT_SOFTSET */
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        if (value & 1)
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            icp_pic_set_level(s, 0, 1);
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            pic_set_irq_new(s, 0, 1);
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        break;
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    case 5: /* INT_SOFTCLR */
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        if (value & 1)
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            icp_pic_set_level(s, 0, 0);
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            pic_set_irq_new(s, 0, 0);
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        break;
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    case 10: /* FRQ_ENABLESET */
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        s->fiq_enabled |= value;
......
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    /* Update interrupts.  */
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    for (n = 0; n < 3; n++) {
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        if (s->int_level[n] && (s->control[n] & 0x20)) {
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            icp_pic_set_level(s->pic, 5 + n, 1);
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            pic_set_irq_new(s->pic, 5 + n, 1);
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        } else {
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            icp_pic_set_level(s->pic, 5 + n, 0);
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            pic_set_irq_new(s->pic, 5 + n, 0);
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        }
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        if (next - s->expires[n] < 0)
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            next = s->expires[n];
......
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    uint32_t flags;
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    flags = s->int_level & s->int_enabled;
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    icp_pic_set_level(s->pic, s->irq, flags != 0);
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    pic_set_irq_new(s->pic, s->irq, flags != 0);
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}
736 735

  
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static uint32_t pl011_read(void *opaque, target_phys_addr_t offset)
......
1020 1019
    s->pending = level;
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    raise = (s->pending && (s->cr & 0x10) != 0)
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            || (s->cr & 0x08) != 0;
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    icp_pic_set_level(s->pic, s->irq, raise);
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    pic_set_irq_new(s->pic, s->irq, raise);
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}
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static uint32_t icp_kmi_read(void *opaque, target_phys_addr_t offset)
......
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    icp_control_init(0xcb000000);
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    icp_kmi_init(0x18000000, pic, 3, 0);
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    icp_kmi_init(0x19000000, pic, 4, 1);
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    if (nd_table[0].vlan)
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        smc91c111_init(&nd_table[0], 0xc8000000, pic, 27);
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    /* Load the kernel.  */
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    if (!kernel_filename) {

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