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/*
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* QEMU System Emulator header
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef VL_H
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#define VL_H
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <inttypes.h> |
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#include <limits.h> |
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#include <time.h> |
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#include <ctype.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include <fcntl.h> |
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#include <sys/stat.h> |
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#include "audio/audio.h" |
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0 |
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#endif
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#ifndef O_BINARY
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#define O_BINARY 0 |
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#endif
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#ifdef _WIN32
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#define lseek _lseeki64
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#define ENOTSUP 4096 |
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/* XXX: find 64 bit version */
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#define ftruncate chsize
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static inline char *realpath(const char *path, char *resolved_path) |
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{ |
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_fullpath(resolved_path, path, _MAX_PATH); |
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return resolved_path;
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} |
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#endif
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#ifdef QEMU_TOOL
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/* we use QEMU_TOOL in the command line tools which do not depend on
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the target CPU type */
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#include "config-host.h" |
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#include <setjmp.h> |
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#include "osdep.h" |
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#include "bswap.h" |
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#else
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#include "cpu.h" |
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#include "gdbstub.h" |
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#endif /* !defined(QEMU_TOOL) */ |
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#ifndef glue
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#define xglue(x, y) x ## y |
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#define glue(x, y) xglue(x, y)
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#define stringify(s) tostring(s)
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#define tostring(s) #s |
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#endif
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/* vl.c */
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
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void hw_error(const char *fmt, ...); |
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int get_image_size(const char *filename); |
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int load_image(const char *filename, uint8_t *addr); |
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extern const char *bios_dir; |
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void pstrcpy(char *buf, int buf_size, const char *str); |
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char *pstrcat(char *buf, int buf_size, const char *s); |
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int strstart(const char *str, const char *val, const char **ptr); |
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extern int vm_running; |
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typedef struct vm_change_state_entry VMChangeStateEntry; |
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typedef void VMChangeStateHandler(void *opaque, int running); |
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typedef void VMStopHandler(void *opaque, int reason); |
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VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
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void *opaque);
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void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
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void vm_start(void); |
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void vm_stop(int reason); |
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typedef void QEMUResetHandler(void *opaque); |
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void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
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void qemu_system_reset_request(void); |
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void qemu_system_shutdown_request(void); |
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void qemu_system_powerdown_request(void); |
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#if !defined(TARGET_SPARC)
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0) |
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#else
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void qemu_system_powerdown(void); |
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#endif
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void main_loop_wait(int timeout); |
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extern int audio_enabled; |
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extern int sb16_enabled; |
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extern int adlib_enabled; |
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extern int gus_enabled; |
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extern int es1370_enabled; |
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extern int ram_size; |
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extern int bios_size; |
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extern int rtc_utc; |
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extern int cirrus_vga_enabled; |
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extern int graphic_width; |
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extern int graphic_height; |
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extern int graphic_depth; |
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extern const char *keyboard_layout; |
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extern int kqemu_allowed; |
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extern int win2k_install_hack; |
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extern int usb_enabled; |
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extern int smp_cpus; |
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/* XXX: make it dynamic */
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#if defined (TARGET_PPC)
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#define BIOS_SIZE ((512 + 32) * 1024) |
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#elif defined(TARGET_MIPS)
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#define BIOS_SIZE (128 * 1024) |
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#else
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#define BIOS_SIZE ((256 + 64) * 1024) |
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#endif
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01 |
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#define MOUSE_EVENT_RBUTTON 0x02 |
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#define MOUSE_EVENT_MBUTTON 0x04 |
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typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
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void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); |
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void kbd_put_keycode(int keycode); |
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
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/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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constants) */
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#define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
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#define QEMU_KEY_BACKSPACE 0x007f |
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#define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
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#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
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#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
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#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
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#define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
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#define QEMU_KEY_END QEMU_KEY_ESC1(4) |
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#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
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#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
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#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
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#define QEMU_KEY_CTRL_UP 0xe400 |
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#define QEMU_KEY_CTRL_DOWN 0xe401 |
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#define QEMU_KEY_CTRL_LEFT 0xe402 |
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#define QEMU_KEY_CTRL_RIGHT 0xe403 |
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#define QEMU_KEY_CTRL_HOME 0xe404 |
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#define QEMU_KEY_CTRL_END 0xe405 |
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#define QEMU_KEY_CTRL_PAGEUP 0xe406 |
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#define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
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void kbd_put_keysym(int keysym); |
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
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typedef int IOCanRWHandler(void *opaque); |
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typedef void IOHandler(void *opaque); |
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int qemu_set_fd_handler2(int fd, |
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IOCanRWHandler *fd_read_poll, |
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IOHandler *fd_read, |
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IOHandler *fd_write, |
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void *opaque);
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int qemu_set_fd_handler(int fd, |
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IOHandler *fd_read, |
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IOHandler *fd_write, |
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void *opaque);
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */ |
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
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#define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
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typedef struct { |
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int speed;
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int parity;
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int data_bits;
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int stop_bits;
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} QEMUSerialSetParams; |
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#define CHR_IOCTL_SERIAL_SET_BREAK 2 |
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#define CHR_IOCTL_PP_READ_DATA 3 |
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#define CHR_IOCTL_PP_WRITE_DATA 4 |
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#define CHR_IOCTL_PP_READ_CONTROL 5 |
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#define CHR_IOCTL_PP_WRITE_CONTROL 6 |
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#define CHR_IOCTL_PP_READ_STATUS 7 |
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typedef void IOEventHandler(void *opaque, int event); |
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typedef struct CharDriverState { |
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int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
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void (*chr_add_read_handler)(struct CharDriverState *s, |
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IOCanRWHandler *fd_can_read, |
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IOReadHandler *fd_read, void *opaque);
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int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
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IOEventHandler *chr_event; |
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void (*chr_send_event)(struct CharDriverState *chr, int event); |
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void *opaque;
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} CharDriverState; |
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
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void qemu_chr_send_event(CharDriverState *s, int event); |
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void qemu_chr_add_read_handler(CharDriverState *s,
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IOCanRWHandler *fd_can_read, |
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IOReadHandler *fd_read, void *opaque);
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void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
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/* consoles */
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typedef struct DisplayState DisplayState; |
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typedef struct TextConsole TextConsole; |
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extern TextConsole *vga_console;
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TextConsole *graphic_console_init(DisplayState *ds); |
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int is_active_console(TextConsole *s);
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CharDriverState *text_console_init(DisplayState *ds); |
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void console_select(unsigned int index); |
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/* serial ports */
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#define MAX_SERIAL_PORTS 4 |
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extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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/* parallel ports */
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#define MAX_PARALLEL_PORTS 3 |
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extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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/* VLANs support */
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typedef struct VLANClientState VLANClientState; |
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struct VLANClientState {
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IOReadHandler *fd_read; |
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void *opaque;
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struct VLANClientState *next;
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struct VLANState *vlan;
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char info_str[256]; |
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}; |
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typedef struct VLANState { |
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int id;
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VLANClientState *first_client; |
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struct VLANState *next;
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} VLANState; |
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VLANState *qemu_find_vlan(int id);
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VLANClientState *qemu_new_vlan_client(VLANState *vlan, |
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IOReadHandler *fd_read, void *opaque);
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void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
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void do_info_network(void); |
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/* NIC info */
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#define MAX_NICS 8 |
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typedef struct NICInfo { |
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uint8_t macaddr[6];
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VLANState *vlan; |
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} NICInfo; |
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extern int nb_nics; |
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extern NICInfo nd_table[MAX_NICS];
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/* timers */
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typedef struct QEMUClock QEMUClock; |
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typedef struct QEMUTimer QEMUTimer; |
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typedef void QEMUTimerCB(void *opaque); |
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/* The real time clock should be used only for stuff which does not
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change the virtual machine state, as it is run even if the virtual
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machine is stopped. The real time clock has a frequency of 1000
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Hz. */
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extern QEMUClock *rt_clock;
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/* The virtual clock is only run during the emulation. It is stopped
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when the virtual machine is stopped. Virtual timers use a high
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precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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int64_t qemu_get_clock(QEMUClock *clock); |
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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int qemu_timer_pending(QEMUTimer *ts);
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extern int64_t ticks_per_sec;
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extern int pit_min_timer_count; |
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void cpu_enable_ticks(void); |
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void cpu_disable_ticks(void); |
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/* VM Load/Save */
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typedef FILE QEMUFile;
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void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
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void qemu_put_byte(QEMUFile *f, int v); |
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void qemu_put_be16(QEMUFile *f, unsigned int v); |
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void qemu_put_be32(QEMUFile *f, unsigned int v); |
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void qemu_put_be64(QEMUFile *f, uint64_t v);
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int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
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int qemu_get_byte(QEMUFile *f);
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unsigned int qemu_get_be16(QEMUFile *f); |
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unsigned int qemu_get_be32(QEMUFile *f); |
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uint64_t qemu_get_be64(QEMUFile *f); |
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static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
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{ |
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qemu_put_be64(f, *pv); |
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} |
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static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
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{ |
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qemu_put_be32(f, *pv); |
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} |
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static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
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{ |
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qemu_put_be16(f, *pv); |
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} |
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static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
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{ |
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qemu_put_byte(f, *pv); |
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} |
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static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
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{ |
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*pv = qemu_get_be64(f); |
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} |
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static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
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{ |
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*pv = qemu_get_be32(f); |
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} |
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static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
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{ |
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*pv = qemu_get_be16(f); |
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} |
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static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
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{ |
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*pv = qemu_get_byte(f); |
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} |
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#if TARGET_LONG_BITS == 64 |
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#define qemu_put_betl qemu_put_be64
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#define qemu_get_betl qemu_get_be64
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#define qemu_put_betls qemu_put_be64s
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#define qemu_get_betls qemu_get_be64s
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#else
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#define qemu_put_betl qemu_put_be32
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#define qemu_get_betl qemu_get_be32
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#define qemu_put_betls qemu_put_be32s
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#define qemu_get_betls qemu_get_be32s
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#endif
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|
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int64_t qemu_ftell(QEMUFile *f); |
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int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
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|
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typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
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typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
421 |
|
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int qemu_loadvm(const char *filename); |
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int qemu_savevm(const char *filename); |
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int register_savevm(const char *idstr, |
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int instance_id,
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int version_id,
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SaveStateHandler *save_state, |
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LoadStateHandler *load_state, |
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void *opaque);
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void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
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void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
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|
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void cpu_save(QEMUFile *f, void *opaque); |
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int cpu_load(QEMUFile *f, void *opaque, int version_id); |
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|
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/* block.c */
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typedef struct BlockDriverState BlockDriverState; |
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typedef struct BlockDriver BlockDriver; |
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extern BlockDriver bdrv_raw;
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extern BlockDriver bdrv_cow;
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extern BlockDriver bdrv_qcow;
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extern BlockDriver bdrv_vmdk;
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extern BlockDriver bdrv_cloop;
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extern BlockDriver bdrv_dmg;
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extern BlockDriver bdrv_bochs;
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extern BlockDriver bdrv_vpc;
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extern BlockDriver bdrv_vvfat;
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void bdrv_init(void); |
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BlockDriver *bdrv_find_format(const char *format_name); |
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int bdrv_create(BlockDriver *drv,
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const char *filename, int64_t size_in_sectors, |
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const char *backing_file, int flags); |
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BlockDriverState *bdrv_new(const char *device_name); |
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void bdrv_delete(BlockDriverState *bs);
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int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); |
458 |
int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
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BlockDriver *drv); |
460 |
void bdrv_close(BlockDriverState *bs);
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int bdrv_read(BlockDriverState *bs, int64_t sector_num,
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uint8_t *buf, int nb_sectors);
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int bdrv_write(BlockDriverState *bs, int64_t sector_num,
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const uint8_t *buf, int nb_sectors); |
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void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
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int bdrv_commit(BlockDriverState *bs);
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void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
468 |
|
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#define BDRV_TYPE_HD 0 |
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#define BDRV_TYPE_CDROM 1 |
471 |
#define BDRV_TYPE_FLOPPY 2 |
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#define BIOS_ATA_TRANSLATION_AUTO 0 |
473 |
#define BIOS_ATA_TRANSLATION_NONE 1 |
474 |
#define BIOS_ATA_TRANSLATION_LBA 2 |
475 |
|
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void bdrv_set_geometry_hint(BlockDriverState *bs,
|
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int cyls, int heads, int secs); |
478 |
void bdrv_set_type_hint(BlockDriverState *bs, int type); |
479 |
void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
480 |
void bdrv_get_geometry_hint(BlockDriverState *bs,
|
481 |
int *pcyls, int *pheads, int *psecs); |
482 |
int bdrv_get_type_hint(BlockDriverState *bs);
|
483 |
int bdrv_get_translation_hint(BlockDriverState *bs);
|
484 |
int bdrv_is_removable(BlockDriverState *bs);
|
485 |
int bdrv_is_read_only(BlockDriverState *bs);
|
486 |
int bdrv_is_inserted(BlockDriverState *bs);
|
487 |
int bdrv_is_locked(BlockDriverState *bs);
|
488 |
void bdrv_set_locked(BlockDriverState *bs, int locked); |
489 |
void bdrv_set_change_cb(BlockDriverState *bs,
|
490 |
void (*change_cb)(void *opaque), void *opaque); |
491 |
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
492 |
void bdrv_info(void); |
493 |
BlockDriverState *bdrv_find(const char *name); |
494 |
void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
495 |
int bdrv_is_encrypted(BlockDriverState *bs);
|
496 |
int bdrv_set_key(BlockDriverState *bs, const char *key); |
497 |
void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
498 |
void *opaque);
|
499 |
const char *bdrv_get_device_name(BlockDriverState *bs); |
500 |
|
501 |
int qcow_get_cluster_size(BlockDriverState *bs);
|
502 |
int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
|
503 |
const uint8_t *buf);
|
504 |
|
505 |
#ifndef QEMU_TOOL
|
506 |
|
507 |
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
508 |
int boot_device,
|
509 |
DisplayState *ds, const char **fd_filename, int snapshot, |
510 |
const char *kernel_filename, const char *kernel_cmdline, |
511 |
const char *initrd_filename); |
512 |
|
513 |
typedef struct QEMUMachine { |
514 |
const char *name; |
515 |
const char *desc; |
516 |
QEMUMachineInitFunc *init; |
517 |
struct QEMUMachine *next;
|
518 |
} QEMUMachine; |
519 |
|
520 |
int qemu_register_machine(QEMUMachine *m);
|
521 |
|
522 |
typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
523 |
typedef void IRQRequestFunc(void *opaque, int level); |
524 |
|
525 |
/* ISA bus */
|
526 |
|
527 |
extern target_phys_addr_t isa_mem_base;
|
528 |
|
529 |
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
530 |
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
531 |
|
532 |
int register_ioport_read(int start, int length, int size, |
533 |
IOPortReadFunc *func, void *opaque);
|
534 |
int register_ioport_write(int start, int length, int size, |
535 |
IOPortWriteFunc *func, void *opaque);
|
536 |
void isa_unassign_ioport(int start, int length); |
537 |
|
538 |
/* PCI bus */
|
539 |
|
540 |
extern target_phys_addr_t pci_mem_base;
|
541 |
|
542 |
typedef struct PCIBus PCIBus; |
543 |
typedef struct PCIDevice PCIDevice; |
544 |
|
545 |
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
546 |
uint32_t address, uint32_t data, int len);
|
547 |
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
548 |
uint32_t address, int len);
|
549 |
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
550 |
uint32_t addr, uint32_t size, int type);
|
551 |
|
552 |
#define PCI_ADDRESS_SPACE_MEM 0x00 |
553 |
#define PCI_ADDRESS_SPACE_IO 0x01 |
554 |
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
555 |
|
556 |
typedef struct PCIIORegion { |
557 |
uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
558 |
uint32_t size; |
559 |
uint8_t type; |
560 |
PCIMapIORegionFunc *map_func; |
561 |
} PCIIORegion; |
562 |
|
563 |
#define PCI_ROM_SLOT 6 |
564 |
#define PCI_NUM_REGIONS 7 |
565 |
struct PCIDevice {
|
566 |
/* PCI config space */
|
567 |
uint8_t config[256];
|
568 |
|
569 |
/* the following fields are read only */
|
570 |
PCIBus *bus; |
571 |
int devfn;
|
572 |
char name[64]; |
573 |
PCIIORegion io_regions[PCI_NUM_REGIONS]; |
574 |
|
575 |
/* do not access the following fields */
|
576 |
PCIConfigReadFunc *config_read; |
577 |
PCIConfigWriteFunc *config_write; |
578 |
int irq_index;
|
579 |
}; |
580 |
|
581 |
PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
582 |
int instance_size, int devfn, |
583 |
PCIConfigReadFunc *config_read, |
584 |
PCIConfigWriteFunc *config_write); |
585 |
|
586 |
void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
587 |
uint32_t size, int type,
|
588 |
PCIMapIORegionFunc *map_func); |
589 |
|
590 |
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
591 |
|
592 |
uint32_t pci_default_read_config(PCIDevice *d, |
593 |
uint32_t address, int len);
|
594 |
void pci_default_write_config(PCIDevice *d,
|
595 |
uint32_t address, uint32_t val, int len);
|
596 |
void generic_pci_save(QEMUFile* f, void *opaque); |
597 |
int generic_pci_load(QEMUFile* f, void *opaque, int version_id); |
598 |
|
599 |
extern struct PIIX3State *piix3_state; |
600 |
|
601 |
PCIBus *i440fx_init(void);
|
602 |
void piix3_init(PCIBus *bus);
|
603 |
void pci_bios_init(void); |
604 |
void pci_info(void); |
605 |
|
606 |
/* temporary: will be moved in platform specific file */
|
607 |
void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
608 |
PCIBus *pci_prep_init(void);
|
609 |
PCIBus *pci_grackle_init(uint32_t base); |
610 |
PCIBus *pci_pmac_init(void);
|
611 |
PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); |
612 |
|
613 |
/* openpic.c */
|
614 |
typedef struct openpic_t openpic_t; |
615 |
void openpic_set_irq(void *opaque, int n_IRQ, int level); |
616 |
openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
617 |
CPUState **envp); |
618 |
|
619 |
/* heathrow_pic.c */
|
620 |
typedef struct HeathrowPICS HeathrowPICS; |
621 |
void heathrow_pic_set_irq(void *opaque, int num, int level); |
622 |
HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
623 |
|
624 |
/* vga.c */
|
625 |
|
626 |
#define VGA_RAM_SIZE (4096 * 1024) |
627 |
|
628 |
struct DisplayState {
|
629 |
uint8_t *data; |
630 |
int linesize;
|
631 |
int depth;
|
632 |
int width;
|
633 |
int height;
|
634 |
void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
635 |
void (*dpy_resize)(struct DisplayState *s, int w, int h); |
636 |
void (*dpy_refresh)(struct DisplayState *s); |
637 |
}; |
638 |
|
639 |
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
640 |
{ |
641 |
s->dpy_update(s, x, y, w, h); |
642 |
} |
643 |
|
644 |
static inline void dpy_resize(DisplayState *s, int w, int h) |
645 |
{ |
646 |
s->dpy_resize(s, w, h); |
647 |
} |
648 |
|
649 |
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
650 |
unsigned long vga_ram_offset, int vga_ram_size, |
651 |
unsigned long vga_bios_offset, int vga_bios_size); |
652 |
void vga_update_display(void); |
653 |
void vga_invalidate_display(void); |
654 |
void vga_screen_dump(const char *filename); |
655 |
|
656 |
/* cirrus_vga.c */
|
657 |
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
658 |
unsigned long vga_ram_offset, int vga_ram_size); |
659 |
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
660 |
unsigned long vga_ram_offset, int vga_ram_size); |
661 |
|
662 |
/* sdl.c */
|
663 |
void sdl_display_init(DisplayState *ds, int full_screen); |
664 |
|
665 |
/* cocoa.m */
|
666 |
void cocoa_display_init(DisplayState *ds, int full_screen); |
667 |
|
668 |
/* ide.c */
|
669 |
#define MAX_DISKS 4 |
670 |
|
671 |
extern BlockDriverState *bs_table[MAX_DISKS];
|
672 |
|
673 |
void isa_ide_init(int iobase, int iobase2, int irq, |
674 |
BlockDriverState *hd0, BlockDriverState *hd1); |
675 |
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
676 |
int secondary_ide_enabled);
|
677 |
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
|
678 |
int pmac_ide_init (BlockDriverState **hd_table,
|
679 |
SetIRQFunc *set_irq, void *irq_opaque, int irq); |
680 |
|
681 |
/* es1370.c */
|
682 |
int es1370_init (PCIBus *bus, AudioState *s);
|
683 |
|
684 |
/* sb16.c */
|
685 |
int SB16_init (AudioState *s);
|
686 |
|
687 |
/* adlib.c */
|
688 |
int Adlib_init (AudioState *s);
|
689 |
|
690 |
/* gus.c */
|
691 |
int GUS_init (AudioState *s);
|
692 |
|
693 |
/* dma.c */
|
694 |
typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
695 |
int DMA_get_channel_mode (int nchan); |
696 |
int DMA_read_memory (int nchan, void *buf, int pos, int size); |
697 |
int DMA_write_memory (int nchan, void *buf, int pos, int size); |
698 |
void DMA_hold_DREQ (int nchan); |
699 |
void DMA_release_DREQ (int nchan); |
700 |
void DMA_schedule(int nchan); |
701 |
void DMA_run (void); |
702 |
void DMA_init (int high_page_enable); |
703 |
void DMA_register_channel (int nchan, |
704 |
DMA_transfer_handler transfer_handler, |
705 |
void *opaque);
|
706 |
/* fdc.c */
|
707 |
#define MAX_FD 2 |
708 |
extern BlockDriverState *fd_table[MAX_FD];
|
709 |
|
710 |
typedef struct fdctrl_t fdctrl_t; |
711 |
|
712 |
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
713 |
uint32_t io_base, |
714 |
BlockDriverState **fds); |
715 |
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
716 |
|
717 |
/* ne2000.c */
|
718 |
|
719 |
void isa_ne2000_init(int base, int irq, NICInfo *nd); |
720 |
void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
|
721 |
|
722 |
/* pckbd.c */
|
723 |
|
724 |
void kbd_init(void); |
725 |
|
726 |
/* mc146818rtc.c */
|
727 |
|
728 |
typedef struct RTCState RTCState; |
729 |
|
730 |
RTCState *rtc_init(int base, int irq); |
731 |
void rtc_set_memory(RTCState *s, int addr, int val); |
732 |
void rtc_set_date(RTCState *s, const struct tm *tm); |
733 |
|
734 |
/* serial.c */
|
735 |
|
736 |
typedef struct SerialState SerialState; |
737 |
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
|
738 |
int base, int irq, CharDriverState *chr); |
739 |
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
|
740 |
target_ulong base, int it_shift,
|
741 |
int irq, CharDriverState *chr);
|
742 |
|
743 |
/* parallel.c */
|
744 |
|
745 |
typedef struct ParallelState ParallelState; |
746 |
ParallelState *parallel_init(int base, int irq, CharDriverState *chr); |
747 |
|
748 |
/* i8259.c */
|
749 |
|
750 |
typedef struct PicState2 PicState2; |
751 |
extern PicState2 *isa_pic;
|
752 |
void pic_set_irq(int irq, int level); |
753 |
void pic_set_irq_new(void *opaque, int irq, int level); |
754 |
PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
755 |
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
756 |
void *alt_irq_opaque);
|
757 |
int pic_read_irq(PicState2 *s);
|
758 |
void pic_update_irq(PicState2 *s);
|
759 |
uint32_t pic_intack_read(PicState2 *s); |
760 |
void pic_info(void); |
761 |
void irq_info(void); |
762 |
|
763 |
/* APIC */
|
764 |
typedef struct IOAPICState IOAPICState; |
765 |
|
766 |
int apic_init(CPUState *env);
|
767 |
int apic_get_interrupt(CPUState *env);
|
768 |
IOAPICState *ioapic_init(void);
|
769 |
void ioapic_set_irq(void *opaque, int vector, int level); |
770 |
|
771 |
/* i8254.c */
|
772 |
|
773 |
#define PIT_FREQ 1193182 |
774 |
|
775 |
typedef struct PITState PITState; |
776 |
|
777 |
PITState *pit_init(int base, int irq); |
778 |
void pit_set_gate(PITState *pit, int channel, int val); |
779 |
int pit_get_gate(PITState *pit, int channel); |
780 |
int pit_get_out(PITState *pit, int channel, int64_t current_time); |
781 |
|
782 |
/* pc.c */
|
783 |
extern QEMUMachine pc_machine;
|
784 |
extern QEMUMachine isapc_machine;
|
785 |
|
786 |
void ioport_set_a20(int enable); |
787 |
int ioport_get_a20(void); |
788 |
|
789 |
/* ppc.c */
|
790 |
extern QEMUMachine prep_machine;
|
791 |
extern QEMUMachine core99_machine;
|
792 |
extern QEMUMachine heathrow_machine;
|
793 |
|
794 |
/* mips_r4k.c */
|
795 |
extern QEMUMachine mips_machine;
|
796 |
|
797 |
#ifdef TARGET_PPC
|
798 |
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
799 |
#endif
|
800 |
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
801 |
|
802 |
extern CPUWriteMemoryFunc *PPC_io_write[];
|
803 |
extern CPUReadMemoryFunc *PPC_io_read[];
|
804 |
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
805 |
|
806 |
/* sun4m.c */
|
807 |
extern QEMUMachine sun4m_machine;
|
808 |
uint32_t iommu_translate(uint32_t addr); |
809 |
|
810 |
/* iommu.c */
|
811 |
void *iommu_init(uint32_t addr);
|
812 |
uint32_t iommu_translate_local(void *opaque, uint32_t addr);
|
813 |
|
814 |
/* lance.c */
|
815 |
void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
816 |
|
817 |
/* tcx.c */
|
818 |
void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
819 |
unsigned long vram_offset, int vram_size, int width, int height); |
820 |
void tcx_update_display(void *opaque); |
821 |
void tcx_invalidate_display(void *opaque); |
822 |
void tcx_screen_dump(void *opaque, const char *filename); |
823 |
|
824 |
/* slavio_intctl.c */
|
825 |
void *slavio_intctl_init();
|
826 |
void slavio_pic_info(void *opaque); |
827 |
void slavio_irq_info(void *opaque); |
828 |
void slavio_pic_set_irq(void *opaque, int irq, int level); |
829 |
|
830 |
/* magic-load.c */
|
831 |
int load_elf(const char *filename, uint8_t *addr); |
832 |
int load_aout(const char *filename, uint8_t *addr); |
833 |
|
834 |
/* slavio_timer.c */
|
835 |
void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2); |
836 |
|
837 |
/* slavio_serial.c */
|
838 |
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); |
839 |
void slavio_serial_ms_kbd_init(int base, int irq); |
840 |
|
841 |
/* slavio_misc.c */
|
842 |
void *slavio_misc_init(uint32_t base, int irq); |
843 |
void slavio_set_power_fail(void *opaque, int power_failing); |
844 |
|
845 |
/* esp.c */
|
846 |
void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); |
847 |
|
848 |
/* sun4u.c */
|
849 |
extern QEMUMachine sun4u_machine;
|
850 |
|
851 |
/* NVRAM helpers */
|
852 |
#include "hw/m48t59.h" |
853 |
|
854 |
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
855 |
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
856 |
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
857 |
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
858 |
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
859 |
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
860 |
void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
861 |
const unsigned char *str, uint32_t max); |
862 |
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
863 |
void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
864 |
uint32_t start, uint32_t count); |
865 |
int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
866 |
const unsigned char *arch, |
867 |
uint32_t RAM_size, int boot_device,
|
868 |
uint32_t kernel_image, uint32_t kernel_size, |
869 |
const char *cmdline, |
870 |
uint32_t initrd_image, uint32_t initrd_size, |
871 |
uint32_t NVRAM_image, |
872 |
int width, int height, int depth); |
873 |
|
874 |
/* adb.c */
|
875 |
|
876 |
#define MAX_ADB_DEVICES 16 |
877 |
|
878 |
#define ADB_MAX_OUT_LEN 16 |
879 |
|
880 |
typedef struct ADBDevice ADBDevice; |
881 |
|
882 |
/* buf = NULL means polling */
|
883 |
typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
884 |
const uint8_t *buf, int len); |
885 |
typedef int ADBDeviceReset(ADBDevice *d); |
886 |
|
887 |
struct ADBDevice {
|
888 |
struct ADBBusState *bus;
|
889 |
int devaddr;
|
890 |
int handler;
|
891 |
ADBDeviceRequest *devreq; |
892 |
ADBDeviceReset *devreset; |
893 |
void *opaque;
|
894 |
}; |
895 |
|
896 |
typedef struct ADBBusState { |
897 |
ADBDevice devices[MAX_ADB_DEVICES]; |
898 |
int nb_devices;
|
899 |
int poll_index;
|
900 |
} ADBBusState; |
901 |
|
902 |
int adb_request(ADBBusState *s, uint8_t *buf_out,
|
903 |
const uint8_t *buf, int len); |
904 |
int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
905 |
|
906 |
ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
907 |
ADBDeviceRequest *devreq, |
908 |
ADBDeviceReset *devreset, |
909 |
void *opaque);
|
910 |
void adb_kbd_init(ADBBusState *bus);
|
911 |
void adb_mouse_init(ADBBusState *bus);
|
912 |
|
913 |
/* cuda.c */
|
914 |
|
915 |
extern ADBBusState adb_bus;
|
916 |
int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
917 |
|
918 |
#include "hw/usb.h" |
919 |
|
920 |
/* usb ports of the VM */
|
921 |
|
922 |
#define MAX_VM_USB_PORTS 8 |
923 |
|
924 |
extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
|
925 |
extern USBDevice *vm_usb_hub;
|
926 |
|
927 |
void do_usb_add(const char *devname); |
928 |
void do_usb_del(const char *devname); |
929 |
void usb_info(void); |
930 |
|
931 |
/* integratorcp.c */
|
932 |
extern QEMUMachine integratorcp_machine;
|
933 |
|
934 |
/* ps2.c */
|
935 |
void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); |
936 |
void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); |
937 |
void ps2_write_mouse(void *, int val); |
938 |
void ps2_write_keyboard(void *, int val); |
939 |
uint32_t ps2_read_data(void *);
|
940 |
void ps2_queue(void *, int b); |
941 |
|
942 |
/* smc91c111.c */
|
943 |
void smc91c111_init(NICInfo *, uint32_t, void *, int); |
944 |
|
945 |
#endif /* defined(QEMU_TOOL) */ |
946 |
|
947 |
/* monitor.c */
|
948 |
void monitor_init(CharDriverState *hd, int show_banner); |
949 |
void term_puts(const char *str); |
950 |
void term_vprintf(const char *fmt, va_list ap); |
951 |
void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
952 |
void term_flush(void); |
953 |
void term_print_help(void); |
954 |
void monitor_readline(const char *prompt, int is_password, |
955 |
char *buf, int buf_size); |
956 |
|
957 |
/* readline.c */
|
958 |
typedef void ReadLineFunc(void *opaque, const char *str); |
959 |
|
960 |
extern int completion_index; |
961 |
void add_completion(const char *str); |
962 |
void readline_handle_byte(int ch); |
963 |
void readline_find_completion(const char *cmdline); |
964 |
const char *readline_get_history(unsigned int index); |
965 |
void readline_start(const char *prompt, int is_password, |
966 |
ReadLineFunc *readline_func, void *opaque);
|
967 |
|
968 |
void kqemu_record_dump(void); |
969 |
|
970 |
#endif /* VL_H */ |