Revision 80e8bd2b hw/ppc405_uc.c

b/hw/ppc405_uc.c
2230 2230 
    pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
2231 2231 
    *picp = pic;
2232 2232 
    /* SDRAM controller */
2233 
    ppc405_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
2233 
    ppc4xx_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
2234 2234 
    offset = 0;
2235 2235 
    for (i = 0; i < 4; i++)
2236 2236 
        offset += ram_sizes[i];
......
2588 2588 
    *picp = pic;
2589 2589 
    /* SDRAM controller */
2590 2590 
	/* XXX 405EP has no ECC interrupt */
2591 
    ppc405_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
2591 
    ppc4xx_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
2592 2592 
    offset = 0;
2593 2593 
    for (i = 0; i < 2; i++)
2594 2594 
        offset += ram_sizes[i];

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