Revision 819385c5 hw/sun4u.c
| b/hw/sun4u.c | ||
|---|---|---|
| 68 | 68 |
/* NVRAM helpers */ |
| 69 | 69 |
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value) |
| 70 | 70 |
{
|
| 71 |
m48t59_set_addr(nvram, addr); |
|
| 72 |
m48t59_write(nvram, value); |
|
| 71 |
m48t59_write(nvram, addr, value); |
|
| 73 | 72 |
} |
| 74 | 73 |
|
| 75 | 74 |
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr) |
| 76 | 75 |
{
|
| 77 |
m48t59_set_addr(nvram, addr); |
|
| 78 |
return m48t59_read(nvram); |
|
| 76 |
return m48t59_read(nvram, addr); |
|
| 79 | 77 |
} |
| 80 | 78 |
|
| 81 | 79 |
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value) |
| 82 | 80 |
{
|
| 83 |
m48t59_set_addr(nvram, addr); |
|
| 84 |
m48t59_write(nvram, value >> 8); |
|
| 85 |
m48t59_set_addr(nvram, addr + 1); |
|
| 86 |
m48t59_write(nvram, value & 0xFF); |
|
| 81 |
m48t59_write(nvram, addr, value >> 8); |
|
| 82 |
m48t59_write(nvram, addr + 1, value & 0xFF); |
|
| 87 | 83 |
} |
| 88 | 84 |
|
| 89 | 85 |
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr) |
| 90 | 86 |
{
|
| 91 | 87 |
uint16_t tmp; |
| 92 | 88 |
|
| 93 |
m48t59_set_addr(nvram, addr); |
|
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tmp = m48t59_read(nvram) << 8; |
|
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m48t59_set_addr(nvram, addr + 1); |
|
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tmp |= m48t59_read(nvram); |
|
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tmp = m48t59_read(nvram, addr) << 8; |
|
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tmp |= m48t59_read(nvram, addr + 1); |
|
| 97 | 91 |
|
| 98 | 92 |
return tmp; |
| 99 | 93 |
} |
| 100 | 94 |
|
| 101 | 95 |
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value) |
| 102 | 96 |
{
|
| 103 |
m48t59_set_addr(nvram, addr); |
|
| 104 |
m48t59_write(nvram, value >> 24); |
|
| 105 |
m48t59_set_addr(nvram, addr + 1); |
|
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m48t59_write(nvram, (value >> 16) & 0xFF); |
|
| 107 |
m48t59_set_addr(nvram, addr + 2); |
|
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m48t59_write(nvram, (value >> 8) & 0xFF); |
|
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m48t59_set_addr(nvram, addr + 3); |
|
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m48t59_write(nvram, value & 0xFF); |
|
| 97 |
m48t59_write(nvram, addr, value >> 24); |
|
| 98 |
m48t59_write(nvram, addr + 1, (value >> 16) & 0xFF); |
|
| 99 |
m48t59_write(nvram, addr + 2, (value >> 8) & 0xFF); |
|
| 100 |
m48t59_write(nvram, addr + 3, value & 0xFF); |
|
| 111 | 101 |
} |
| 112 | 102 |
|
| 113 | 103 |
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr) |
| 114 | 104 |
{
|
| 115 | 105 |
uint32_t tmp; |
| 116 | 106 |
|
| 117 |
m48t59_set_addr(nvram, addr); |
|
| 118 |
tmp = m48t59_read(nvram) << 24; |
|
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m48t59_set_addr(nvram, addr + 1); |
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tmp |= m48t59_read(nvram) << 16; |
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m48t59_set_addr(nvram, addr + 2); |
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tmp |= m48t59_read(nvram) << 8; |
|
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m48t59_set_addr(nvram, addr + 3); |
|
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tmp |= m48t59_read(nvram); |
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tmp = m48t59_read(nvram, addr) << 24; |
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tmp |= m48t59_read(nvram, addr + 1) << 16; |
|
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tmp |= m48t59_read(nvram, addr + 2) << 8; |
|
| 110 |
tmp |= m48t59_read(nvram, addr + 3); |
|
| 125 | 111 |
|
| 126 | 112 |
return tmp; |
| 127 | 113 |
} |
| ... | ... | |
| 132 | 118 |
int i; |
| 133 | 119 |
|
| 134 | 120 |
for (i = 0; i < max && str[i] != '\0'; i++) {
|
| 135 |
m48t59_set_addr(nvram, addr + i); |
|
| 136 |
m48t59_write(nvram, str[i]); |
|
| 121 |
m48t59_write(nvram, addr + i, str[i]); |
|
| 137 | 122 |
} |
| 138 |
m48t59_set_addr(nvram, addr + max - 1); |
|
| 139 |
m48t59_write(nvram, '\0'); |
|
| 123 |
m48t59_write(nvram, addr + max - 1, '\0'); |
|
| 140 | 124 |
} |
| 141 | 125 |
|
| 142 | 126 |
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max) |
| ... | ... | |
| 357 | 341 |
pci_cmd646_ide_init(pci_bus, bs_table, 1); |
| 358 | 342 |
kbd_init(); |
| 359 | 343 |
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
| 360 |
nvram = m48t59_init(8, 0, 0x0074, NVRAM_SIZE); |
|
| 344 |
nvram = m48t59_init(8, 0, 0x0074, NVRAM_SIZE, 59);
|
|
| 361 | 345 |
sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", ram_size, boot_device, |
| 362 | 346 |
KERNEL_LOAD_ADDR, kernel_size, |
| 363 | 347 |
kernel_cmdline, |
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