Revision 81a322d4 hw/piix_pci.c
| b/hw/piix_pci.c | ||
|---|---|---|
| 171 | 171 |
return 0; |
| 172 | 172 |
} |
| 173 | 173 |
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static void i440fx_pcihost_initfn(SysBusDevice *dev)
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static int i440fx_pcihost_initfn(SysBusDevice *dev)
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| 175 | 175 |
{
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| 176 | 176 |
I440FXState *s = FROM_SYSBUS(I440FXState, dev); |
| 177 | 177 |
|
| ... | ... | |
| 184 | 184 |
register_ioport_read(0xcfc, 4, 1, pci_host_data_readb, s); |
| 185 | 185 |
register_ioport_read(0xcfc, 4, 2, pci_host_data_readw, s); |
| 186 | 186 |
register_ioport_read(0xcfc, 4, 4, pci_host_data_readl, s); |
| 187 |
return 0; |
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| 187 | 188 |
} |
| 188 | 189 |
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static void i440fx_initfn(PCIDevice *d)
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static int i440fx_initfn(PCIDevice *d)
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| 190 | 191 |
{
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| 191 | 192 |
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL); |
| 192 | 193 |
pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441); |
| ... | ... | |
| 197 | 198 |
d->config[0x72] = 0x02; /* SMRAM */ |
| 198 | 199 |
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| 199 | 200 |
register_savevm("I440FX", 0, 2, i440fx_save, i440fx_load, d);
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| 201 |
return 0; |
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| 200 | 202 |
} |
| 201 | 203 |
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| 202 | 204 |
PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic) |
| ... | ... | |
| 339 | 341 |
return pci_device_load(d, f); |
| 340 | 342 |
} |
| 341 | 343 |
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static void piix3_initfn(PCIDevice *d)
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static int piix3_initfn(PCIDevice *d)
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{
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| 344 | 346 |
uint8_t *pci_conf; |
| 345 | 347 |
|
| ... | ... | |
| 356 | 358 |
piix3_dev = d; |
| 357 | 359 |
piix3_reset(d); |
| 358 | 360 |
qemu_register_reset(piix3_reset, d); |
| 361 |
return 0; |
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| 359 | 362 |
} |
| 360 | 363 |
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static void piix4_initfn(PCIDevice *d)
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static int piix4_initfn(PCIDevice *d)
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| 362 | 365 |
{
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| 363 | 366 |
uint8_t *pci_conf; |
| 364 | 367 |
|
| ... | ... | |
| 374 | 377 |
piix4_dev = d; |
| 375 | 378 |
piix4_reset(d); |
| 376 | 379 |
qemu_register_reset(piix4_reset, d); |
| 380 |
return 0; |
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| 377 | 381 |
} |
| 378 | 382 |
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| 379 | 383 |
int piix3_init(PCIBus *bus, int devfn) |
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