Revision 8217606e hw/sun4m.c
b/hw/sun4m.c | ||
---|---|---|
418 | 418 |
cpu_sparc_set_id(env, i); |
419 | 419 |
envs[i] = env; |
420 | 420 |
if (i == 0) { |
421 |
qemu_register_reset(main_cpu_reset, env); |
|
421 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
422 | 422 |
} else { |
423 |
qemu_register_reset(secondary_cpu_reset, env); |
|
423 |
qemu_register_reset(secondary_cpu_reset, 0, env);
|
|
424 | 424 |
env->halted = 1; |
425 | 425 |
} |
426 | 426 |
cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); |
... | ... | |
1201 | 1201 |
cpu_sparc_set_id(env, i); |
1202 | 1202 |
envs[i] = env; |
1203 | 1203 |
if (i == 0) { |
1204 |
qemu_register_reset(main_cpu_reset, env); |
|
1204 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
1205 | 1205 |
} else { |
1206 |
qemu_register_reset(secondary_cpu_reset, env); |
|
1206 |
qemu_register_reset(secondary_cpu_reset, 0, env);
|
|
1207 | 1207 |
env->halted = 1; |
1208 | 1208 |
} |
1209 | 1209 |
cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); |
... | ... | |
1416 | 1416 |
|
1417 | 1417 |
cpu_sparc_set_id(env, 0); |
1418 | 1418 |
|
1419 |
qemu_register_reset(main_cpu_reset, env); |
|
1419 |
qemu_register_reset(main_cpu_reset, 0, env);
|
|
1420 | 1420 |
cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS); |
1421 | 1421 |
env->prom_addr = hwdef->slavio_base; |
1422 | 1422 |
|
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