Revision 822557eb
b/hw/hpet.c | ||
---|---|---|
29 | 29 |
#include "console.h" |
30 | 30 |
#include "qemu-timer.h" |
31 | 31 |
#include "hpet_emul.h" |
32 |
#include "sysbus.h" |
|
32 | 33 |
|
33 | 34 |
//#define HPET_DEBUG |
34 | 35 |
#ifdef HPET_DEBUG |
... | ... | |
54 | 55 |
} HPETTimer; |
55 | 56 |
|
56 | 57 |
typedef struct HPETState { |
58 |
SysBusDevice busdev; |
|
57 | 59 |
uint64_t hpet_offset; |
58 |
qemu_irq *irqs;
|
|
60 |
qemu_irq irqs[HPET_NUM_IRQ_ROUTES];
|
|
59 | 61 |
HPETTimer timer[HPET_NUM_TIMERS]; |
60 | 62 |
|
61 | 63 |
/* Memory-mapped, software visible registers */ |
... | ... | |
565 | 567 |
hpet_ram_writel, |
566 | 568 |
}; |
567 | 569 |
|
568 |
static void hpet_reset(void *opaque)
|
|
570 |
static void hpet_reset(DeviceState *d)
|
|
569 | 571 |
{ |
570 |
HPETState *s = opaque;
|
|
572 |
HPETState *s = FROM_SYSBUS(HPETState, sysbus_from_qdev(d));
|
|
571 | 573 |
int i; |
572 | 574 |
static int count = 0; |
573 | 575 |
|
... | ... | |
600 | 602 |
count = 1; |
601 | 603 |
} |
602 | 604 |
|
603 |
|
|
604 |
void hpet_init(qemu_irq *irq) |
|
605 |
static int hpet_init(SysBusDevice *dev) |
|
605 | 606 |
{ |
607 |
HPETState *s = FROM_SYSBUS(HPETState, dev); |
|
606 | 608 |
int i, iomemtype; |
607 | 609 |
HPETTimer *timer; |
608 |
HPETState *s; |
|
609 |
|
|
610 |
DPRINTF ("hpet_init\n"); |
|
611 | 610 |
|
612 |
s = qemu_mallocz(sizeof(HPETState));
|
|
611 |
assert(!hpet_statep);
|
|
613 | 612 |
hpet_statep = s; |
614 |
s->irqs = irq; |
|
613 |
for (i = 0; i < HPET_NUM_IRQ_ROUTES; i++) { |
|
614 |
sysbus_init_irq(dev, &s->irqs[i]); |
|
615 |
} |
|
615 | 616 |
for (i = 0; i < HPET_NUM_TIMERS; i++) { |
616 | 617 |
timer = &s->timer[i]; |
617 | 618 |
timer->qemu_timer = qemu_new_timer(vm_clock, hpet_timer, timer); |
618 | 619 |
timer->tn = i; |
619 | 620 |
timer->state = s; |
620 | 621 |
} |
621 |
vmstate_register(-1, &vmstate_hpet, s); |
|
622 |
qemu_register_reset(hpet_reset, s); |
|
622 |
|
|
623 | 623 |
/* HPET Area */ |
624 | 624 |
iomemtype = cpu_register_io_memory(hpet_ram_read, |
625 | 625 |
hpet_ram_write, s); |
626 |
cpu_register_physical_memory(HPET_BASE, 0x400, iomemtype); |
|
626 |
sysbus_init_mmio(dev, 0x400, iomemtype); |
|
627 |
return 0; |
|
627 | 628 |
} |
629 |
|
|
630 |
static SysBusDeviceInfo hpet_device_info = { |
|
631 |
.qdev.name = "hpet", |
|
632 |
.qdev.size = sizeof(HPETState), |
|
633 |
.qdev.no_user = 1, |
|
634 |
.qdev.vmsd = &vmstate_hpet, |
|
635 |
.qdev.reset = hpet_reset, |
|
636 |
.init = hpet_init, |
|
637 |
}; |
|
638 |
|
|
639 |
static void hpet_register_device(void) |
|
640 |
{ |
|
641 |
sysbus_register_withprop(&hpet_device_info); |
|
642 |
} |
|
643 |
|
|
644 |
device_init(hpet_register_device) |
b/hw/hpet_emul.h | ||
---|---|---|
19 | 19 |
#define FS_PER_NS 1000000 |
20 | 20 |
#define HPET_NUM_TIMERS 3 |
21 | 21 |
|
22 |
#define HPET_NUM_IRQ_ROUTES 32 |
|
23 |
|
|
22 | 24 |
#define HPET_CFG_ENABLE 0x001 |
23 | 25 |
#define HPET_CFG_LEGACY 0x002 |
24 | 26 |
|
... | ... | |
47 | 49 |
|
48 | 50 |
#if defined TARGET_I386 |
49 | 51 |
extern uint32_t hpet_in_legacy_mode(void); |
50 |
extern void hpet_init(qemu_irq *irq); |
|
51 | 52 |
#endif |
52 | 53 |
|
53 | 54 |
#endif |
b/hw/pc.c | ||
---|---|---|
35 | 35 |
#include "elf.h" |
36 | 36 |
#include "multiboot.h" |
37 | 37 |
#include "mc146818rtc.h" |
38 |
#include "sysbus.h" |
|
38 | 39 |
|
39 | 40 |
/* output Bochs bios info messages */ |
40 | 41 |
//#define DEBUG_BIOS |
... | ... | |
957 | 958 |
pit = pit_init(0x40, isa_reserve_irq(0)); |
958 | 959 |
pcspk_init(pit); |
959 | 960 |
if (!no_hpet) { |
960 |
hpet_init(isa_irq); |
|
961 |
DeviceState *hpet = sysbus_create_simple("hpet", HPET_BASE, NULL); |
|
962 |
|
|
963 |
for (i = 0; i < 24; i++) { |
|
964 |
sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]); |
|
965 |
} |
|
961 | 966 |
} |
962 | 967 |
|
963 | 968 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
Also available in: Unified diff