root / target-sparc / exec.h @ 8294eba1
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1 | 7a3f1944 | bellard | #ifndef EXEC_SPARC_H
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2 | 7a3f1944 | bellard | #define EXEC_SPARC_H 1 |
3 | 3475187d | bellard | #include "config.h" |
4 | 8294eba1 | ths | #include "dyngen-exec.h" |
5 | 7a3f1944 | bellard | |
6 | 7a3f1944 | bellard | register struct CPUSPARCState *env asm(AREG0); |
7 | 01d6a890 | ths | |
8 | af7bf89b | bellard | #ifdef TARGET_SPARC64
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9 | af7bf89b | bellard | #define T0 (env->t0)
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10 | af7bf89b | bellard | #define T1 (env->t1)
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11 | af7bf89b | bellard | #define T2 (env->t2)
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12 | 3475187d | bellard | #define REGWPTR env->regwptr
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13 | af7bf89b | bellard | #else
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14 | 7a3f1944 | bellard | register uint32_t T0 asm(AREG1); |
15 | 7a3f1944 | bellard | register uint32_t T1 asm(AREG2); |
16 | 3475187d | bellard | |
17 | 3475187d | bellard | #undef REG_REGWPTR // Broken |
18 | 3475187d | bellard | #ifdef REG_REGWPTR
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19 | 01d6a890 | ths | #if defined(__sparc__)
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20 | 01d6a890 | ths | register uint32_t *REGWPTR asm(AREG4); |
21 | 01d6a890 | ths | #else
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22 | 3475187d | bellard | register uint32_t *REGWPTR asm(AREG3); |
23 | 01d6a890 | ths | #endif
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24 | 3475187d | bellard | #define reg_REGWPTR
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25 | 3475187d | bellard | |
26 | 3475187d | bellard | #ifdef AREG4
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27 | 3475187d | bellard | register uint32_t T2 asm(AREG4); |
28 | 3475187d | bellard | #define reg_T2
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29 | 3475187d | bellard | #else
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30 | 3475187d | bellard | #define T2 (env->t2)
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31 | 3475187d | bellard | #endif
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32 | 3475187d | bellard | |
33 | 3475187d | bellard | #else
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34 | 3475187d | bellard | #define REGWPTR env->regwptr
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35 | 7a3f1944 | bellard | register uint32_t T2 asm(AREG3); |
36 | 01d6a890 | ths | #endif
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37 | 3475187d | bellard | #define reg_T2
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38 | 3475187d | bellard | #endif
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39 | 3475187d | bellard | |
40 | e8af50a3 | bellard | #define FT0 (env->ft0)
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41 | e8af50a3 | bellard | #define FT1 (env->ft1)
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42 | e8af50a3 | bellard | #define DT0 (env->dt0)
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43 | e8af50a3 | bellard | #define DT1 (env->dt1)
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44 | 7a3f1944 | bellard | |
45 | 7a3f1944 | bellard | #include "cpu.h" |
46 | 7a3f1944 | bellard | #include "exec-all.h" |
47 | 7a3f1944 | bellard | |
48 | 7a3f1944 | bellard | void cpu_lock(void); |
49 | 7a3f1944 | bellard | void cpu_unlock(void); |
50 | 7a3f1944 | bellard | void cpu_loop_exit(void); |
51 | 658138bc | bellard | void helper_flush(target_ulong addr);
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52 | e8af50a3 | bellard | void helper_ld_asi(int asi, int size, int sign); |
53 | e8af50a3 | bellard | void helper_st_asi(int asi, int size, int sign); |
54 | e8af50a3 | bellard | void helper_rett(void); |
55 | 8d5f07fa | bellard | void helper_ldfsr(void); |
56 | e8af50a3 | bellard | void set_cwp(int new_cwp); |
57 | a0c4cb4a | bellard | void do_fitos(void); |
58 | a0c4cb4a | bellard | void do_fitod(void); |
59 | e8af50a3 | bellard | void do_fabss(void); |
60 | e8af50a3 | bellard | void do_fsqrts(void); |
61 | e8af50a3 | bellard | void do_fsqrtd(void); |
62 | e8af50a3 | bellard | void do_fcmps(void); |
63 | e8af50a3 | bellard | void do_fcmpd(void); |
64 | 3475187d | bellard | #ifdef TARGET_SPARC64
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65 | 3475187d | bellard | void do_fabsd(void); |
66 | 3475187d | bellard | void do_fcmps_fcc1(void); |
67 | 3475187d | bellard | void do_fcmpd_fcc1(void); |
68 | 3475187d | bellard | void do_fcmps_fcc2(void); |
69 | 3475187d | bellard | void do_fcmpd_fcc2(void); |
70 | 3475187d | bellard | void do_fcmps_fcc3(void); |
71 | 3475187d | bellard | void do_fcmpd_fcc3(void); |
72 | 3475187d | bellard | void do_popc();
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73 | 83469015 | bellard | void do_wrpstate();
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74 | 83469015 | bellard | void do_done();
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75 | 83469015 | bellard | void do_retry();
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76 | 3475187d | bellard | #endif
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77 | af7bf89b | bellard | void do_ldd_kernel(target_ulong addr);
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78 | af7bf89b | bellard | void do_ldd_user(target_ulong addr);
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79 | af7bf89b | bellard | void do_ldd_raw(target_ulong addr);
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80 | 878d3096 | bellard | void do_interrupt(int intno); |
81 | e8af50a3 | bellard | void raise_exception(int tt); |
82 | af7bf89b | bellard | void memcpy32(target_ulong *dst, const target_ulong *src); |
83 | ee5bbe38 | bellard | target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
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84 | ee5bbe38 | bellard | void dump_mmu(CPUState *env);
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85 | e80cfcfc | bellard | void helper_debug();
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86 | af7bf89b | bellard | void do_wrpsr();
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87 | af7bf89b | bellard | void do_rdpsr();
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88 | e8af50a3 | bellard | |
89 | e8af50a3 | bellard | /* XXX: move that to a generic header */
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90 | e8af50a3 | bellard | #if !defined(CONFIG_USER_ONLY)
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91 | a9049a07 | bellard | #include "softmmu_exec.h" |
92 | e8af50a3 | bellard | #endif /* !defined(CONFIG_USER_ONLY) */ |
93 | 0d1a29f9 | bellard | |
94 | 0d1a29f9 | bellard | static inline void env_to_regs(void) |
95 | 0d1a29f9 | bellard | { |
96 | aea3ce4c | bellard | #if defined(reg_REGWPTR)
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97 | aea3ce4c | bellard | REGWPTR = env->regbase + (env->cwp * 16);
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98 | aea3ce4c | bellard | env->regwptr = REGWPTR; |
99 | aea3ce4c | bellard | #endif
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100 | 0d1a29f9 | bellard | } |
101 | 0d1a29f9 | bellard | |
102 | 0d1a29f9 | bellard | static inline void regs_to_env(void) |
103 | 0d1a29f9 | bellard | { |
104 | 0d1a29f9 | bellard | } |
105 | 0d1a29f9 | bellard | |
106 | 9d893301 | bellard | int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, |
107 | 9d893301 | bellard | int is_user, int is_softmmu); |
108 | 9d893301 | bellard | |
109 | 7a3f1944 | bellard | #endif |