Revision 8294eba1
| b/target-arm/exec.h | ||
|---|---|---|
| 17 | 17 |
* License along with this library; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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*/ |
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#include "config.h" |
|
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#include "dyngen-exec.h" |
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|
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#if defined(__sparc__) |
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struct CPUARMState *env; |
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uint32_t T0; |
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uint32_t T1; |
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uint32_t T2; |
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#else |
|
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register struct CPUARMState *env asm(AREG0); |
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register uint32_t T0 asm(AREG1); |
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register uint32_t T1 asm(AREG2); |
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register uint32_t T2 asm(AREG3); |
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#endif |
|
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|
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/* TODO: Put these in FP regs on targets that have such things. */ |
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/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ |
| b/target-mips/exec.h | ||
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| 7 | 7 |
#include "mips-defs.h" |
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#include "dyngen-exec.h" |
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#if defined(__sparc__) |
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struct CPUMIPSState *env; |
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#else |
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register struct CPUMIPSState *env asm(AREG0); |
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#endif |
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|
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#if defined (USE_64BITS_REGS) |
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typedef int64_t host_int_t; |
| ... | ... | |
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typedef uint32_t host_uint_t; |
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#endif |
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|
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#if defined(__sparc__) |
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host_uint_t T0; |
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host_uint_t T1; |
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host_uint_t T2; |
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#else |
|
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#if TARGET_LONG_BITS > HOST_LONG_BITS |
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#define T0 (env->t0) |
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#define T1 (env->t1) |
| ... | ... | |
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register host_uint_t T1 asm(AREG2); |
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register host_uint_t T2 asm(AREG3); |
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#endif |
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#endif |
|
| 39 | 29 |
|
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#if defined (USE_HOST_FLOAT_REGS) |
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#error "implement me." |
| b/target-sparc/exec.h | ||
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| 1 | 1 |
#ifndef EXEC_SPARC_H |
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#define EXEC_SPARC_H 1 |
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#include "dyngen-exec.h" |
|
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#include "config.h" |
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#include "dyngen-exec.h" |
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#if defined(__sparc__) |
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struct CPUSPARCState *env; |
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#else |
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register struct CPUSPARCState *env asm(AREG0); |
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#endif |
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| 11 | 7 |
|
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#ifdef TARGET_SPARC64 |
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#define T0 (env->t0) |
| ... | ... | |
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#define T2 (env->t2) |
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#define REGWPTR env->regwptr |
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#else |
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#if defined(__sparc__) |
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register uint32_t T0 asm(AREG3); |
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register uint32_t T1 asm(AREG2); |
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#else |
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register uint32_t T0 asm(AREG1); |
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register uint32_t T1 asm(AREG2); |
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#endif |
|
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|
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#undef REG_REGWPTR // Broken |
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#ifdef REG_REGWPTR |
| ... | ... | |
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#define reg_REGWPTR |
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|
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#ifdef AREG4 |
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#if defined(__sparc__) |
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register uint32_t T2 asm(AREG0); |
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#else |
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register uint32_t T2 asm(AREG4); |
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#endif |
|
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#define reg_T2 |
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#else |
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#define T2 (env->t2) |
| ... | ... | |
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|
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#else |
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#define REGWPTR env->regwptr |
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#if defined(__sparc__) |
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register uint32_t T2 asm(AREG0); |
|
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#else |
|
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register uint32_t T2 asm(AREG3); |
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#endif |
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#define reg_T2 |
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#endif |
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#endif |
|
| 56 | 39 |
|
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#define FT0 (env->ft0) |
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#define FT1 (env->ft1) |
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