Revision 84108e12 hw/mips_mipssim.c

b/hw/mips_mipssim.c
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    cpu_mips_clock_init(env);
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    /* Register 64 KB of ISA IO space at 0x1fd00000. */


  		





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    isa_mmio_init(0x1fd00000, 0x00010000);


  		





  
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#ifdef TARGET_WORDS_BIGENDIAN


  		





  
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    isa_mmio_init(0x1fd00000, 0x00010000, 1);


  		





  
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#else


  		





  
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    isa_mmio_init(0x1fd00000, 0x00010000, 0);


  		





  
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#endif


  		





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    /* A single 16450 sits at offset 0x3f8. It is attached to


  		





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       MIPS CPU INT2, which is interrupt 4. */


  		












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