Statistics
| Branch: | Revision:

root / target-i386 / op.c @ 8422b113

History | View | Annotate | Download (41.3 kB)

1
/*
2
 *  i386 micro operations
3
 * 
4
 *  Copyright (c) 2003 Fabrice Bellard
5
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
8
 * License as published by the Free Software Foundation; either
9
 * version 2 of the License, or (at your option) any later version.
10
 *
11
 * This library is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU Lesser General Public
17
 * License along with this library; if not, write to the Free Software
18
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
 */
20

    
21
#define ASM_SOFTMMU
22
#include "exec.h"
23

    
24
/* n must be a constant to be efficient */
25
static inline target_long lshift(target_long x, int n)
26
{
27
    if (n >= 0)
28
        return x << n;
29
    else
30
        return x >> (-n);
31
}
32

    
33
/* we define the various pieces of code used by the JIT */
34

    
35
#define REG EAX
36
#define REGNAME _EAX
37
#include "opreg_template.h"
38
#undef REG
39
#undef REGNAME
40

    
41
#define REG ECX
42
#define REGNAME _ECX
43
#include "opreg_template.h"
44
#undef REG
45
#undef REGNAME
46

    
47
#define REG EDX
48
#define REGNAME _EDX
49
#include "opreg_template.h"
50
#undef REG
51
#undef REGNAME
52

    
53
#define REG EBX
54
#define REGNAME _EBX
55
#include "opreg_template.h"
56
#undef REG
57
#undef REGNAME
58

    
59
#define REG ESP
60
#define REGNAME _ESP
61
#include "opreg_template.h"
62
#undef REG
63
#undef REGNAME
64

    
65
#define REG EBP
66
#define REGNAME _EBP
67
#include "opreg_template.h"
68
#undef REG
69
#undef REGNAME
70

    
71
#define REG ESI
72
#define REGNAME _ESI
73
#include "opreg_template.h"
74
#undef REG
75
#undef REGNAME
76

    
77
#define REG EDI
78
#define REGNAME _EDI
79
#include "opreg_template.h"
80
#undef REG
81
#undef REGNAME
82

    
83
#ifdef TARGET_X86_64
84

    
85
#define REG (env->regs[8])
86
#define REGNAME _R8
87
#include "opreg_template.h"
88
#undef REG
89
#undef REGNAME
90

    
91
#define REG (env->regs[9])
92
#define REGNAME _R9
93
#include "opreg_template.h"
94
#undef REG
95
#undef REGNAME
96

    
97
#define REG (env->regs[10])
98
#define REGNAME _R10
99
#include "opreg_template.h"
100
#undef REG
101
#undef REGNAME
102

    
103
#define REG (env->regs[11])
104
#define REGNAME _R11
105
#include "opreg_template.h"
106
#undef REG
107
#undef REGNAME
108

    
109
#define REG (env->regs[12])
110
#define REGNAME _R12
111
#include "opreg_template.h"
112
#undef REG
113
#undef REGNAME
114

    
115
#define REG (env->regs[13])
116
#define REGNAME _R13
117
#include "opreg_template.h"
118
#undef REG
119
#undef REGNAME
120

    
121
#define REG (env->regs[14])
122
#define REGNAME _R14
123
#include "opreg_template.h"
124
#undef REG
125
#undef REGNAME
126

    
127
#define REG (env->regs[15])
128
#define REGNAME _R15
129
#include "opreg_template.h"
130
#undef REG
131
#undef REGNAME
132

    
133
#endif
134

    
135
/* operations with flags */
136

    
137
/* update flags with T0 and T1 (add/sub case) */
138
void OPPROTO op_update2_cc(void)
139
{
140
    CC_SRC = T1;
141
    CC_DST = T0;
142
}
143

    
144
/* update flags with T0 (logic operation case) */
145
void OPPROTO op_update1_cc(void)
146
{
147
    CC_DST = T0;
148
}
149

    
150
void OPPROTO op_update_neg_cc(void)
151
{
152
    CC_SRC = -T0;
153
    CC_DST = T0;
154
}
155

    
156
void OPPROTO op_cmpl_T0_T1_cc(void)
157
{
158
    CC_SRC = T1;
159
    CC_DST = T0 - T1;
160
}
161

    
162
void OPPROTO op_update_inc_cc(void)
163
{
164
    CC_SRC = cc_table[CC_OP].compute_c();
165
    CC_DST = T0;
166
}
167

    
168
void OPPROTO op_testl_T0_T1_cc(void)
169
{
170
    CC_DST = T0 & T1;
171
}
172

    
173
/* operations without flags */
174

    
175
void OPPROTO op_addl_T0_T1(void)
176
{
177
    T0 += T1;
178
}
179

    
180
void OPPROTO op_orl_T0_T1(void)
181
{
182
    T0 |= T1;
183
}
184

    
185
void OPPROTO op_andl_T0_T1(void)
186
{
187
    T0 &= T1;
188
}
189

    
190
void OPPROTO op_subl_T0_T1(void)
191
{
192
    T0 -= T1;
193
}
194

    
195
void OPPROTO op_xorl_T0_T1(void)
196
{
197
    T0 ^= T1;
198
}
199

    
200
void OPPROTO op_negl_T0(void)
201
{
202
    T0 = -T0;
203
}
204

    
205
void OPPROTO op_incl_T0(void)
206
{
207
    T0++;
208
}
209

    
210
void OPPROTO op_decl_T0(void)
211
{
212
    T0--;
213
}
214

    
215
void OPPROTO op_notl_T0(void)
216
{
217
    T0 = ~T0;
218
}
219

    
220
void OPPROTO op_bswapl_T0(void)
221
{
222
    T0 = bswap32(T0);
223
}
224

    
225
#ifdef TARGET_X86_64
226
void OPPROTO op_bswapq_T0(void)
227
{
228
    T0 = bswap64(T0);
229
}
230
#endif
231

    
232
/* multiply/divide */
233

    
234
/* XXX: add eflags optimizations */
235
/* XXX: add non P4 style flags */
236

    
237
void OPPROTO op_mulb_AL_T0(void)
238
{
239
    unsigned int res;
240
    res = (uint8_t)EAX * (uint8_t)T0;
241
    EAX = (EAX & ~0xffff) | res;
242
    CC_DST = res;
243
    CC_SRC = (res & 0xff00);
244
}
245

    
246
void OPPROTO op_imulb_AL_T0(void)
247
{
248
    int res;
249
    res = (int8_t)EAX * (int8_t)T0;
250
    EAX = (EAX & ~0xffff) | (res & 0xffff);
251
    CC_DST = res;
252
    CC_SRC = (res != (int8_t)res);
253
}
254

    
255
void OPPROTO op_mulw_AX_T0(void)
256
{
257
    unsigned int res;
258
    res = (uint16_t)EAX * (uint16_t)T0;
259
    EAX = (EAX & ~0xffff) | (res & 0xffff);
260
    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261
    CC_DST = res;
262
    CC_SRC = res >> 16;
263
}
264

    
265
void OPPROTO op_imulw_AX_T0(void)
266
{
267
    int res;
268
    res = (int16_t)EAX * (int16_t)T0;
269
    EAX = (EAX & ~0xffff) | (res & 0xffff);
270
    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
271
    CC_DST = res;
272
    CC_SRC = (res != (int16_t)res);
273
}
274

    
275
void OPPROTO op_mull_EAX_T0(void)
276
{
277
    uint64_t res;
278
    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279
    EAX = (uint32_t)res;
280
    EDX = (uint32_t)(res >> 32);
281
    CC_DST = (uint32_t)res;
282
    CC_SRC = (uint32_t)(res >> 32);
283
}
284

    
285
void OPPROTO op_imull_EAX_T0(void)
286
{
287
    int64_t res;
288
    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289
    EAX = (uint32_t)(res);
290
    EDX = (uint32_t)(res >> 32);
291
    CC_DST = res;
292
    CC_SRC = (res != (int32_t)res);
293
}
294

    
295
void OPPROTO op_imulw_T0_T1(void)
296
{
297
    int res;
298
    res = (int16_t)T0 * (int16_t)T1;
299
    T0 = res;
300
    CC_DST = res;
301
    CC_SRC = (res != (int16_t)res);
302
}
303

    
304
void OPPROTO op_imull_T0_T1(void)
305
{
306
    int64_t res;
307
    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308
    T0 = res;
309
    CC_DST = res;
310
    CC_SRC = (res != (int32_t)res);
311
}
312

    
313
#ifdef TARGET_X86_64
314
void OPPROTO op_mulq_EAX_T0(void)
315
{
316
    helper_mulq_EAX_T0();
317
}
318

    
319
void OPPROTO op_imulq_EAX_T0(void)
320
{
321
    helper_imulq_EAX_T0();
322
}
323

    
324
void OPPROTO op_imulq_T0_T1(void)
325
{
326
    helper_imulq_T0_T1();
327
}
328
#endif
329

    
330
/* division, flags are undefined */
331
/* XXX: add exceptions for overflow */
332

    
333
void OPPROTO op_divb_AL_T0(void)
334
{
335
    unsigned int num, den, q, r;
336

    
337
    num = (EAX & 0xffff);
338
    den = (T0 & 0xff);
339
    if (den == 0) {
340
        raise_exception(EXCP00_DIVZ);
341
    }
342
    q = (num / den) & 0xff;
343
    r = (num % den) & 0xff;
344
    EAX = (EAX & ~0xffff) | (r << 8) | q;
345
}
346

    
347
void OPPROTO op_idivb_AL_T0(void)
348
{
349
    int num, den, q, r;
350

    
351
    num = (int16_t)EAX;
352
    den = (int8_t)T0;
353
    if (den == 0) {
354
        raise_exception(EXCP00_DIVZ);
355
    }
356
    q = (num / den) & 0xff;
357
    r = (num % den) & 0xff;
358
    EAX = (EAX & ~0xffff) | (r << 8) | q;
359
}
360

    
361
void OPPROTO op_divw_AX_T0(void)
362
{
363
    unsigned int num, den, q, r;
364

    
365
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
366
    den = (T0 & 0xffff);
367
    if (den == 0) {
368
        raise_exception(EXCP00_DIVZ);
369
    }
370
    q = (num / den) & 0xffff;
371
    r = (num % den) & 0xffff;
372
    EAX = (EAX & ~0xffff) | q;
373
    EDX = (EDX & ~0xffff) | r;
374
}
375

    
376
void OPPROTO op_idivw_AX_T0(void)
377
{
378
    int num, den, q, r;
379

    
380
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
381
    den = (int16_t)T0;
382
    if (den == 0) {
383
        raise_exception(EXCP00_DIVZ);
384
    }
385
    q = (num / den) & 0xffff;
386
    r = (num % den) & 0xffff;
387
    EAX = (EAX & ~0xffff) | q;
388
    EDX = (EDX & ~0xffff) | r;
389
}
390

    
391
void OPPROTO op_divl_EAX_T0(void)
392
{
393
    helper_divl_EAX_T0();
394
}
395

    
396
void OPPROTO op_idivl_EAX_T0(void)
397
{
398
    helper_idivl_EAX_T0();
399
}
400

    
401
#ifdef TARGET_X86_64
402
void OPPROTO op_divq_EAX_T0(void)
403
{
404
    helper_divq_EAX_T0();
405
}
406

    
407
void OPPROTO op_idivq_EAX_T0(void)
408
{
409
    helper_idivq_EAX_T0();
410
}
411
#endif
412

    
413
/* constant load & misc op */
414

    
415
/* XXX: consistent names */
416
void OPPROTO op_movl_T0_imu(void)
417
{
418
    T0 = (uint32_t)PARAM1;
419
}
420

    
421
void OPPROTO op_movl_T0_im(void)
422
{
423
    T0 = (int32_t)PARAM1;
424
}
425

    
426
void OPPROTO op_addl_T0_im(void)
427
{
428
    T0 += PARAM1;
429
}
430

    
431
void OPPROTO op_andl_T0_ffff(void)
432
{
433
    T0 = T0 & 0xffff;
434
}
435

    
436
void OPPROTO op_andl_T0_im(void)
437
{
438
    T0 = T0 & PARAM1;
439
}
440

    
441
void OPPROTO op_movl_T0_T1(void)
442
{
443
    T0 = T1;
444
}
445

    
446
void OPPROTO op_movl_T1_imu(void)
447
{
448
    T1 = (uint32_t)PARAM1;
449
}
450

    
451
void OPPROTO op_movl_T1_im(void)
452
{
453
    T1 = (int32_t)PARAM1;
454
}
455

    
456
void OPPROTO op_addl_T1_im(void)
457
{
458
    T1 += PARAM1;
459
}
460

    
461
void OPPROTO op_movl_T1_A0(void)
462
{
463
    T1 = A0;
464
}
465

    
466
void OPPROTO op_movl_A0_im(void)
467
{
468
    A0 = (uint32_t)PARAM1;
469
}
470

    
471
void OPPROTO op_addl_A0_im(void)
472
{
473
    A0 = (uint32_t)(A0 + PARAM1);
474
}
475

    
476
void OPPROTO op_movl_A0_seg(void)
477
{
478
    A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
479
}
480

    
481
void OPPROTO op_addl_A0_seg(void)
482
{
483
    A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
484
}
485

    
486
void OPPROTO op_addl_A0_AL(void)
487
{
488
    A0 = (uint32_t)(A0 + (EAX & 0xff));
489
}
490

    
491
#ifdef WORDS_BIGENDIAN
492
typedef union UREG64 {
493
    struct { uint16_t v3, v2, v1, v0; } w;
494
    struct { uint32_t v1, v0; } l;
495
    uint64_t q;
496
} UREG64;
497
#else
498
typedef union UREG64 {
499
    struct { uint16_t v0, v1, v2, v3; } w;
500
    struct { uint32_t v0, v1; } l;
501
    uint64_t q;
502
} UREG64;
503
#endif
504

    
505
#ifdef TARGET_X86_64
506

    
507
#define PARAMQ1 \
508
({\
509
    UREG64 __p;\
510
    __p.l.v1 = PARAM1;\
511
    __p.l.v0 = PARAM2;\
512
    __p.q;\
513
}) 
514

    
515
void OPPROTO op_movq_T0_im64(void)
516
{
517
    T0 = PARAMQ1;
518
}
519

    
520
void OPPROTO op_movq_T1_im64(void)
521
{
522
    T1 = PARAMQ1;
523
}
524

    
525
void OPPROTO op_movq_A0_im(void)
526
{
527
    A0 = (int32_t)PARAM1;
528
}
529

    
530
void OPPROTO op_movq_A0_im64(void)
531
{
532
    A0 = PARAMQ1;
533
}
534

    
535
void OPPROTO op_addq_A0_im(void)
536
{
537
    A0 = (A0 + (int32_t)PARAM1);
538
}
539

    
540
void OPPROTO op_addq_A0_im64(void)
541
{
542
    A0 = (A0 + PARAMQ1);
543
}
544

    
545
void OPPROTO op_movq_A0_seg(void)
546
{
547
    A0 = *(target_ulong *)((char *)env + PARAM1);
548
}
549

    
550
void OPPROTO op_addq_A0_seg(void)
551
{
552
    A0 += *(target_ulong *)((char *)env + PARAM1);
553
}
554

    
555
void OPPROTO op_addq_A0_AL(void)
556
{
557
    A0 = (A0 + (EAX & 0xff));
558
}
559

    
560
#endif
561

    
562
void OPPROTO op_andl_A0_ffff(void)
563
{
564
    A0 = A0 & 0xffff;
565
}
566

    
567
/* memory access */
568

    
569
#define MEMSUFFIX _raw
570
#include "ops_mem.h"
571

    
572
#if !defined(CONFIG_USER_ONLY)
573
#define MEMSUFFIX _kernel
574
#include "ops_mem.h"
575

    
576
#define MEMSUFFIX _user
577
#include "ops_mem.h"
578
#endif
579

    
580
/* indirect jump */
581

    
582
void OPPROTO op_jmp_T0(void)
583
{
584
    EIP = T0;
585
}
586

    
587
void OPPROTO op_movl_eip_im(void)
588
{
589
    EIP = (uint32_t)PARAM1;
590
}
591

    
592
#ifdef TARGET_X86_64
593
void OPPROTO op_movq_eip_im(void)
594
{
595
    EIP = (int32_t)PARAM1;
596
}
597

    
598
void OPPROTO op_movq_eip_im64(void)
599
{
600
    EIP = PARAMQ1;
601
}
602
#endif
603

    
604
void OPPROTO op_hlt(void)
605
{
606
    env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
607
    env->exception_index = EXCP_HLT;
608
    cpu_loop_exit();
609
}
610

    
611
void OPPROTO op_debug(void)
612
{
613
    env->exception_index = EXCP_DEBUG;
614
    cpu_loop_exit();
615
}
616

    
617
void OPPROTO op_raise_interrupt(void)
618
{
619
    int intno, next_eip_addend;
620
    intno = PARAM1;
621
    next_eip_addend = PARAM2;
622
    raise_interrupt(intno, 1, 0, next_eip_addend);
623
}
624

    
625
void OPPROTO op_raise_exception(void)
626
{
627
    int exception_index;
628
    exception_index = PARAM1;
629
    raise_exception(exception_index);
630
}
631

    
632
void OPPROTO op_into(void)
633
{
634
    int eflags;
635
    eflags = cc_table[CC_OP].compute_all();
636
    if (eflags & CC_O) {
637
        raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
638
    }
639
    FORCE_RET();
640
}
641

    
642
void OPPROTO op_cli(void)
643
{
644
    env->eflags &= ~IF_MASK;
645
}
646

    
647
void OPPROTO op_sti(void)
648
{
649
    env->eflags |= IF_MASK;
650
}
651

    
652
void OPPROTO op_set_inhibit_irq(void)
653
{
654
    env->hflags |= HF_INHIBIT_IRQ_MASK;
655
}
656

    
657
void OPPROTO op_reset_inhibit_irq(void)
658
{
659
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
660
}
661

    
662
#if 0
663
/* vm86plus instructions */
664
void OPPROTO op_cli_vm(void)
665
{
666
    env->eflags &= ~VIF_MASK;
667
}
668

669
void OPPROTO op_sti_vm(void)
670
{
671
    env->eflags |= VIF_MASK;
672
    if (env->eflags & VIP_MASK) {
673
        EIP = PARAM1;
674
        raise_exception(EXCP0D_GPF);
675
    }
676
    FORCE_RET();
677
}
678
#endif
679

    
680
void OPPROTO op_boundw(void)
681
{
682
    int low, high, v;
683
    low = ldsw(A0);
684
    high = ldsw(A0 + 2);
685
    v = (int16_t)T0;
686
    if (v < low || v > high) {
687
        raise_exception(EXCP05_BOUND);
688
    }
689
    FORCE_RET();
690
}
691

    
692
void OPPROTO op_boundl(void)
693
{
694
    int low, high, v;
695
    low = ldl(A0);
696
    high = ldl(A0 + 4);
697
    v = T0;
698
    if (v < low || v > high) {
699
        raise_exception(EXCP05_BOUND);
700
    }
701
    FORCE_RET();
702
}
703

    
704
void OPPROTO op_cmpxchg8b(void)
705
{
706
    helper_cmpxchg8b();
707
}
708

    
709
void OPPROTO op_movl_T0_0(void)
710
{
711
    T0 = 0;
712
}
713

    
714
void OPPROTO op_exit_tb(void)
715
{
716
    EXIT_TB();
717
}
718

    
719
/* multiple size ops */
720

    
721
#define ldul ldl
722

    
723
#define SHIFT 0
724
#include "ops_template.h"
725
#undef SHIFT
726

    
727
#define SHIFT 1
728
#include "ops_template.h"
729
#undef SHIFT
730

    
731
#define SHIFT 2
732
#include "ops_template.h"
733
#undef SHIFT
734

    
735
#ifdef TARGET_X86_64
736

    
737
#define SHIFT 3
738
#include "ops_template.h"
739
#undef SHIFT
740

    
741
#endif
742

    
743
/* sign extend */
744

    
745
void OPPROTO op_movsbl_T0_T0(void)
746
{
747
    T0 = (int8_t)T0;
748
}
749

    
750
void OPPROTO op_movzbl_T0_T0(void)
751
{
752
    T0 = (uint8_t)T0;
753
}
754

    
755
void OPPROTO op_movswl_T0_T0(void)
756
{
757
    T0 = (int16_t)T0;
758
}
759

    
760
void OPPROTO op_movzwl_T0_T0(void)
761
{
762
    T0 = (uint16_t)T0;
763
}
764

    
765
void OPPROTO op_movswl_EAX_AX(void)
766
{
767
    EAX = (int16_t)EAX;
768
}
769

    
770
#ifdef TARGET_X86_64
771
void OPPROTO op_movslq_T0_T0(void)
772
{
773
    T0 = (int32_t)T0;
774
}
775

    
776
void OPPROTO op_movslq_RAX_EAX(void)
777
{
778
    EAX = (int32_t)EAX;
779
}
780
#endif
781

    
782
void OPPROTO op_movsbw_AX_AL(void)
783
{
784
    EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
785
}
786

    
787
void OPPROTO op_movslq_EDX_EAX(void)
788
{
789
    EDX = (int32_t)EAX >> 31;
790
}
791

    
792
void OPPROTO op_movswl_DX_AX(void)
793
{
794
    EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
795
}
796

    
797
#ifdef TARGET_X86_64
798
void OPPROTO op_movsqo_RDX_RAX(void)
799
{
800
    EDX = (int64_t)EAX >> 63;
801
}
802
#endif
803

    
804
/* string ops helpers */
805

    
806
void OPPROTO op_addl_ESI_T0(void)
807
{
808
    ESI = (uint32_t)(ESI + T0);
809
}
810

    
811
void OPPROTO op_addw_ESI_T0(void)
812
{
813
    ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
814
}
815

    
816
void OPPROTO op_addl_EDI_T0(void)
817
{
818
    EDI = (uint32_t)(EDI + T0);
819
}
820

    
821
void OPPROTO op_addw_EDI_T0(void)
822
{
823
    EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
824
}
825

    
826
void OPPROTO op_decl_ECX(void)
827
{
828
    ECX = (uint32_t)(ECX - 1);
829
}
830

    
831
void OPPROTO op_decw_ECX(void)
832
{
833
    ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
834
}
835

    
836
#ifdef TARGET_X86_64
837
void OPPROTO op_addq_ESI_T0(void)
838
{
839
    ESI = (ESI + T0);
840
}
841

    
842
void OPPROTO op_addq_EDI_T0(void)
843
{
844
    EDI = (EDI + T0);
845
}
846

    
847
void OPPROTO op_decq_ECX(void)
848
{
849
    ECX--;
850
}
851
#endif
852

    
853
/* push/pop utils */
854

    
855
void op_addl_A0_SS(void)
856
{
857
    A0 += (long)env->segs[R_SS].base;
858
}
859

    
860
void op_subl_A0_2(void)
861
{
862
    A0 = (uint32_t)(A0 - 2);
863
}
864

    
865
void op_subl_A0_4(void)
866
{
867
    A0 = (uint32_t)(A0 - 4);
868
}
869

    
870
void op_addl_ESP_4(void)
871
{
872
    ESP = (uint32_t)(ESP + 4);
873
}
874

    
875
void op_addl_ESP_2(void)
876
{
877
    ESP = (uint32_t)(ESP + 2);
878
}
879

    
880
void op_addw_ESP_4(void)
881
{
882
    ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
883
}
884

    
885
void op_addw_ESP_2(void)
886
{
887
    ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
888
}
889

    
890
void op_addl_ESP_im(void)
891
{
892
    ESP = (uint32_t)(ESP + PARAM1);
893
}
894

    
895
void op_addw_ESP_im(void)
896
{
897
    ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
898
}
899

    
900
#ifdef TARGET_X86_64
901
void op_subq_A0_8(void)
902
{
903
    A0 -= 8;
904
}
905

    
906
void op_addq_ESP_8(void)
907
{
908
    ESP += 8;
909
}
910

    
911
void op_addq_ESP_im(void)
912
{
913
    ESP += PARAM1;
914
}
915
#endif
916

    
917
void OPPROTO op_rdtsc(void)
918
{
919
    helper_rdtsc();
920
}
921

    
922
void OPPROTO op_cpuid(void)
923
{
924
    helper_cpuid();
925
}
926

    
927
void OPPROTO op_enter_level(void)
928
{
929
    helper_enter_level(PARAM1, PARAM2);
930
}
931

    
932
void OPPROTO op_sysenter(void)
933
{
934
    helper_sysenter();
935
}
936

    
937
void OPPROTO op_sysexit(void)
938
{
939
    helper_sysexit();
940
}
941

    
942
#ifdef TARGET_X86_64
943
void OPPROTO op_syscall(void)
944
{
945
    helper_syscall(PARAM1);
946
}
947

    
948
void OPPROTO op_sysret(void)
949
{
950
    helper_sysret(PARAM1);
951
}
952
#endif
953

    
954
void OPPROTO op_rdmsr(void)
955
{
956
    helper_rdmsr();
957
}
958

    
959
void OPPROTO op_wrmsr(void)
960
{
961
    helper_wrmsr();
962
}
963

    
964
/* bcd */
965

    
966
/* XXX: exception */
967
void OPPROTO op_aam(void)
968
{
969
    int base = PARAM1;
970
    int al, ah;
971
    al = EAX & 0xff;
972
    ah = al / base;
973
    al = al % base;
974
    EAX = (EAX & ~0xffff) | al | (ah << 8);
975
    CC_DST = al;
976
}
977

    
978
void OPPROTO op_aad(void)
979
{
980
    int base = PARAM1;
981
    int al, ah;
982
    al = EAX & 0xff;
983
    ah = (EAX >> 8) & 0xff;
984
    al = ((ah * base) + al) & 0xff;
985
    EAX = (EAX & ~0xffff) | al;
986
    CC_DST = al;
987
}
988

    
989
void OPPROTO op_aaa(void)
990
{
991
    int icarry;
992
    int al, ah, af;
993
    int eflags;
994

    
995
    eflags = cc_table[CC_OP].compute_all();
996
    af = eflags & CC_A;
997
    al = EAX & 0xff;
998
    ah = (EAX >> 8) & 0xff;
999

    
1000
    icarry = (al > 0xf9);
1001
    if (((al & 0x0f) > 9 ) || af) {
1002
        al = (al + 6) & 0x0f;
1003
        ah = (ah + 1 + icarry) & 0xff;
1004
        eflags |= CC_C | CC_A;
1005
    } else {
1006
        eflags &= ~(CC_C | CC_A);
1007
        al &= 0x0f;
1008
    }
1009
    EAX = (EAX & ~0xffff) | al | (ah << 8);
1010
    CC_SRC = eflags;
1011
}
1012

    
1013
void OPPROTO op_aas(void)
1014
{
1015
    int icarry;
1016
    int al, ah, af;
1017
    int eflags;
1018

    
1019
    eflags = cc_table[CC_OP].compute_all();
1020
    af = eflags & CC_A;
1021
    al = EAX & 0xff;
1022
    ah = (EAX >> 8) & 0xff;
1023

    
1024
    icarry = (al < 6);
1025
    if (((al & 0x0f) > 9 ) || af) {
1026
        al = (al - 6) & 0x0f;
1027
        ah = (ah - 1 - icarry) & 0xff;
1028
        eflags |= CC_C | CC_A;
1029
    } else {
1030
        eflags &= ~(CC_C | CC_A);
1031
        al &= 0x0f;
1032
    }
1033
    EAX = (EAX & ~0xffff) | al | (ah << 8);
1034
    CC_SRC = eflags;
1035
}
1036

    
1037
void OPPROTO op_daa(void)
1038
{
1039
    int al, af, cf;
1040
    int eflags;
1041

    
1042
    eflags = cc_table[CC_OP].compute_all();
1043
    cf = eflags & CC_C;
1044
    af = eflags & CC_A;
1045
    al = EAX & 0xff;
1046

    
1047
    eflags = 0;
1048
    if (((al & 0x0f) > 9 ) || af) {
1049
        al = (al + 6) & 0xff;
1050
        eflags |= CC_A;
1051
    }
1052
    if ((al > 0x9f) || cf) {
1053
        al = (al + 0x60) & 0xff;
1054
        eflags |= CC_C;
1055
    }
1056
    EAX = (EAX & ~0xff) | al;
1057
    /* well, speed is not an issue here, so we compute the flags by hand */
1058
    eflags |= (al == 0) << 6; /* zf */
1059
    eflags |= parity_table[al]; /* pf */
1060
    eflags |= (al & 0x80); /* sf */
1061
    CC_SRC = eflags;
1062
}
1063

    
1064
void OPPROTO op_das(void)
1065
{
1066
    int al, al1, af, cf;
1067
    int eflags;
1068

    
1069
    eflags = cc_table[CC_OP].compute_all();
1070
    cf = eflags & CC_C;
1071
    af = eflags & CC_A;
1072
    al = EAX & 0xff;
1073

    
1074
    eflags = 0;
1075
    al1 = al;
1076
    if (((al & 0x0f) > 9 ) || af) {
1077
        eflags |= CC_A;
1078
        if (al < 6 || cf)
1079
            eflags |= CC_C;
1080
        al = (al - 6) & 0xff;
1081
    }
1082
    if ((al1 > 0x99) || cf) {
1083
        al = (al - 0x60) & 0xff;
1084
        eflags |= CC_C;
1085
    }
1086
    EAX = (EAX & ~0xff) | al;
1087
    /* well, speed is not an issue here, so we compute the flags by hand */
1088
    eflags |= (al == 0) << 6; /* zf */
1089
    eflags |= parity_table[al]; /* pf */
1090
    eflags |= (al & 0x80); /* sf */
1091
    CC_SRC = eflags;
1092
}
1093

    
1094
/* segment handling */
1095

    
1096
/* never use it with R_CS */
1097
void OPPROTO op_movl_seg_T0(void)
1098
{
1099
    load_seg(PARAM1, T0);
1100
}
1101

    
1102
/* faster VM86 version */
1103
void OPPROTO op_movl_seg_T0_vm(void)
1104
{
1105
    int selector;
1106
    SegmentCache *sc;
1107
    
1108
    selector = T0 & 0xffff;
1109
    /* env->segs[] access */
1110
    sc = (SegmentCache *)((char *)env + PARAM1);
1111
    sc->selector = selector;
1112
    sc->base = (selector << 4);
1113
}
1114

    
1115
void OPPROTO op_movl_T0_seg(void)
1116
{
1117
    T0 = env->segs[PARAM1].selector;
1118
}
1119

    
1120
void OPPROTO op_lsl(void)
1121
{
1122
    helper_lsl();
1123
}
1124

    
1125
void OPPROTO op_lar(void)
1126
{
1127
    helper_lar();
1128
}
1129

    
1130
void OPPROTO op_verr(void)
1131
{
1132
    helper_verr();
1133
}
1134

    
1135
void OPPROTO op_verw(void)
1136
{
1137
    helper_verw();
1138
}
1139

    
1140
void OPPROTO op_arpl(void)
1141
{
1142
    if ((T0 & 3) < (T1 & 3)) {
1143
        /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1144
        T0 = (T0 & ~3) | (T1 & 3);
1145
        T1 = CC_Z;
1146
   } else {
1147
        T1 = 0;
1148
    }
1149
    FORCE_RET();
1150
}
1151
            
1152
void OPPROTO op_arpl_update(void)
1153
{
1154
    int eflags;
1155
    eflags = cc_table[CC_OP].compute_all();
1156
    CC_SRC = (eflags & ~CC_Z) | T1;
1157
}
1158
    
1159
/* T0: segment, T1:eip */
1160
void OPPROTO op_ljmp_protected_T0_T1(void)
1161
{
1162
    helper_ljmp_protected_T0_T1(PARAM1);
1163
}
1164

    
1165
void OPPROTO op_lcall_real_T0_T1(void)
1166
{
1167
    helper_lcall_real_T0_T1(PARAM1, PARAM2);
1168
}
1169

    
1170
void OPPROTO op_lcall_protected_T0_T1(void)
1171
{
1172
    helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1173
}
1174

    
1175
void OPPROTO op_iret_real(void)
1176
{
1177
    helper_iret_real(PARAM1);
1178
}
1179

    
1180
void OPPROTO op_iret_protected(void)
1181
{
1182
    helper_iret_protected(PARAM1, PARAM2);
1183
}
1184

    
1185
void OPPROTO op_lret_protected(void)
1186
{
1187
    helper_lret_protected(PARAM1, PARAM2);
1188
}
1189

    
1190
void OPPROTO op_lldt_T0(void)
1191
{
1192
    helper_lldt_T0();
1193
}
1194

    
1195
void OPPROTO op_ltr_T0(void)
1196
{
1197
    helper_ltr_T0();
1198
}
1199

    
1200
/* CR registers access */
1201
void OPPROTO op_movl_crN_T0(void)
1202
{
1203
    helper_movl_crN_T0(PARAM1);
1204
}
1205

    
1206
#if !defined(CONFIG_USER_ONLY) 
1207
void OPPROTO op_movtl_T0_cr8(void)
1208
{
1209
    T0 = cpu_get_apic_tpr(env);
1210
}
1211
#endif
1212

    
1213
/* DR registers access */
1214
void OPPROTO op_movl_drN_T0(void)
1215
{
1216
    helper_movl_drN_T0(PARAM1);
1217
}
1218

    
1219
void OPPROTO op_lmsw_T0(void)
1220
{
1221
    /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1222
       if already set to one. */
1223
    T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1224
    helper_movl_crN_T0(0);
1225
}
1226

    
1227
void OPPROTO op_invlpg_A0(void)
1228
{
1229
    helper_invlpg(A0);
1230
}
1231

    
1232
void OPPROTO op_movl_T0_env(void)
1233
{
1234
    T0 = *(uint32_t *)((char *)env + PARAM1);
1235
}
1236

    
1237
void OPPROTO op_movl_env_T0(void)
1238
{
1239
    *(uint32_t *)((char *)env + PARAM1) = T0;
1240
}
1241

    
1242
void OPPROTO op_movl_env_T1(void)
1243
{
1244
    *(uint32_t *)((char *)env + PARAM1) = T1;
1245
}
1246

    
1247
void OPPROTO op_movtl_T0_env(void)
1248
{
1249
    T0 = *(target_ulong *)((char *)env + PARAM1);
1250
}
1251

    
1252
void OPPROTO op_movtl_env_T0(void)
1253
{
1254
    *(target_ulong *)((char *)env + PARAM1) = T0;
1255
}
1256

    
1257
void OPPROTO op_movtl_T1_env(void)
1258
{
1259
    T1 = *(target_ulong *)((char *)env + PARAM1);
1260
}
1261

    
1262
void OPPROTO op_movtl_env_T1(void)
1263
{
1264
    *(target_ulong *)((char *)env + PARAM1) = T1;
1265
}
1266

    
1267
void OPPROTO op_clts(void)
1268
{
1269
    env->cr[0] &= ~CR0_TS_MASK;
1270
    env->hflags &= ~HF_TS_MASK;
1271
}
1272

    
1273
/* flags handling */
1274

    
1275
void OPPROTO op_goto_tb0(void)
1276
{
1277
    GOTO_TB(op_goto_tb0, PARAM1, 0);
1278
}
1279

    
1280
void OPPROTO op_goto_tb1(void)
1281
{
1282
    GOTO_TB(op_goto_tb1, PARAM1, 1);
1283
}
1284

    
1285
void OPPROTO op_jmp_label(void)
1286
{
1287
    GOTO_LABEL_PARAM(1);
1288
}
1289

    
1290
void OPPROTO op_jnz_T0_label(void)
1291
{
1292
    if (T0)
1293
        GOTO_LABEL_PARAM(1);
1294
    FORCE_RET();
1295
}
1296

    
1297
void OPPROTO op_jz_T0_label(void)
1298
{
1299
    if (!T0)
1300
        GOTO_LABEL_PARAM(1);
1301
    FORCE_RET();
1302
}
1303

    
1304
/* slow set cases (compute x86 flags) */
1305
void OPPROTO op_seto_T0_cc(void)
1306
{
1307
    int eflags;
1308
    eflags = cc_table[CC_OP].compute_all();
1309
    T0 = (eflags >> 11) & 1;
1310
}
1311

    
1312
void OPPROTO op_setb_T0_cc(void)
1313
{
1314
    T0 = cc_table[CC_OP].compute_c();
1315
}
1316

    
1317
void OPPROTO op_setz_T0_cc(void)
1318
{
1319
    int eflags;
1320
    eflags = cc_table[CC_OP].compute_all();
1321
    T0 = (eflags >> 6) & 1;
1322
}
1323

    
1324
void OPPROTO op_setbe_T0_cc(void)
1325
{
1326
    int eflags;
1327
    eflags = cc_table[CC_OP].compute_all();
1328
    T0 = (eflags & (CC_Z | CC_C)) != 0;
1329
}
1330

    
1331
void OPPROTO op_sets_T0_cc(void)
1332
{
1333
    int eflags;
1334
    eflags = cc_table[CC_OP].compute_all();
1335
    T0 = (eflags >> 7) & 1;
1336
}
1337

    
1338
void OPPROTO op_setp_T0_cc(void)
1339
{
1340
    int eflags;
1341
    eflags = cc_table[CC_OP].compute_all();
1342
    T0 = (eflags >> 2) & 1;
1343
}
1344

    
1345
void OPPROTO op_setl_T0_cc(void)
1346
{
1347
    int eflags;
1348
    eflags = cc_table[CC_OP].compute_all();
1349
    T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1350
}
1351

    
1352
void OPPROTO op_setle_T0_cc(void)
1353
{
1354
    int eflags;
1355
    eflags = cc_table[CC_OP].compute_all();
1356
    T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1357
}
1358

    
1359
void OPPROTO op_xor_T0_1(void)
1360
{
1361
    T0 ^= 1;
1362
}
1363

    
1364
void OPPROTO op_set_cc_op(void)
1365
{
1366
    CC_OP = PARAM1;
1367
}
1368

    
1369
void OPPROTO op_mov_T0_cc(void)
1370
{
1371
    T0 = cc_table[CC_OP].compute_all();
1372
}
1373

    
1374
/* XXX: clear VIF/VIP in all ops ? */
1375

    
1376
void OPPROTO op_movl_eflags_T0(void)
1377
{
1378
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1379
}
1380

    
1381
void OPPROTO op_movw_eflags_T0(void)
1382
{
1383
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1384
}
1385

    
1386
void OPPROTO op_movl_eflags_T0_io(void)
1387
{
1388
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1389
}
1390

    
1391
void OPPROTO op_movw_eflags_T0_io(void)
1392
{
1393
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1394
}
1395

    
1396
void OPPROTO op_movl_eflags_T0_cpl0(void)
1397
{
1398
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1399
}
1400

    
1401
void OPPROTO op_movw_eflags_T0_cpl0(void)
1402
{
1403
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1404
}
1405

    
1406
#if 0
1407
/* vm86plus version */
1408
void OPPROTO op_movw_eflags_T0_vm(void)
1409
{
1410
    int eflags;
1411
    eflags = T0;
1412
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1413
    DF = 1 - (2 * ((eflags >> 10) & 1));
1414
    /* we also update some system flags as in user mode */
1415
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1416
        (eflags & FL_UPDATE_MASK16);
1417
    if (eflags & IF_MASK) {
1418
        env->eflags |= VIF_MASK;
1419
        if (env->eflags & VIP_MASK) {
1420
            EIP = PARAM1;
1421
            raise_exception(EXCP0D_GPF);
1422
        }
1423
    }
1424
    FORCE_RET();
1425
}
1426

1427
void OPPROTO op_movl_eflags_T0_vm(void)
1428
{
1429
    int eflags;
1430
    eflags = T0;
1431
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1432
    DF = 1 - (2 * ((eflags >> 10) & 1));
1433
    /* we also update some system flags as in user mode */
1434
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1435
        (eflags & FL_UPDATE_MASK32);
1436
    if (eflags & IF_MASK) {
1437
        env->eflags |= VIF_MASK;
1438
        if (env->eflags & VIP_MASK) {
1439
            EIP = PARAM1;
1440
            raise_exception(EXCP0D_GPF);
1441
        }
1442
    }
1443
    FORCE_RET();
1444
}
1445
#endif
1446

    
1447
/* XXX: compute only O flag */
1448
void OPPROTO op_movb_eflags_T0(void)
1449
{
1450
    int of;
1451
    of = cc_table[CC_OP].compute_all() & CC_O;
1452
    CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1453
}
1454

    
1455
void OPPROTO op_movl_T0_eflags(void)
1456
{
1457
    int eflags;
1458
    eflags = cc_table[CC_OP].compute_all();
1459
    eflags |= (DF & DF_MASK);
1460
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1461
    T0 = eflags;
1462
}
1463

    
1464
/* vm86plus version */
1465
#if 0
1466
void OPPROTO op_movl_T0_eflags_vm(void)
1467
{
1468
    int eflags;
1469
    eflags = cc_table[CC_OP].compute_all();
1470
    eflags |= (DF & DF_MASK);
1471
    eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1472
    if (env->eflags & VIF_MASK)
1473
        eflags |= IF_MASK;
1474
    T0 = eflags;
1475
}
1476
#endif
1477

    
1478
void OPPROTO op_cld(void)
1479
{
1480
    DF = 1;
1481
}
1482

    
1483
void OPPROTO op_std(void)
1484
{
1485
    DF = -1;
1486
}
1487

    
1488
void OPPROTO op_clc(void)
1489
{
1490
    int eflags;
1491
    eflags = cc_table[CC_OP].compute_all();
1492
    eflags &= ~CC_C;
1493
    CC_SRC = eflags;
1494
}
1495

    
1496
void OPPROTO op_stc(void)
1497
{
1498
    int eflags;
1499
    eflags = cc_table[CC_OP].compute_all();
1500
    eflags |= CC_C;
1501
    CC_SRC = eflags;
1502
}
1503

    
1504
void OPPROTO op_cmc(void)
1505
{
1506
    int eflags;
1507
    eflags = cc_table[CC_OP].compute_all();
1508
    eflags ^= CC_C;
1509
    CC_SRC = eflags;
1510
}
1511

    
1512
void OPPROTO op_salc(void)
1513
{
1514
    int cf;
1515
    cf = cc_table[CC_OP].compute_c();
1516
    EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1517
}
1518

    
1519
static int compute_all_eflags(void)
1520
{
1521
    return CC_SRC;
1522
}
1523

    
1524
static int compute_c_eflags(void)
1525
{
1526
    return CC_SRC & CC_C;
1527
}
1528

    
1529
CCTable cc_table[CC_OP_NB] = {
1530
    [CC_OP_DYNAMIC] = { /* should never happen */ },
1531

    
1532
    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1533

    
1534
    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1535
    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1536
    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1537

    
1538
    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1539
    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1540
    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1541

    
1542
    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1543
    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1544
    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1545

    
1546
    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1547
    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1548
    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1549
    
1550
    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1551
    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1552
    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1553
    
1554
    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1555
    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1556
    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1557
    
1558
    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1559
    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1560
    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1561
    
1562
    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1563
    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1564
    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1565
    
1566
    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1567
    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1568
    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1569

    
1570
    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1571
    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1572
    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1573

    
1574
#ifdef TARGET_X86_64
1575
    [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1576

    
1577
    [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq  },
1578

    
1579
    [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq  },
1580

    
1581
    [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq  },
1582
    
1583
    [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq  },
1584
    
1585
    [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1586
    
1587
    [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1588

    
1589
    [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1590

    
1591
    [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1592

    
1593
    [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1594
#endif
1595
};
1596

    
1597
/* floating point support. Some of the code for complicated x87
1598
   functions comes from the LGPL'ed x86 emulator found in the Willows
1599
   TWIN windows emulator. */
1600

    
1601
/* fp load FT0 */
1602

    
1603
void OPPROTO op_flds_FT0_A0(void)
1604
{
1605
#ifdef USE_FP_CONVERT
1606
    FP_CONVERT.i32 = ldl(A0);
1607
    FT0 = FP_CONVERT.f;
1608
#else
1609
    FT0 = ldfl(A0);
1610
#endif
1611
}
1612

    
1613
void OPPROTO op_fldl_FT0_A0(void)
1614
{
1615
#ifdef USE_FP_CONVERT
1616
    FP_CONVERT.i64 = ldq(A0);
1617
    FT0 = FP_CONVERT.d;
1618
#else
1619
    FT0 = ldfq(A0);
1620
#endif
1621
}
1622

    
1623
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1624
#ifdef USE_INT_TO_FLOAT_HELPERS
1625

    
1626
void helper_fild_FT0_A0(void)
1627
{
1628
    FT0 = (CPU86_LDouble)ldsw(A0);
1629
}
1630

    
1631
void helper_fildl_FT0_A0(void)
1632
{
1633
    FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1634
}
1635

    
1636
void helper_fildll_FT0_A0(void)
1637
{
1638
    FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1639
}
1640

    
1641
void OPPROTO op_fild_FT0_A0(void)
1642
{
1643
    helper_fild_FT0_A0();
1644
}
1645

    
1646
void OPPROTO op_fildl_FT0_A0(void)
1647
{
1648
    helper_fildl_FT0_A0();
1649
}
1650

    
1651
void OPPROTO op_fildll_FT0_A0(void)
1652
{
1653
    helper_fildll_FT0_A0();
1654
}
1655

    
1656
#else
1657

    
1658
void OPPROTO op_fild_FT0_A0(void)
1659
{
1660
#ifdef USE_FP_CONVERT
1661
    FP_CONVERT.i32 = ldsw(A0);
1662
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1663
#else
1664
    FT0 = (CPU86_LDouble)ldsw(A0);
1665
#endif
1666
}
1667

    
1668
void OPPROTO op_fildl_FT0_A0(void)
1669
{
1670
#ifdef USE_FP_CONVERT
1671
    FP_CONVERT.i32 = (int32_t) ldl(A0);
1672
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1673
#else
1674
    FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1675
#endif
1676
}
1677

    
1678
void OPPROTO op_fildll_FT0_A0(void)
1679
{
1680
#ifdef USE_FP_CONVERT
1681
    FP_CONVERT.i64 = (int64_t) ldq(A0);
1682
    FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1683
#else
1684
    FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1685
#endif
1686
}
1687
#endif
1688

    
1689
/* fp load ST0 */
1690

    
1691
void OPPROTO op_flds_ST0_A0(void)
1692
{
1693
    int new_fpstt;
1694
    new_fpstt = (env->fpstt - 1) & 7;
1695
#ifdef USE_FP_CONVERT
1696
    FP_CONVERT.i32 = ldl(A0);
1697
    env->fpregs[new_fpstt].d = FP_CONVERT.f;
1698
#else
1699
    env->fpregs[new_fpstt].d = ldfl(A0);
1700
#endif
1701
    env->fpstt = new_fpstt;
1702
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1703
}
1704

    
1705
void OPPROTO op_fldl_ST0_A0(void)
1706
{
1707
    int new_fpstt;
1708
    new_fpstt = (env->fpstt - 1) & 7;
1709
#ifdef USE_FP_CONVERT
1710
    FP_CONVERT.i64 = ldq(A0);
1711
    env->fpregs[new_fpstt].d = FP_CONVERT.d;
1712
#else
1713
    env->fpregs[new_fpstt].d = ldfq(A0);
1714
#endif
1715
    env->fpstt = new_fpstt;
1716
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1717
}
1718

    
1719
void OPPROTO op_fldt_ST0_A0(void)
1720
{
1721
    helper_fldt_ST0_A0();
1722
}
1723

    
1724
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1725
#ifdef USE_INT_TO_FLOAT_HELPERS
1726

    
1727
void helper_fild_ST0_A0(void)
1728
{
1729
    int new_fpstt;
1730
    new_fpstt = (env->fpstt - 1) & 7;
1731
    env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1732
    env->fpstt = new_fpstt;
1733
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1734
}
1735

    
1736
void helper_fildl_ST0_A0(void)
1737
{
1738
    int new_fpstt;
1739
    new_fpstt = (env->fpstt - 1) & 7;
1740
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1741
    env->fpstt = new_fpstt;
1742
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1743
}
1744

    
1745
void helper_fildll_ST0_A0(void)
1746
{
1747
    int new_fpstt;
1748
    new_fpstt = (env->fpstt - 1) & 7;
1749
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1750
    env->fpstt = new_fpstt;
1751
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1752
}
1753

    
1754
void OPPROTO op_fild_ST0_A0(void)
1755
{
1756
    helper_fild_ST0_A0();
1757
}
1758

    
1759
void OPPROTO op_fildl_ST0_A0(void)
1760
{
1761
    helper_fildl_ST0_A0();
1762
}
1763

    
1764
void OPPROTO op_fildll_ST0_A0(void)
1765
{
1766
    helper_fildll_ST0_A0();
1767
}
1768

    
1769
#else
1770

    
1771
void OPPROTO op_fild_ST0_A0(void)
1772
{
1773
    int new_fpstt;
1774
    new_fpstt = (env->fpstt - 1) & 7;
1775
#ifdef USE_FP_CONVERT
1776
    FP_CONVERT.i32 = ldsw(A0);
1777
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1778
#else
1779
    env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1780
#endif
1781
    env->fpstt = new_fpstt;
1782
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1783
}
1784

    
1785
void OPPROTO op_fildl_ST0_A0(void)
1786
{
1787
    int new_fpstt;
1788
    new_fpstt = (env->fpstt - 1) & 7;
1789
#ifdef USE_FP_CONVERT
1790
    FP_CONVERT.i32 = (int32_t) ldl(A0);
1791
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1792
#else
1793
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1794
#endif
1795
    env->fpstt = new_fpstt;
1796
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1797
}
1798

    
1799
void OPPROTO op_fildll_ST0_A0(void)
1800
{
1801
    int new_fpstt;
1802
    new_fpstt = (env->fpstt - 1) & 7;
1803
#ifdef USE_FP_CONVERT
1804
    FP_CONVERT.i64 = (int64_t) ldq(A0);
1805
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1806
#else
1807
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1808
#endif
1809
    env->fpstt = new_fpstt;
1810
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1811
}
1812

    
1813
#endif
1814

    
1815
/* fp store */
1816

    
1817
void OPPROTO op_fsts_ST0_A0(void)
1818
{
1819
#ifdef USE_FP_CONVERT
1820
    FP_CONVERT.f = (float)ST0;
1821
    stfl(A0, FP_CONVERT.f);
1822
#else
1823
    stfl(A0, (float)ST0);
1824
#endif
1825
    FORCE_RET();
1826
}
1827

    
1828
void OPPROTO op_fstl_ST0_A0(void)
1829
{
1830
    stfq(A0, (double)ST0);
1831
    FORCE_RET();
1832
}
1833

    
1834
void OPPROTO op_fstt_ST0_A0(void)
1835
{
1836
    helper_fstt_ST0_A0();
1837
}
1838

    
1839
void OPPROTO op_fist_ST0_A0(void)
1840
{
1841
#if defined(__sparc__) && !defined(__sparc_v9__)
1842
    register CPU86_LDouble d asm("o0");
1843
#else
1844
    CPU86_LDouble d;
1845
#endif
1846
    int val;
1847

    
1848
    d = ST0;
1849
    val = floatx_to_int32(d, &env->fp_status);
1850
    if (val != (int16_t)val)
1851
        val = -32768;
1852
    stw(A0, val);
1853
    FORCE_RET();
1854
}
1855

    
1856
void OPPROTO op_fistl_ST0_A0(void)
1857
{
1858
#if defined(__sparc__) && !defined(__sparc_v9__)
1859
    register CPU86_LDouble d asm("o0");
1860
#else
1861
    CPU86_LDouble d;
1862
#endif
1863
    int val;
1864

    
1865
    d = ST0;
1866
    val = floatx_to_int32(d, &env->fp_status);
1867
    stl(A0, val);
1868
    FORCE_RET();
1869
}
1870

    
1871
void OPPROTO op_fistll_ST0_A0(void)
1872
{
1873
#if defined(__sparc__) && !defined(__sparc_v9__)
1874
    register CPU86_LDouble d asm("o0");
1875
#else
1876
    CPU86_LDouble d;
1877
#endif
1878
    int64_t val;
1879

    
1880
    d = ST0;
1881
    val = floatx_to_int64(d, &env->fp_status);
1882
    stq(A0, val);
1883
    FORCE_RET();
1884
}
1885

    
1886
void OPPROTO op_fbld_ST0_A0(void)
1887
{
1888
    helper_fbld_ST0_A0();
1889
}
1890

    
1891
void OPPROTO op_fbst_ST0_A0(void)
1892
{
1893
    helper_fbst_ST0_A0();
1894
}
1895

    
1896
/* FPU move */
1897

    
1898
void OPPROTO op_fpush(void)
1899
{
1900
    fpush();
1901
}
1902

    
1903
void OPPROTO op_fpop(void)
1904
{
1905
    fpop();
1906
}
1907

    
1908
void OPPROTO op_fdecstp(void)
1909
{
1910
    env->fpstt = (env->fpstt - 1) & 7;
1911
    env->fpus &= (~0x4700);
1912
}
1913

    
1914
void OPPROTO op_fincstp(void)
1915
{
1916
    env->fpstt = (env->fpstt + 1) & 7;
1917
    env->fpus &= (~0x4700);
1918
}
1919

    
1920
void OPPROTO op_ffree_STN(void)
1921
{
1922
    env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1923
}
1924

    
1925
void OPPROTO op_fmov_ST0_FT0(void)
1926
{
1927
    ST0 = FT0;
1928
}
1929

    
1930
void OPPROTO op_fmov_FT0_STN(void)
1931
{
1932
    FT0 = ST(PARAM1);
1933
}
1934

    
1935
void OPPROTO op_fmov_ST0_STN(void)
1936
{
1937
    ST0 = ST(PARAM1);
1938
}
1939

    
1940
void OPPROTO op_fmov_STN_ST0(void)
1941
{
1942
    ST(PARAM1) = ST0;
1943
}
1944

    
1945
void OPPROTO op_fxchg_ST0_STN(void)
1946
{
1947
    CPU86_LDouble tmp;
1948
    tmp = ST(PARAM1);
1949
    ST(PARAM1) = ST0;
1950
    ST0 = tmp;
1951
}
1952

    
1953
/* FPU operations */
1954

    
1955
void OPPROTO op_fcom_ST0_FT0(void)
1956
{
1957
    int cc;
1958
    switch(floatx_compare(ST0, FT0, &env->fp_status)) {
1959
    case -1:
1960
        cc = 0x0100;
1961
        break;
1962
    case 0:
1963
        cc = 0x4000;
1964
        break;
1965
    case 1:
1966
        cc = 0x0000;
1967
        break;
1968
    case 2:
1969
    default:
1970
        cc = 0x4500;
1971
        break;
1972
    }
1973
    env->fpus = (env->fpus & ~0x4500) | cc;
1974
    FORCE_RET();
1975
}
1976

    
1977
void OPPROTO op_fucom_ST0_FT0(void)
1978
{
1979
    int cc;
1980
    switch(floatx_compare_quiet(ST0, FT0, &env->fp_status)) {
1981
    case -1:
1982
        cc = 0x0100;
1983
        break;
1984
    case 0:
1985
        cc = 0x4000;
1986
        break;
1987
    case 1:
1988
        cc = 0x0000;
1989
        break;
1990
    case 2:
1991
    default:
1992
        cc = 0x4500;
1993
        break;
1994
    }
1995
    env->fpus = (env->fpus & ~0x4500) | cc;
1996
    FORCE_RET();
1997
}
1998

    
1999
void OPPROTO op_fcomi_ST0_FT0(void)
2000
{
2001
    int eflags, cc;
2002
    switch(floatx_compare(ST0, FT0, &env->fp_status)) {
2003
    case -1:
2004
        cc = CC_C;
2005
        break;
2006
    case 0:
2007
        cc = CC_Z;
2008
        break;
2009
    case 1:
2010
        cc = 0;
2011
        break;
2012
    case 2:
2013
    default:
2014
        cc = CC_Z | CC_P | CC_C;
2015
        break;
2016
    }
2017
    eflags = cc_table[CC_OP].compute_all();
2018
    eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | cc;
2019
    CC_SRC = eflags;
2020
    FORCE_RET();
2021
}
2022

    
2023
void OPPROTO op_fucomi_ST0_FT0(void)
2024
{
2025
    int eflags, cc;
2026
    switch(floatx_compare_quiet(ST0, FT0, &env->fp_status)) {
2027
    case -1:
2028
        cc = CC_C;
2029
        break;
2030
    case 0:
2031
        cc = CC_Z;
2032
        break;
2033
    case 1:
2034
        cc = 0;
2035
        break;
2036
    case 2:
2037
    default:
2038
        cc = CC_Z | CC_P | CC_C;
2039
        break;
2040
    }
2041
    eflags = cc_table[CC_OP].compute_all();
2042
    eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | cc;
2043
    CC_SRC = eflags;
2044
    FORCE_RET();
2045
}
2046

    
2047
void OPPROTO op_fcmov_ST0_STN_T0(void)
2048
{
2049
    if (T0) {
2050
        ST0 = ST(PARAM1);
2051
    }
2052
    FORCE_RET();
2053
}
2054

    
2055
void OPPROTO op_fadd_ST0_FT0(void)
2056
{
2057
    ST0 += FT0;
2058
}
2059

    
2060
void OPPROTO op_fmul_ST0_FT0(void)
2061
{
2062
    ST0 *= FT0;
2063
}
2064

    
2065
void OPPROTO op_fsub_ST0_FT0(void)
2066
{
2067
    ST0 -= FT0;
2068
}
2069

    
2070
void OPPROTO op_fsubr_ST0_FT0(void)
2071
{
2072
    ST0 = FT0 - ST0;
2073
}
2074

    
2075
void OPPROTO op_fdiv_ST0_FT0(void)
2076
{
2077
    ST0 = helper_fdiv(ST0, FT0);
2078
}
2079

    
2080
void OPPROTO op_fdivr_ST0_FT0(void)
2081
{
2082
    ST0 = helper_fdiv(FT0, ST0);
2083
}
2084

    
2085
/* fp operations between STN and ST0 */
2086

    
2087
void OPPROTO op_fadd_STN_ST0(void)
2088
{
2089
    ST(PARAM1) += ST0;
2090
}
2091

    
2092
void OPPROTO op_fmul_STN_ST0(void)
2093
{
2094
    ST(PARAM1) *= ST0;
2095
}
2096

    
2097
void OPPROTO op_fsub_STN_ST0(void)
2098
{
2099
    ST(PARAM1) -= ST0;
2100
}
2101

    
2102
void OPPROTO op_fsubr_STN_ST0(void)
2103
{
2104
    CPU86_LDouble *p;
2105
    p = &ST(PARAM1);
2106
    *p = ST0 - *p;
2107
}
2108

    
2109
void OPPROTO op_fdiv_STN_ST0(void)
2110
{
2111
    CPU86_LDouble *p;
2112
    p = &ST(PARAM1);
2113
    *p = helper_fdiv(*p, ST0);
2114
}
2115

    
2116
void OPPROTO op_fdivr_STN_ST0(void)
2117
{
2118
    CPU86_LDouble *p;
2119
    p = &ST(PARAM1);
2120
    *p = helper_fdiv(ST0, *p);
2121
}
2122

    
2123
/* misc FPU operations */
2124
void OPPROTO op_fchs_ST0(void)
2125
{
2126
    ST0 = floatx_chs(ST0);
2127
}
2128

    
2129
void OPPROTO op_fabs_ST0(void)
2130
{
2131
    ST0 = floatx_abs(ST0);
2132
}
2133

    
2134
void OPPROTO op_fxam_ST0(void)
2135
{
2136
    helper_fxam_ST0();
2137
}
2138

    
2139
void OPPROTO op_fld1_ST0(void)
2140
{
2141
    ST0 = f15rk[1];
2142
}
2143

    
2144
void OPPROTO op_fldl2t_ST0(void)
2145
{
2146
    ST0 = f15rk[6];
2147
}
2148

    
2149
void OPPROTO op_fldl2e_ST0(void)
2150
{
2151
    ST0 = f15rk[5];
2152
}
2153

    
2154
void OPPROTO op_fldpi_ST0(void)
2155
{
2156
    ST0 = f15rk[2];
2157
}
2158

    
2159
void OPPROTO op_fldlg2_ST0(void)
2160
{
2161
    ST0 = f15rk[3];
2162
}
2163

    
2164
void OPPROTO op_fldln2_ST0(void)
2165
{
2166
    ST0 = f15rk[4];
2167
}
2168

    
2169
void OPPROTO op_fldz_ST0(void)
2170
{
2171
    ST0 = f15rk[0];
2172
}
2173

    
2174
void OPPROTO op_fldz_FT0(void)
2175
{
2176
    FT0 = f15rk[0];
2177
}
2178

    
2179
/* associated heplers to reduce generated code length and to simplify
2180
   relocation (FP constants are usually stored in .rodata section) */
2181

    
2182
void OPPROTO op_f2xm1(void)
2183
{
2184
    helper_f2xm1();
2185
}
2186

    
2187
void OPPROTO op_fyl2x(void)
2188
{
2189
    helper_fyl2x();
2190
}
2191

    
2192
void OPPROTO op_fptan(void)
2193
{
2194
    helper_fptan();
2195
}
2196

    
2197
void OPPROTO op_fpatan(void)
2198
{
2199
    helper_fpatan();
2200
}
2201

    
2202
void OPPROTO op_fxtract(void)
2203
{
2204
    helper_fxtract();
2205
}
2206

    
2207
void OPPROTO op_fprem1(void)
2208
{
2209
    helper_fprem1();
2210
}
2211

    
2212

    
2213
void OPPROTO op_fprem(void)
2214
{
2215
    helper_fprem();
2216
}
2217

    
2218
void OPPROTO op_fyl2xp1(void)
2219
{
2220
    helper_fyl2xp1();
2221
}
2222

    
2223
void OPPROTO op_fsqrt(void)
2224
{
2225
    helper_fsqrt();
2226
}
2227

    
2228
void OPPROTO op_fsincos(void)
2229
{
2230
    helper_fsincos();
2231
}
2232

    
2233
void OPPROTO op_frndint(void)
2234
{
2235
    helper_frndint();
2236
}
2237

    
2238
void OPPROTO op_fscale(void)
2239
{
2240
    helper_fscale();
2241
}
2242

    
2243
void OPPROTO op_fsin(void)
2244
{
2245
    helper_fsin();
2246
}
2247

    
2248
void OPPROTO op_fcos(void)
2249
{
2250
    helper_fcos();
2251
}
2252

    
2253
void OPPROTO op_fnstsw_A0(void)
2254
{
2255
    int fpus;
2256
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2257
    stw(A0, fpus);
2258
    FORCE_RET();
2259
}
2260

    
2261
void OPPROTO op_fnstsw_EAX(void)
2262
{
2263
    int fpus;
2264
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2265
    EAX = (EAX & ~0xffff) | fpus;
2266
}
2267

    
2268
void OPPROTO op_fnstcw_A0(void)
2269
{
2270
    stw(A0, env->fpuc);
2271
    FORCE_RET();
2272
}
2273

    
2274
void OPPROTO op_fldcw_A0(void)
2275
{
2276
    env->fpuc = lduw(A0);
2277
    update_fp_status();
2278
}
2279

    
2280
void OPPROTO op_fclex(void)
2281
{
2282
    env->fpus &= 0x7f00;
2283
}
2284

    
2285
void OPPROTO op_fwait(void)
2286
{
2287
    if (env->fpus & FPUS_SE)
2288
        fpu_raise_exception();
2289
    FORCE_RET();
2290
}
2291

    
2292
void OPPROTO op_fninit(void)
2293
{
2294
    env->fpus = 0;
2295
    env->fpstt = 0;
2296
    env->fpuc = 0x37f;
2297
    env->fptags[0] = 1;
2298
    env->fptags[1] = 1;
2299
    env->fptags[2] = 1;
2300
    env->fptags[3] = 1;
2301
    env->fptags[4] = 1;
2302
    env->fptags[5] = 1;
2303
    env->fptags[6] = 1;
2304
    env->fptags[7] = 1;
2305
}
2306

    
2307
void OPPROTO op_fnstenv_A0(void)
2308
{
2309
    helper_fstenv(A0, PARAM1);
2310
}
2311

    
2312
void OPPROTO op_fldenv_A0(void)
2313
{
2314
    helper_fldenv(A0, PARAM1);
2315
}
2316

    
2317
void OPPROTO op_fnsave_A0(void)
2318
{
2319
    helper_fsave(A0, PARAM1);
2320
}
2321

    
2322
void OPPROTO op_frstor_A0(void)
2323
{
2324
    helper_frstor(A0, PARAM1);
2325
}
2326

    
2327
/* threading support */
2328
void OPPROTO op_lock(void)
2329
{
2330
    cpu_lock();
2331
}
2332

    
2333
void OPPROTO op_unlock(void)
2334
{
2335
    cpu_unlock();
2336
}
2337

    
2338
/* SSE support */
2339
static inline void memcpy16(void *d, void *s)
2340
{
2341
    ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2342
    ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2343
    ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2344
    ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2345
}
2346

    
2347
void OPPROTO op_movo(void)
2348
{
2349
    /* XXX: badly generated code */
2350
    XMMReg *d, *s;
2351
    d = (XMMReg *)((char *)env + PARAM1);
2352
    s = (XMMReg *)((char *)env + PARAM2);
2353
    memcpy16(d, s);
2354
}
2355

    
2356
void OPPROTO op_movq(void)
2357
{
2358
    uint64_t *d, *s;
2359
    d = (uint64_t *)((char *)env + PARAM1);
2360
    s = (uint64_t *)((char *)env + PARAM2);
2361
    *d = *s;
2362
}
2363

    
2364
void OPPROTO op_movl(void)
2365
{
2366
    uint32_t *d, *s;
2367
    d = (uint32_t *)((char *)env + PARAM1);
2368
    s = (uint32_t *)((char *)env + PARAM2);
2369
    *d = *s;
2370
}
2371

    
2372
void OPPROTO op_movq_env_0(void)
2373
{
2374
    uint64_t *d;
2375
    d = (uint64_t *)((char *)env + PARAM1);
2376
    *d = 0;
2377
}
2378

    
2379
void OPPROTO op_fxsave_A0(void)
2380
{
2381
    helper_fxsave(A0, PARAM1);
2382
}
2383

    
2384
void OPPROTO op_fxrstor_A0(void)
2385
{
2386
    helper_fxrstor(A0, PARAM1);
2387
}
2388

    
2389
/* XXX: optimize by storing fptt and fptags in the static cpu state */
2390
void OPPROTO op_enter_mmx(void)
2391
{
2392
    env->fpstt = 0;
2393
    *(uint32_t *)(env->fptags) = 0;
2394
    *(uint32_t *)(env->fptags + 4) = 0;
2395
}
2396

    
2397
void OPPROTO op_emms(void)
2398
{
2399
    /* set to empty state */
2400
    *(uint32_t *)(env->fptags) = 0x01010101;
2401
    *(uint32_t *)(env->fptags + 4) = 0x01010101;
2402
}
2403

    
2404
#define SHIFT 0
2405
#include "ops_sse.h"
2406

    
2407
#define SHIFT 1
2408
#include "ops_sse.h"