Statistics
| Branch: | Revision:

root / target-alpha / translate.c @ 866be65d

History | View | Annotate | Download (83.4 kB)

# Date Author Comment
dad081ee 02/24/2010 12:36 am Richard Henderson

target-alpha: Reduce internal processor registers for user-mode.

The existing set of IPRs is totally irrelevant to user-mode emulation.
Indeed, they most are irrelevant to implementing kernel-mode emulation,
and would only be relevant to PAL-mode emulation, which I suspect that...

2edd07ef 12/23/2009 08:13 am Richard Henderson

target-alpha: Initialize fpcr

Linux, at least, disables exceptions by default.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

c4b3be39 12/21/2009 12:29 pm Richard Henderson

target-alpha: Emit tcg debug_insn_start.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

dbb30fe6 12/17/2009 07:12 pm Richard Henderson

target-alpha: Implement fp branch/cmov inline.

The old fcmov implementation had a typo:
- tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]);
which moved the condition, not the second source, to the destination.

But it's also easy to implement the simplified fp comparison inline....

248c42f3 12/13/2009 10:36 pm Richard Henderson

target-alpha: Expand ins*l inline.

Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

14ab1634 12/13/2009 10:36 pm Richard Henderson

target-alpha: Expand msk*l inline.

Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

ffec44f1 12/13/2009 10:36 pm Richard Henderson

target-alpha: Expand msk*h inline.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

50eb6e5c 12/13/2009 10:36 pm Richard Henderson

target-alpha: Expand ins*h inline.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a06d48d9 12/13/2009 10:36 pm Richard Henderson

target-alpha: Fix FMOV.

Properly handle move from the zero register.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

d9a50a36 12/13/2009 10:36 pm Richard Henderson

target-alpha: Fix double log_cpu_state.

The proper logging is handled by generic code.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

ab471ade 12/13/2009 10:36 pm Richard Henderson

target-alpha: Implement RD/WRUNIQUE in the translator

When emulating user-mode only, there's no reason to exit
the translation block to effect a call_pal. We can generate
a move to/from the unique slot directly.

Signed-off-by: Richard Henderson <>...

13e4df99 12/13/2009 10:26 pm Richard Henderson

target-alpha: Implement missing MVI instructions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

806991da 12/13/2009 10:26 pm Richard Henderson

target-alpha: Fix -d in_asm

Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS
rather than the generic DEBUG_DISAS. Use qemu_log_mask for
additional LOG_DISAS output. Delete some random insn_count
logging noise from gen_intermediate_code_internal....

87d98f95 12/13/2009 10:26 pm Richard Henderson

target-alpha: Expand zap/zapnot with immediate inline.

The vast majority of zap instructions have an immediate operand,
since zapnot is the canonical method to zero-extend from u16 or u32.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

377a43b6 12/13/2009 10:26 pm Richard Henderson

target-alpha: Rewrite gen_ext_[hl] in terms of zapnot.

The architecture manual specifies the EXT instructions
in terms of the ZAPNOT operation; writing it that way in
the translator makes things a bit clearer.

Signed-off-by: Richard Henderson <>...

73651cce 12/13/2009 10:26 pm Richard Henderson

target-alpha: Fix fbcond branch offset.

The instructions use a disp21 like all other branch insns,
not the disp16 that was being passed.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

19188121 12/13/2009 09:32 pm Richard Henderson

target-alpha: Remove bogus DO_TB_FLUSH code from translator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a964acc6 12/13/2009 09:32 pm Richard Henderson

target-alpha: Honor the -cpu command line argument.

Also change the default cpu to ev67.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

dbf95805 09/18/2009 06:22 pm Vince Weaver

target-alpha: fix extlh instruction

The extlh instruction on Alpha currently doesn't work properly.
It's a combination of a cut/paste bug (16 where it should be 32) as well
as a "shift by 64" bug.

Signed-off-by: Vince Weaver <>
Signed-off-by: Aurelien Jarno <>

72cf2d4f 09/12/2009 10:36 am Blue Swirl

Fix sys-queue.h conflict for good

Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...

636aa200 08/16/2009 12:06 pm Blue Swirl

Replace always_inline with inline

We define inline as always_inline.

Signed-off-by: Blue Swirl <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

0bf46a40 04/24/2009 09:03 pm aliguori

qemu: introduce qemu_init_vcpu (Marcelo Tosatti)

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162

ffc500ea 04/15/2009 05:43 pm aurel32

target-alpha: fix emulation of ecb

As ECB is a hint, it can be safely emulated as a nop.

This change is necessary to boot Tru64.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7111 c046a42c-6fe2-441c-8c8c-71466251a162

1a1f7dbc 04/11/2009 12:27 am aurel32

target-alpha: remove amask helper

The direct use of helper_amask in translate.c was bogus (as env is not
assigned). Directly code amask in tcg and remove the helper.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>...

8579095b 04/11/2009 12:27 am aurel32

target-alpha: remove helper_load_implver

There is no need to use an helper. Directly load the value with tcg code.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162

31a877f2 04/08/2009 01:31 am aurel32

target-alpha: fix palcode mask for user pal calls

(Also 6 bits for unprivileged calls)

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7033 c046a42c-6fe2-441c-8c8c-71466251a162

8fcc55f9 04/08/2009 12:44 am aurel32

target-alpha: stop translation if too long

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7027 c046a42c-6fe2-441c-8c8c-71466251a162

1b530a6d 04/05/2009 11:08 pm aurel32

Add new command line option -singlestep for tcg single stepping.

This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode....

ed1dda53 03/29/2009 04:04 am aurel32

target-alpha: bug fix: avoid nop to override next instruction

While searching PC, always store the pc of a new instruction.
Instructions that didn't generate tcg code (such as nop) prevented the next
one to be referenced.

Signed-off-by: Tristan Gingold <>...

b5d51029 03/29/2009 02:22 am aurel32

target-alpha: add instruction name in comments for hw_ld opcode.

Make code slightly easier to read.
Also unused hw_ld opcodes now generate an invalid opc fault.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>...

45d46ce8 03/29/2009 02:14 am aurel32

target-alpha: fix temp free for hw_st

No need to stop translation after hw_st.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6925 c046a42c-6fe2-441c-8c8c-71466251a162

a1516744 03/29/2009 02:13 am aurel32

target-alpha: fix bug: integer conditional branch offset is 21 bits wide.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6924 c046a42c-6fe2-441c-8c8c-71466251a162

577d5e7f 03/29/2009 02:13 am aurel32

target-alpha: Fix bug: do not mask address LSBs for ldwu.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6923 c046a42c-6fe2-441c-8c8c-71466251a162

e79ab941 03/29/2009 02:13 am aurel32

target-alpha: Fix bug: palcode is at least 6 bits.

Signed-off-by: Tristan Gingold <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6922 c046a42c-6fe2-441c-8c8c-71466251a162

0d0266a5 02/06/2009 12:06 am aliguori

targets: remove error handling from qemu_malloc() callers (Avi Kivity)

Signed-off-by: Avi Kivity <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162

8fec2b8c 01/16/2009 12:36 am aliguori

global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

93fcfe39 01/16/2009 12:34 am aliguori

Convert references to logfile/loglevel to use qemu_log*() macros

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

d12d51d5 01/15/2009 11:48 pm aliguori

Clean up debugging code #ifdefs (Eduardo Habkost)

Use macros to avoid #ifdefs on debugging code.

This patch doesn't try to merge logging macros from different files,
but just unify the debugging code #ifdefs onto a macro on each file. A
further cleanup can unify the debugging macros on a common header, later...

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

19bf517b 12/08/2008 01:26 am aurel32

target-alpha: gdb-stub support

(Vince Weaver)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5945 c046a42c-6fe2-441c-8c8c-71466251a162

c0ce998e 11/26/2008 12:13 am aliguori

Use sys-queue.h for break/watchpoint managment (Jan Kiszka)

This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <>...

a1d1bb31 11/18/2008 10:07 pm aliguori

Refactor and enhance break/watchpoint API (Jan Kiszka)

This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists....

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162

a74b4d2c 11/11/2008 03:54 pm aurel32

target-alpha: fix decoding of CVTST /S

This patch fixes the decoding of CVTST /S which was
incorrectly being decoded as CVTTS.

This fixes SPEC2000 gcc with 200.i input.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>...

55489a17 11/11/2008 03:31 pm aurel32

target-alpha: disable single stepping and TB flush by default

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5690 c046a42c-6fe2-441c-8c8c-71466251a162

9cd38c23 11/11/2008 01:30 pm aurel32

target-alpha: fix double TCG variable allocation

Noticed by Chris Krumme.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5671 c046a42c-6fe2-441c-8c8c-71466251a162

6223246a 11/08/2008 11:10 am aurel32

target-alpha: fix the return value of stl_c/stq_c

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5649 c046a42c-6fe2-441c-8c8c-71466251a162

57a92c8e 11/07/2008 04:00 pm aurel32

target-alpha: fix locked loads/stores

Fix reading of cpu_lock in gen_qemu_stql_c, original patch from Laurent
Desnogues.

A new flag was added to gen_store_mem to allocate local temps instead
of temps; this flag should be set when the tcg_gen_qemu_store callback...

1304ca87 11/06/2008 11:16 am aurel32

target-alpha: Fix ret instruction

Hopefully pine doesn't corrupt this patch, I've had problems recently.

For an alpha "ret" instruction, of the type
ret $26

The return was being ignored. This is because in translate.c
register $26 (the return address) was being over-written with the current...

1b581c44 10/21/2008 02:29 pm aurel32

target-alpha: use the new TCG logical operations

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5502 c046a42c-6fe2-441c-8c8c-71466251a162

8bb6e981 09/30/2008 09:45 am aurel32

target-alpha: convert palcode ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162

f4ed8679 09/30/2008 09:45 am aurel32

target-alpha: convert locked load/store to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5359 c046a42c-6fe2-441c-8c8c-71466251a162

fe2b269a 09/29/2008 08:21 pm aurel32

target-alpha: misc fixes

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5355 c046a42c-6fe2-441c-8c8c-71466251a162

f18cd223 09/29/2008 08:21 pm aurel32

target-alpha: convert FP ops to TCG

- Convert FP ops to TCG
- Fix S format
- Implement F and G formats (untested)
- Fix MF_FPCR an MT_FPCR
- Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT
- Fix CPYSN, CPYSE

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162

023d8ca2 09/29/2008 08:21 pm aurel32

target-alpha: factorize load/store code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5353 c046a42c-6fe2-441c-8c8c-71466251a162

b03d0971 09/18/2008 06:31 pm aurel32

target-alpha: switch most load/store ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5255 c046a42c-6fe2-441c-8c8c-71466251a162

04acd307 09/18/2008 04:45 pm aurel32

target-alpha: convert remaining arith3 functions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162

a1cf28f4 09/18/2008 01:13 pm aurel32

target-alpha: fix one more literal sign issue

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5251 c046a42c-6fe2-441c-8c8c-71466251a162

dfaa8583 09/18/2008 01:11 pm aurel32

target-alpha: instruction decoding simplification

Use a litteral value of 0 when rb31 is used. This reduces the tests
in the instruction decoding. Also remove almost unused corner cases.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5250 c046a42c-6fe2-441c-8c8c-71466251a162

01ff9cc8 09/18/2008 12:24 pm aurel32

target-alpha: convert cmp* instructions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5249 c046a42c-6fe2-441c-8c8c-71466251a162

adf3c8b6 09/18/2008 12:17 pm aurel32

alpha: fix a missing literal sign issue

Reported by Tristan Gingold

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5248 c046a42c-6fe2-441c-8c8c-71466251a162

6ad02592 09/18/2008 03:02 am aurel32

target-alpha: switch a few helpers to TCG

Switch a few helpers to TCG and implement RC and RS instructions

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162

b3249f63 09/18/2008 01:04 am aurel32

target-alpha: convert byte manipulation instructions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162

9c29504e 09/18/2008 01:04 am aurel32

alpha: convert cmov and bcond to TCG

Patch mostly by Tristan Gingold

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5245 c046a42c-6fe2-441c-8c8c-71466251a162

1ef4ef4e 09/17/2008 01:44 am aurel32

target-alpha: small optimizations

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5238 c046a42c-6fe2-441c-8c8c-71466251a162

6ba8dcd7 09/17/2008 01:44 am aurel32

target-alpha: fix TCG register names

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5237 c046a42c-6fe2-441c-8c8c-71466251a162

30c7183b 09/17/2008 01:44 am aurel32

target-alpha: convert some arith3 instructions to TCG

Replace gen_arith3 generic macro and dyngen ops by instruction specific
optimized TCG code.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5236 c046a42c-6fe2-441c-8c8c-71466251a162

ae8ecd42 09/17/2008 01:44 am aurel32

target-alpha: convert arith2 instructions to TCG

Replace gen_arith2 generic macro and dyngon ops by instruction specific
optimized TCG code.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162

9e85e9bd 09/14/2008 07:09 pm aurel32

alpha: fix lit sign

according to the alpha arch reference, the literal field of an operate
instruction is unsigned:

If bit <12> of the instruction is 1, an 8-bit zero-extended literal
constant is formed by bits
<20:13> of the instruction. The l teral is interpreted as a positive...

29d26d20 09/05/2008 10:07 pm aurel32

fix alpha cmovxx instruction

The CMOV instruction is defined by the alpha manual as:

CMOVxx Ra.rq,Rb.rq,Rc.wq !Operate format
CMOVxx Ra.rq,#b.ib,Rc.wq !Operate format

Operation:
IF TEST THEN
Rc ← Rbv

The current qemu behavior inverses Ra and Rb. This is fixed by this...

4f821e17 09/04/2008 07:36 am aurel32

alpha: convert a few more instructions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5152 c046a42c-6fe2-441c-8c8c-71466251a162

3761035f 09/04/2008 07:36 am aurel32

alpha: directly access ir registers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5151 c046a42c-6fe2-441c-8c8c-71466251a162

496cb5b9 09/04/2008 07:35 am aurel32

convert of few alpha insn to TCG

(based on a patch from Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5150 c046a42c-6fe2-441c-8c8c-71466251a162

a5f1b965 08/17/2008 11:21 pm blueswir1

Fix warnings that would be generated by gcc -Wstrict-prototypes

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5021 c046a42c-6fe2-441c-8c8c-71466251a162

2cfc5f17 07/18/2008 09:01 pm ths

Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162

b2437bf2 06/29/2008 03:29 pm pbrook

Add missing static qualifiers.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4801 c046a42c-6fe2-441c-8c8c-71466251a162

2e70f6ef 06/29/2008 04:03 am pbrook

Add instruction counter.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162

d2856f1a 04/28/2008 03:32 am aurel32

Factorize code in translate.c

(Glauber Costa)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162

ca10f867 04/12/2008 12:35 am aurel32

Remove osdep.c/qemu-img code duplication

(Kevin Wolf)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162

57fec1fe 02/01/2008 12:50 pm bellard

use the TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162

aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162

f071b4d3 10/28/2007 03:56 am j_mayer

Alpha coding style and inlining fixes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3462 c046a42c-6fe2-441c-8c8c-71466251a162

bb6f6792 10/14/2007 11:50 am j_mayer

Allow Alpha target to use supervisor and executive mode micro-ops.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3389 c046a42c-6fe2-441c-8c8c-71466251a162

5fafdf24 09/17/2007 12:08 am ths

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162

ce62e5ba 09/11/2007 01:04 pm ths

Fix tb->size mishandling, by Daniel Jacobowitz.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162

08ab123c 06/03/2007 08:10 pm ths

Avoid compiler warning.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2935 c046a42c-6fe2-441c-8c8c-71466251a162

e96efcfc 04/14/2007 03:17 pm j_mayer

Fix miscellaneous display warnings for PowerPC & alpha targets
and parallel CFI flash driver.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2661 c046a42c-6fe2-441c-8c8c-71466251a162

4c9649a9 04/05/2007 09:58 am j_mayer

Alpha architecture emulation core.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2597 c046a42c-6fe2-441c-8c8c-71466251a162