1292 |
1292 |
gen_op_load_gpr_T1(rB(ctx->opcode));
|
1293 |
1293 |
gen_op_xor();
|
1294 |
1294 |
} else {
|
1295 |
|
gen_op_reset_T0();
|
|
1295 |
tcg_gen_movi_tl(cpu_T[0], 0);
|
1296 |
1296 |
}
|
1297 |
1297 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
1298 |
1298 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
2108 |
2108 |
static always_inline void gen_addr_register (DisasContext *ctx)
|
2109 |
2109 |
{
|
2110 |
2110 |
if (rA(ctx->opcode) == 0) {
|
2111 |
|
gen_op_reset_T0();
|
|
2111 |
tcg_gen_movi_tl(cpu_T[0], 0);
|
2112 |
2112 |
} else {
|
2113 |
2113 |
gen_op_load_gpr_T0(rA(ctx->opcode));
|
2114 |
2114 |
}
|
... | ... | |
2518 |
2518 |
/* NIP cannot be restored if the memory exception comes from an helper */
|
2519 |
2519 |
gen_update_nip(ctx, ctx->nip - 4);
|
2520 |
2520 |
gen_addr_register(ctx);
|
2521 |
|
gen_op_set_T1(nb);
|
|
2521 |
tcg_gen_movi_tl(cpu_T[1], nb);
|
2522 |
2522 |
op_ldsts(lswi, start);
|
2523 |
2523 |
}
|
2524 |
2524 |
|
... | ... | |
2548 |
2548 |
gen_addr_register(ctx);
|
2549 |
2549 |
if (nb == 0)
|
2550 |
2550 |
nb = 32;
|
2551 |
|
gen_op_set_T1(nb);
|
|
2551 |
tcg_gen_movi_tl(cpu_T[1], nb);
|
2552 |
2552 |
op_ldsts(stsw, rS(ctx->opcode));
|
2553 |
2553 |
}
|
2554 |
2554 |
|
... | ... | |
3612 |
3612 |
GEN_EXCP_PRIVREG(ctx);
|
3613 |
3613 |
return;
|
3614 |
3614 |
}
|
3615 |
|
gen_op_set_T1(SR(ctx->opcode));
|
|
3615 |
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
|
3616 |
3616 |
gen_op_load_sr();
|
3617 |
3617 |
gen_op_store_T0_gpr(rD(ctx->opcode));
|
3618 |
3618 |
#endif
|
... | ... | |
3646 |
3646 |
return;
|
3647 |
3647 |
}
|
3648 |
3648 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
3649 |
|
gen_op_set_T1(SR(ctx->opcode));
|
|
3649 |
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
|
3650 |
3650 |
gen_op_store_sr();
|
3651 |
3651 |
#endif
|
3652 |
3652 |
}
|
... | ... | |
3680 |
3680 |
GEN_EXCP_PRIVREG(ctx);
|
3681 |
3681 |
return;
|
3682 |
3682 |
}
|
3683 |
|
gen_op_set_T1(SR(ctx->opcode));
|
|
3683 |
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
|
3684 |
3684 |
gen_op_load_slb();
|
3685 |
3685 |
gen_op_store_T0_gpr(rD(ctx->opcode));
|
3686 |
3686 |
#endif
|
... | ... | |
3715 |
3715 |
return;
|
3716 |
3716 |
}
|
3717 |
3717 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
3718 |
|
gen_op_set_T1(SR(ctx->opcode));
|
|
3718 |
tcg_gen_movi_tl(cpu_T[1], SR(ctx->opcode));
|
3719 |
3719 |
gen_op_store_slb();
|
3720 |
3720 |
#endif
|
3721 |
3721 |
}
|
... | ... | |
3952 |
3952 |
GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR)
|
3953 |
3953 |
{
|
3954 |
3954 |
gen_op_load_gpr_T0(rA(ctx->opcode));
|
3955 |
|
gen_op_set_T1(SIMM(ctx->opcode));
|
|
3955 |
tcg_gen_movi_tl(cpu_T[1], SIMM(ctx->opcode));
|
3956 |
3956 |
gen_op_POWER_doz();
|
3957 |
3957 |
gen_op_store_T0_gpr(rD(ctx->opcode));
|
3958 |
3958 |
}
|
... | ... | |
4117 |
4117 |
GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR)
|
4118 |
4118 |
{
|
4119 |
4119 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
4120 |
|
gen_op_set_T1(SH(ctx->opcode));
|
|
4120 |
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
|
4121 |
4121 |
gen_op_POWER_sle();
|
4122 |
4122 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
4123 |
4123 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
4128 |
4128 |
GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR)
|
4129 |
4129 |
{
|
4130 |
4130 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
4131 |
|
gen_op_set_T1(SH(ctx->opcode));
|
|
4131 |
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
|
4132 |
4132 |
gen_op_POWER_sleq();
|
4133 |
4133 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
4134 |
4134 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
4161 |
4161 |
GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR)
|
4162 |
4162 |
{
|
4163 |
4163 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
4164 |
|
gen_op_set_T1(SH(ctx->opcode));
|
|
4164 |
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
|
4165 |
4165 |
gen_op_POWER_sraq();
|
4166 |
4166 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
4167 |
4167 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
4216 |
4216 |
GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR)
|
4217 |
4217 |
{
|
4218 |
4218 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
4219 |
|
gen_op_set_T1(SH(ctx->opcode));
|
|
4219 |
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
|
4220 |
4220 |
gen_op_POWER_srq();
|
4221 |
4221 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
4222 |
4222 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
4228 |
4228 |
{
|
4229 |
4229 |
gen_op_load_gpr_T0(rS(ctx->opcode));
|
4230 |
4230 |
gen_op_load_gpr_T1(rB(ctx->opcode));
|
4231 |
|
gen_op_set_T1(SH(ctx->opcode));
|
|
4231 |
tcg_gen_movi_tl(cpu_T[1], SH(ctx->opcode));
|
4232 |
4232 |
gen_op_POWER_srlq();
|
4233 |
4233 |
gen_op_store_T0_gpr(rA(ctx->opcode));
|
4234 |
4234 |
if (unlikely(Rc(ctx->opcode) != 0))
|
... | ... | |
4776 |
4776 |
GEN_EXCP_PRIVREG(ctx);
|
4777 |
4777 |
return;
|
4778 |
4778 |
}
|
4779 |
|
gen_op_set_T0(dcrn);
|
|
4779 |
tcg_gen_movi_tl(cpu_T[0], dcrn);
|
4780 |
4780 |
gen_op_load_dcr();
|
4781 |
4781 |
gen_op_store_T0_gpr(rD(ctx->opcode));
|
4782 |
4782 |
#endif
|
... | ... | |
4794 |
4794 |
GEN_EXCP_PRIVREG(ctx);
|
4795 |
4795 |
return;
|
4796 |
4796 |
}
|
4797 |
|
gen_op_set_T0(dcrn);
|
|
4797 |
tcg_gen_movi_tl(cpu_T[0], dcrn);
|
4798 |
4798 |
gen_op_load_gpr_T1(rS(ctx->opcode));
|
4799 |
4799 |
gen_op_store_dcr();
|
4800 |
4800 |
#endif
|
... | ... | |
5158 |
5158 |
GEN_EXCP_PRIVOPC(ctx);
|
5159 |
5159 |
return;
|
5160 |
5160 |
}
|
5161 |
|
gen_op_set_T0(ctx->opcode & 0x00010000);
|
|
5161 |
tcg_gen_movi_tl(cpu_T[0], ctx->opcode & 0x00010000);
|
5162 |
5162 |
gen_op_wrte();
|
5163 |
5163 |
/* Stop translation to have a chance to raise an exception
|
5164 |
5164 |
* if we just set msr_ee to 1
|