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/*
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 * QEMU PC System Emulator
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 *
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 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "pc.h"
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#include "fdc.h"
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#include "pci.h"
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#include "block.h"
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#include "sysemu.h"
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#include "audio/audio.h"
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#include "net.h"
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#include "smbus.h"
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#include "boards.h"
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#include "monitor.h"
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#include "fw_cfg.h"
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#include "hpet_emul.h"
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#include "watchdog.h"
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#include "smbios.h"
39
#include "ide.h"
40

    
41
/* output Bochs bios info messages */
42
//#define DEBUG_BIOS
43

    
44
/* Show multiboot debug output */
45
//#define DEBUG_MULTIBOOT
46

    
47
#define BIOS_FILENAME "bios.bin"
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
50

    
51
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
52

    
53
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
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#define ACPI_DATA_SIZE       0x10000
55
#define BIOS_CFG_IOPORT 0x510
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#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
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#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
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#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
59

    
60
#define MAX_IDE_BUS 2
61

    
62
static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
64
static PITState *pit;
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static PCII440FXState *i440fx_state;
66

    
67
typedef struct rom_reset_data {
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    uint8_t *data;
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    target_phys_addr_t addr;
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    unsigned size;
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} RomResetData;
72

    
73
static void option_rom_reset(void *_rrd)
74
{
75
    RomResetData *rrd = _rrd;
76

    
77
    cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
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}
79

    
80
static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
81
{
82
    RomResetData *rrd = qemu_malloc(sizeof *rrd);
83

    
84
    rrd->data = qemu_malloc(size);
85
    cpu_physical_memory_read(addr, rrd->data, size);
86
    rrd->addr = addr;
87
    rrd->size = size;
88
    qemu_register_reset(option_rom_reset, rrd);
89
}
90

    
91
typedef struct isa_irq_state {
92
    qemu_irq *i8259;
93
    qemu_irq *ioapic;
94
} IsaIrqState;
95

    
96
static void isa_irq_handler(void *opaque, int n, int level)
97
{
98
    IsaIrqState *isa = (IsaIrqState *)opaque;
99

    
100
    if (n < 16) {
101
        qemu_set_irq(isa->i8259[n], level);
102
    }
103
    if (isa->ioapic)
104
        qemu_set_irq(isa->ioapic[n], level);
105
};
106

    
107
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
108
{
109
}
110

    
111
/* MSDOS compatibility mode FPU exception support */
112
static qemu_irq ferr_irq;
113
/* XXX: add IGNNE support */
114
void cpu_set_ferr(CPUX86State *s)
115
{
116
    qemu_irq_raise(ferr_irq);
117
}
118

    
119
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
120
{
121
    qemu_irq_lower(ferr_irq);
122
}
123

    
124
/* TSC handling */
125
uint64_t cpu_get_tsc(CPUX86State *env)
126
{
127
    return cpu_get_ticks();
128
}
129

    
130
/* SMM support */
131
void cpu_smm_update(CPUState *env)
132
{
133
    if (i440fx_state && env == first_cpu)
134
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
135
}
136

    
137

    
138
/* IRQ handling */
139
int cpu_get_pic_interrupt(CPUState *env)
140
{
141
    int intno;
142

    
143
    intno = apic_get_interrupt(env);
144
    if (intno >= 0) {
145
        /* set irq request if a PIC irq is still pending */
146
        /* XXX: improve that */
147
        pic_update_irq(isa_pic);
148
        return intno;
149
    }
150
    /* read the irq from the PIC */
151
    if (!apic_accept_pic_intr(env))
152
        return -1;
153

    
154
    intno = pic_read_irq(isa_pic);
155
    return intno;
156
}
157

    
158
static void pic_irq_request(void *opaque, int irq, int level)
159
{
160
    CPUState *env = first_cpu;
161

    
162
    if (env->apic_state) {
163
        while (env) {
164
            if (apic_accept_pic_intr(env))
165
                apic_deliver_pic_intr(env, level);
166
            env = env->next_cpu;
167
        }
168
    } else {
169
        if (level)
170
            cpu_interrupt(env, CPU_INTERRUPT_HARD);
171
        else
172
            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
173
    }
174
}
175

    
176
/* PC cmos mappings */
177

    
178
#define REG_EQUIPMENT_BYTE          0x14
179

    
180
static int cmos_get_fd_drive_type(int fd0)
181
{
182
    int val;
183

    
184
    switch (fd0) {
185
    case 0:
186
        /* 1.44 Mb 3"5 drive */
187
        val = 4;
188
        break;
189
    case 1:
190
        /* 2.88 Mb 3"5 drive */
191
        val = 5;
192
        break;
193
    case 2:
194
        /* 1.2 Mb 5"5 drive */
195
        val = 2;
196
        break;
197
    default:
198
        val = 0;
199
        break;
200
    }
201
    return val;
202
}
203

    
204
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
205
{
206
    RTCState *s = rtc_state;
207
    int cylinders, heads, sectors;
208
    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
209
    rtc_set_memory(s, type_ofs, 47);
210
    rtc_set_memory(s, info_ofs, cylinders);
211
    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
212
    rtc_set_memory(s, info_ofs + 2, heads);
213
    rtc_set_memory(s, info_ofs + 3, 0xff);
214
    rtc_set_memory(s, info_ofs + 4, 0xff);
215
    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
216
    rtc_set_memory(s, info_ofs + 6, cylinders);
217
    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
218
    rtc_set_memory(s, info_ofs + 8, sectors);
219
}
220

    
221
/* convert boot_device letter to something recognizable by the bios */
222
static int boot_device2nibble(char boot_device)
223
{
224
    switch(boot_device) {
225
    case 'a':
226
    case 'b':
227
        return 0x01; /* floppy boot */
228
    case 'c':
229
        return 0x02; /* hard drive boot */
230
    case 'd':
231
        return 0x03; /* CD-ROM boot */
232
    case 'n':
233
        return 0x04; /* Network boot */
234
    }
235
    return 0;
236
}
237

    
238
/* copy/pasted from cmos_init, should be made a general function
239
 and used there as well */
240
static int pc_boot_set(void *opaque, const char *boot_device)
241
{
242
    Monitor *mon = cur_mon;
243
#define PC_MAX_BOOT_DEVICES 3
244
    RTCState *s = (RTCState *)opaque;
245
    int nbds, bds[3] = { 0, };
246
    int i;
247

    
248
    nbds = strlen(boot_device);
249
    if (nbds > PC_MAX_BOOT_DEVICES) {
250
        monitor_printf(mon, "Too many boot devices for PC\n");
251
        return(1);
252
    }
253
    for (i = 0; i < nbds; i++) {
254
        bds[i] = boot_device2nibble(boot_device[i]);
255
        if (bds[i] == 0) {
256
            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
257
                           boot_device[i]);
258
            return(1);
259
        }
260
    }
261
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
262
    rtc_set_memory(s, 0x38, (bds[2] << 4));
263
    return(0);
264
}
265

    
266
/* hd_table must contain 4 block drivers */
267
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
268
                      const char *boot_device, DriveInfo **hd_table)
269
{
270
    RTCState *s = rtc_state;
271
    int nbds, bds[3] = { 0, };
272
    int val;
273
    int fd0, fd1, nb;
274
    int i;
275

    
276
    /* various important CMOS locations needed by PC/Bochs bios */
277

    
278
    /* memory size */
279
    val = 640; /* base memory in K */
280
    rtc_set_memory(s, 0x15, val);
281
    rtc_set_memory(s, 0x16, val >> 8);
282

    
283
    val = (ram_size / 1024) - 1024;
284
    if (val > 65535)
285
        val = 65535;
286
    rtc_set_memory(s, 0x17, val);
287
    rtc_set_memory(s, 0x18, val >> 8);
288
    rtc_set_memory(s, 0x30, val);
289
    rtc_set_memory(s, 0x31, val >> 8);
290

    
291
    if (above_4g_mem_size) {
292
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
293
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
294
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
295
    }
296

    
297
    if (ram_size > (16 * 1024 * 1024))
298
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
299
    else
300
        val = 0;
301
    if (val > 65535)
302
        val = 65535;
303
    rtc_set_memory(s, 0x34, val);
304
    rtc_set_memory(s, 0x35, val >> 8);
305

    
306
    /* set the number of CPU */
307
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
308

    
309
    /* set boot devices, and disable floppy signature check if requested */
310
#define PC_MAX_BOOT_DEVICES 3
311
    nbds = strlen(boot_device);
312
    if (nbds > PC_MAX_BOOT_DEVICES) {
313
        fprintf(stderr, "Too many boot devices for PC\n");
314
        exit(1);
315
    }
316
    for (i = 0; i < nbds; i++) {
317
        bds[i] = boot_device2nibble(boot_device[i]);
318
        if (bds[i] == 0) {
319
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
320
                    boot_device[i]);
321
            exit(1);
322
        }
323
    }
324
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
325
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
326

    
327
    /* floppy type */
328

    
329
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
330
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
331

    
332
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
333
    rtc_set_memory(s, 0x10, val);
334

    
335
    val = 0;
336
    nb = 0;
337
    if (fd0 < 3)
338
        nb++;
339
    if (fd1 < 3)
340
        nb++;
341
    switch (nb) {
342
    case 0:
343
        break;
344
    case 1:
345
        val |= 0x01; /* 1 drive, ready for boot */
346
        break;
347
    case 2:
348
        val |= 0x41; /* 2 drives, ready for boot */
349
        break;
350
    }
351
    val |= 0x02; /* FPU is there */
352
    val |= 0x04; /* PS/2 mouse installed */
353
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
354

    
355
    /* hard drives */
356

    
357
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
358
    if (hd_table[0])
359
        cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
360
    if (hd_table[1])
361
        cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
362

    
363
    val = 0;
364
    for (i = 0; i < 4; i++) {
365
        if (hd_table[i]) {
366
            int cylinders, heads, sectors, translation;
367
            /* NOTE: bdrv_get_geometry_hint() returns the physical
368
                geometry.  It is always such that: 1 <= sects <= 63, 1
369
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
370
                geometry can be different if a translation is done. */
371
            translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
372
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
373
                bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
374
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
375
                    /* No translation. */
376
                    translation = 0;
377
                } else {
378
                    /* LBA translation. */
379
                    translation = 1;
380
                }
381
            } else {
382
                translation--;
383
            }
384
            val |= translation << (i * 2);
385
        }
386
    }
387
    rtc_set_memory(s, 0x39, val);
388
}
389

    
390
void ioport_set_a20(int enable)
391
{
392
    /* XXX: send to all CPUs ? */
393
    cpu_x86_set_a20(first_cpu, enable);
394
}
395

    
396
int ioport_get_a20(void)
397
{
398
    return ((first_cpu->a20_mask >> 20) & 1);
399
}
400

    
401
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
402
{
403
    ioport_set_a20((val >> 1) & 1);
404
    /* XXX: bit 0 is fast reset */
405
}
406

    
407
static uint32_t ioport92_read(void *opaque, uint32_t addr)
408
{
409
    return ioport_get_a20() << 1;
410
}
411

    
412
/***********************************************************/
413
/* Bochs BIOS debug ports */
414

    
415
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
416
{
417
    static const char shutdown_str[8] = "Shutdown";
418
    static int shutdown_index = 0;
419

    
420
    switch(addr) {
421
        /* Bochs BIOS messages */
422
    case 0x400:
423
    case 0x401:
424
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
425
        exit(1);
426
    case 0x402:
427
    case 0x403:
428
#ifdef DEBUG_BIOS
429
        fprintf(stderr, "%c", val);
430
#endif
431
        break;
432
    case 0x8900:
433
        /* same as Bochs power off */
434
        if (val == shutdown_str[shutdown_index]) {
435
            shutdown_index++;
436
            if (shutdown_index == 8) {
437
                shutdown_index = 0;
438
                qemu_system_shutdown_request();
439
            }
440
        } else {
441
            shutdown_index = 0;
442
        }
443
        break;
444

    
445
        /* LGPL'ed VGA BIOS messages */
446
    case 0x501:
447
    case 0x502:
448
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
449
        exit(1);
450
    case 0x500:
451
    case 0x503:
452
#ifdef DEBUG_BIOS
453
        fprintf(stderr, "%c", val);
454
#endif
455
        break;
456
    }
457
}
458

    
459
extern uint64_t node_cpumask[MAX_NODES];
460

    
461
static void *bochs_bios_init(void)
462
{
463
    void *fw_cfg;
464
    uint8_t *smbios_table;
465
    size_t smbios_len;
466
    uint64_t *numa_fw_cfg;
467
    int i, j;
468

    
469
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
470
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
471
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
472
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
473
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
474

    
475
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
476
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
477
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
478
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
479

    
480
    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
481

    
482
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
483
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
484
    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
485
                     acpi_tables_len);
486
    fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
487

    
488
    smbios_table = smbios_get_table(&smbios_len);
489
    if (smbios_table)
490
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
491
                         smbios_table, smbios_len);
492

    
493
    /* allocate memory for the NUMA channel: one (64bit) word for the number
494
     * of nodes, one word for each VCPU->node and one word for each node to
495
     * hold the amount of memory.
496
     */
497
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
498
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
499
    for (i = 0; i < smp_cpus; i++) {
500
        for (j = 0; j < nb_numa_nodes; j++) {
501
            if (node_cpumask[j] & (1 << i)) {
502
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
503
                break;
504
            }
505
        }
506
    }
507
    for (i = 0; i < nb_numa_nodes; i++) {
508
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
509
    }
510
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
511
                     (1 + smp_cpus + nb_numa_nodes) * 8);
512

    
513
    return fw_cfg;
514
}
515

    
516
/* Generate an initial boot sector which sets state and jump to
517
   a specified vector */
518
static void generate_bootsect(target_phys_addr_t option_rom,
519
                              uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
520
{
521
    uint8_t rom[512], *p, *reloc;
522
    uint8_t sum;
523
    int i;
524

    
525
    memset(rom, 0, sizeof(rom));
526

    
527
    p = rom;
528
    /* Make sure we have an option rom signature */
529
    *p++ = 0x55;
530
    *p++ = 0xaa;
531

    
532
    /* ROM size in sectors*/
533
    *p++ = 1;
534

    
535
    /* Hook int19 */
536

    
537
    *p++ = 0x50;                /* push ax */
538
    *p++ = 0x1e;                /* push ds */
539
    *p++ = 0x31; *p++ = 0xc0;        /* xor ax, ax */
540
    *p++ = 0x8e; *p++ = 0xd8;        /* mov ax, ds */
541

    
542
    *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
543
    *p++ = 0x64; *p++ = 0x00;
544
    reloc = p;
545
    *p++ = 0x00; *p++ = 0x00;
546

    
547
    *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
548
    *p++ = 0x66; *p++ = 0x00;
549

    
550
    *p++ = 0x1f;                /* pop ds */
551
    *p++ = 0x58;                /* pop ax */
552
    *p++ = 0xcb;                /* lret */
553

    
554
    /* Actual code */
555
    *reloc = (p - rom);
556

    
557
    *p++ = 0xfa;                /* CLI */
558
    *p++ = 0xfc;                /* CLD */
559

    
560
    for (i = 0; i < 6; i++) {
561
        if (i == 1)                /* Skip CS */
562
            continue;
563

    
564
        *p++ = 0xb8;                /* MOV AX,imm16 */
565
        *p++ = segs[i];
566
        *p++ = segs[i] >> 8;
567
        *p++ = 0x8e;                /* MOV <seg>,AX */
568
        *p++ = 0xc0 + (i << 3);
569
    }
570

    
571
    for (i = 0; i < 8; i++) {
572
        *p++ = 0x66;                /* 32-bit operand size */
573
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
574
        *p++ = gpr[i];
575
        *p++ = gpr[i] >> 8;
576
        *p++ = gpr[i] >> 16;
577
        *p++ = gpr[i] >> 24;
578
    }
579

    
580
    *p++ = 0xea;                /* JMP FAR */
581
    *p++ = ip;                        /* IP */
582
    *p++ = ip >> 8;
583
    *p++ = segs[1];                /* CS */
584
    *p++ = segs[1] >> 8;
585

    
586
    /* sign rom */
587
    sum = 0;
588
    for (i = 0; i < (sizeof(rom) - 1); i++)
589
        sum += rom[i];
590
    rom[sizeof(rom) - 1] = -sum;
591

    
592
    cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
593
    option_rom_setup_reset(option_rom, sizeof (rom));
594
}
595

    
596
static long get_file_size(FILE *f)
597
{
598
    long where, size;
599

    
600
    /* XXX: on Unix systems, using fstat() probably makes more sense */
601

    
602
    where = ftell(f);
603
    fseek(f, 0, SEEK_END);
604
    size = ftell(f);
605
    fseek(f, where, SEEK_SET);
606

    
607
    return size;
608
}
609

    
610
#define MULTIBOOT_STRUCT_ADDR 0x9000
611

    
612
#if MULTIBOOT_STRUCT_ADDR > 0xf0000
613
#error multiboot struct needs to fit in 16 bit real mode
614
#endif
615

    
616
static int load_multiboot(void *fw_cfg,
617
                          FILE *f,
618
                          const char *kernel_filename,
619
                          const char *initrd_filename,
620
                          const char *kernel_cmdline,
621
                          uint8_t *header)
622
{
623
    int i, t, is_multiboot = 0;
624
    uint32_t flags = 0;
625
    uint32_t mh_entry_addr;
626
    uint32_t mh_load_addr;
627
    uint32_t mb_kernel_size;
628
    uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
629
    uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
630
    uint32_t mb_cmdline = mb_bootinfo + 0x200;
631
    uint32_t mb_mod_end;
632

    
633
    /* Ok, let's see if it is a multiboot image.
634
       The header is 12x32bit long, so the latest entry may be 8192 - 48. */
635
    for (i = 0; i < (8192 - 48); i += 4) {
636
        if (ldl_p(header+i) == 0x1BADB002) {
637
            uint32_t checksum = ldl_p(header+i+8);
638
            flags = ldl_p(header+i+4);
639
            checksum += flags;
640
            checksum += (uint32_t)0x1BADB002;
641
            if (!checksum) {
642
                is_multiboot = 1;
643
                break;
644
            }
645
        }
646
    }
647

    
648
    if (!is_multiboot)
649
        return 0; /* no multiboot */
650

    
651
#ifdef DEBUG_MULTIBOOT
652
    fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
653
#endif
654

    
655
    if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
656
        fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
657
    }
658
    if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
659
        uint64_t elf_entry;
660
        int kernel_size;
661
        fclose(f);
662
        kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
663
        if (kernel_size < 0) {
664
            fprintf(stderr, "Error while loading elf kernel\n");
665
            exit(1);
666
        }
667
        mh_load_addr = mh_entry_addr = elf_entry;
668
        mb_kernel_size = kernel_size;
669

    
670
#ifdef DEBUG_MULTIBOOT
671
        fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
672
                mb_kernel_size, (size_t)mh_entry_addr);
673
#endif
674
    } else {
675
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
676
        uint32_t mh_header_addr = ldl_p(header+i+12);
677
        mh_load_addr = ldl_p(header+i+16);
678
#ifdef DEBUG_MULTIBOOT
679
        uint32_t mh_load_end_addr = ldl_p(header+i+20);
680
        uint32_t mh_bss_end_addr = ldl_p(header+i+24);
681
#endif
682
        uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
683

    
684
        mh_entry_addr = ldl_p(header+i+28);
685
        mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
686

    
687
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
688
        uint32_t mh_mode_type = ldl_p(header+i+32);
689
        uint32_t mh_width = ldl_p(header+i+36);
690
        uint32_t mh_height = ldl_p(header+i+40);
691
        uint32_t mh_depth = ldl_p(header+i+44); */
692

    
693
#ifdef DEBUG_MULTIBOOT
694
        fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
695
        fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
696
        fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
697
        fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
698
#endif
699

    
700
        fseek(f, mb_kernel_text_offset, SEEK_SET);
701

    
702
#ifdef DEBUG_MULTIBOOT
703
        fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
704
                mb_kernel_size, mh_load_addr);
705
#endif
706

    
707
        if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
708
            fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
709
                    kernel_filename, mb_kernel_size);
710
            exit(1);
711
        }
712
        fclose(f);
713
    }
714

    
715
    /* blob size is only the kernel for now */
716
    mb_mod_end = mh_load_addr + mb_kernel_size;
717

    
718
    /* load modules */
719
    stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */
720
    if (initrd_filename) {
721
        uint32_t mb_mod_info = mb_bootinfo + 0x100;
722
        uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
723
        uint32_t mb_mod_start = mh_load_addr;
724
        uint32_t mb_mod_length = mb_kernel_size;
725
        char *next_initrd;
726
        char *next_space;
727
        int mb_mod_count = 0;
728

    
729
        do {
730
            next_initrd = strchr(initrd_filename, ',');
731
            if (next_initrd)
732
                *next_initrd = '\0';
733
            /* if a space comes after the module filename, treat everything
734
               after that as parameters */
735
            cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename,
736
                                      strlen(initrd_filename) + 1);
737
            stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */
738
            mb_mod_cmdline += strlen(initrd_filename) + 1;
739
            if ((next_space = strchr(initrd_filename, ' ')))
740
                *next_space = '\0';
741
#ifdef DEBUG_MULTIBOOT
742
            printf("multiboot loading module: %s\n", initrd_filename);
743
#endif
744
            f = fopen(initrd_filename, "rb");
745
            if (f) {
746
                mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
747
                             & (TARGET_PAGE_MASK);
748
                mb_mod_length = get_file_size(f);
749
                mb_mod_end = mb_mod_start + mb_mod_length;
750

    
751
                if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
752
                    fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
753
                            initrd_filename, mb_mod_length);
754
                    exit(1);
755
                }
756

    
757
                mb_mod_count++;
758
                stl_phys(mb_mod_info + 0, mb_mod_start);
759
                stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
760
#ifdef DEBUG_MULTIBOOT
761
                printf("mod_start: %#x\nmod_end:   %#x\n", mb_mod_start,
762
                       mb_mod_start + mb_mod_length);
763
#endif
764
                stl_phys(mb_mod_info + 12, 0x0); /* reserved */
765
            }
766
            initrd_filename = next_initrd+1;
767
            mb_mod_info += 16;
768
        } while (next_initrd);
769
        stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */
770
        stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
771
    }
772

    
773
    /* Make sure we're getting kernel + modules back after reset */
774
    option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr);
775

    
776
    /* Commandline support */
777
    stl_phys(mb_bootinfo + 16, mb_cmdline);
778
    t = strlen(kernel_filename);
779
    cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t);
780
    mb_cmdline += t;
781
    stb_phys(mb_cmdline++, ' ');
782
    t = strlen(kernel_cmdline) + 1;
783
    cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t);
784

    
785
    /* the kernel is where we want it to be now */
786

    
787
#define MULTIBOOT_FLAGS_MEMORY (1 << 0)
788
#define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
789
#define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
790
#define MULTIBOOT_FLAGS_MODULES (1 << 3)
791
#define MULTIBOOT_FLAGS_MMAP (1 << 6)
792
    stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY
793
                        | MULTIBOOT_FLAGS_BOOT_DEVICE
794
                        | MULTIBOOT_FLAGS_CMDLINE
795
                        | MULTIBOOT_FLAGS_MODULES
796
                        | MULTIBOOT_FLAGS_MMAP);
797
    stl_phys(mb_bootinfo + 4, 640); /* mem_lower */
798
    stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */
799
    stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
800
    stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */
801

    
802
#ifdef DEBUG_MULTIBOOT
803
    fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
804
#endif
805

    
806
    /* Pass variables to option rom */
807
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
808
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
809
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
810

    
811
    /* Make sure we're getting the config space back after reset */
812
    option_rom_setup_reset(mb_bootinfo, 0x500);
813

    
814
    option_rom[nb_option_roms] = "multiboot.bin";
815
    nb_option_roms++;
816

    
817
    return 1; /* yes, we are multiboot */
818
}
819

    
820
static void load_linux(void *fw_cfg,
821
                       target_phys_addr_t option_rom,
822
                       const char *kernel_filename,
823
                       const char *initrd_filename,
824
                       const char *kernel_cmdline,
825
               target_phys_addr_t max_ram_size)
826
{
827
    uint16_t protocol;
828
    uint32_t gpr[8];
829
    uint16_t seg[6];
830
    uint16_t real_seg;
831
    int setup_size, kernel_size, initrd_size = 0, cmdline_size;
832
    uint32_t initrd_max;
833
    uint8_t header[8192];
834
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
835
    FILE *f, *fi;
836
    char *vmode;
837

    
838
    /* Align to 16 bytes as a paranoia measure */
839
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
840

    
841
    /* load the kernel header */
842
    f = fopen(kernel_filename, "rb");
843
    if (!f || !(kernel_size = get_file_size(f)) ||
844
        fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
845
        MIN(ARRAY_SIZE(header), kernel_size)) {
846
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
847
                kernel_filename);
848
        exit(1);
849
    }
850

    
851
    /* kernel protocol version */
852
#if 0
853
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
854
#endif
855
    if (ldl_p(header+0x202) == 0x53726448)
856
        protocol = lduw_p(header+0x206);
857
    else {
858
        /* This looks like a multiboot kernel. If it is, let's stop
859
           treating it like a Linux kernel. */
860
        if (load_multiboot(fw_cfg, f, kernel_filename,
861
                           initrd_filename, kernel_cmdline, header))
862
            return;
863
        protocol = 0;
864
    }
865

    
866
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
867
        /* Low kernel */
868
        real_addr    = 0x90000;
869
        cmdline_addr = 0x9a000 - cmdline_size;
870
        prot_addr    = 0x10000;
871
    } else if (protocol < 0x202) {
872
        /* High but ancient kernel */
873
        real_addr    = 0x90000;
874
        cmdline_addr = 0x9a000 - cmdline_size;
875
        prot_addr    = 0x100000;
876
    } else {
877
        /* High and recent kernel */
878
        real_addr    = 0x10000;
879
        cmdline_addr = 0x20000;
880
        prot_addr    = 0x100000;
881
    }
882

    
883
#if 0
884
    fprintf(stderr,
885
            "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
886
            "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
887
            "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
888
            real_addr,
889
            cmdline_addr,
890
            prot_addr);
891
#endif
892

    
893
    /* highest address for loading the initrd */
894
    if (protocol >= 0x203)
895
        initrd_max = ldl_p(header+0x22c);
896
    else
897
        initrd_max = 0x37ffffff;
898

    
899
    if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
900
            initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
901

    
902
    /* kernel command line */
903
    pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
904

    
905
    if (protocol >= 0x202) {
906
        stl_p(header+0x228, cmdline_addr);
907
    } else {
908
        stw_p(header+0x20, 0xA33F);
909
        stw_p(header+0x22, cmdline_addr-real_addr);
910
    }
911

    
912
    /* handle vga= parameter */
913
    vmode = strstr(kernel_cmdline, "vga=");
914
    if (vmode) {
915
        unsigned int video_mode;
916
        /* skip "vga=" */
917
        vmode += 4;
918
        if (!strncmp(vmode, "normal", 6)) {
919
            video_mode = 0xffff;
920
        } else if (!strncmp(vmode, "ext", 3)) {
921
            video_mode = 0xfffe;
922
        } else if (!strncmp(vmode, "ask", 3)) {
923
            video_mode = 0xfffd;
924
        } else {
925
            video_mode = strtol(vmode, NULL, 0);
926
        }
927
        stw_p(header+0x1fa, video_mode);
928
    }
929

    
930
    /* loader type */
931
    /* High nybble = B reserved for Qemu; low nybble is revision number.
932
       If this code is substantially changed, you may want to consider
933
       incrementing the revision. */
934
    if (protocol >= 0x200)
935
        header[0x210] = 0xB0;
936

    
937
    /* heap */
938
    if (protocol >= 0x201) {
939
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
940
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
941
    }
942

    
943
    /* load initrd */
944
    if (initrd_filename) {
945
        if (protocol < 0x200) {
946
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
947
            exit(1);
948
        }
949

    
950
        fi = fopen(initrd_filename, "rb");
951
        if (!fi) {
952
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
953
                    initrd_filename);
954
            exit(1);
955
        }
956

    
957
        initrd_size = get_file_size(fi);
958
        initrd_addr = (initrd_max-initrd_size) & ~4095;
959

    
960
        if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
961
            fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
962
                    initrd_filename);
963
            exit(1);
964
        }
965
        fclose(fi);
966

    
967
        stl_p(header+0x218, initrd_addr);
968
        stl_p(header+0x21c, initrd_size);
969
    }
970

    
971
    /* store the finalized header and load the rest of the kernel */
972
    cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header));
973

    
974
    setup_size = header[0x1f1];
975
    if (setup_size == 0)
976
        setup_size = 4;
977

    
978
    setup_size = (setup_size+1)*512;
979
    /* Size of protected-mode code */
980
    kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header);
981

    
982
    /* In case we have read too much already, copy that over */
983
    if (setup_size < ARRAY_SIZE(header)) {
984
        cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size);
985
        prot_addr += (ARRAY_SIZE(header) - setup_size);
986
        setup_size = ARRAY_SIZE(header);
987
    }
988

    
989
    if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
990
                           setup_size - ARRAY_SIZE(header), f) ||
991
        !fread_targphys_ok(prot_addr, kernel_size, f)) {
992
        fprintf(stderr, "qemu: read error on kernel '%s'\n",
993
                kernel_filename);
994
        exit(1);
995
    }
996
    fclose(f);
997

    
998
    /* generate bootsector to set up the initial register state */
999
    real_seg = real_addr >> 4;
1000
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
1001
    seg[1] = real_seg+0x20;        /* CS */
1002
    memset(gpr, 0, sizeof gpr);
1003
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
1004

    
1005
    option_rom_setup_reset(real_addr, setup_size);
1006
    option_rom_setup_reset(prot_addr, kernel_size);
1007
    option_rom_setup_reset(cmdline_addr, cmdline_size);
1008
    if (initrd_filename)
1009
        option_rom_setup_reset(initrd_addr, initrd_size);
1010

    
1011
    generate_bootsect(option_rom, gpr, seg, 0);
1012
}
1013

    
1014
static const int ide_iobase[2] = { 0x1f0, 0x170 };
1015
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
1016
static const int ide_irq[2] = { 14, 15 };
1017

    
1018
#define NE2000_NB_MAX 6
1019

    
1020
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
1021
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
1022

    
1023
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1024
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
1025

    
1026
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
1027
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
1028

    
1029
#ifdef HAS_AUDIO
1030
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
1031
{
1032
    struct soundhw *c;
1033

    
1034
    for (c = soundhw; c->name; ++c) {
1035
        if (c->enabled) {
1036
            if (c->isa) {
1037
                c->init.init_isa(pic);
1038
            } else {
1039
                if (pci_bus) {
1040
                    c->init.init_pci(pci_bus);
1041
                }
1042
            }
1043
        }
1044
    }
1045
}
1046
#endif
1047

    
1048
static void pc_init_ne2k_isa(NICInfo *nd)
1049
{
1050
    static int nb_ne2k = 0;
1051

    
1052
    if (nb_ne2k == NE2000_NB_MAX)
1053
        return;
1054
    isa_ne2000_init(ne2000_io[nb_ne2k],
1055
                    isa_reserve_irq(ne2000_irq[nb_ne2k]), nd);
1056
    nb_ne2k++;
1057
}
1058

    
1059
static int load_option_rom(const char *oprom, target_phys_addr_t start,
1060
                           target_phys_addr_t end)
1061
{
1062
    int size;
1063
    char *filename;
1064

    
1065
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom);
1066
    if (filename) {
1067
        size = get_image_size(filename);
1068
        if (size > 0 && start + size > end) {
1069
            fprintf(stderr, "Not enough space to load option rom '%s'\n",
1070
                    oprom);
1071
            exit(1);
1072
        }
1073
        size = load_image_targphys(filename, start, end - start);
1074
        qemu_free(filename);
1075
    } else {
1076
        size = -1;
1077
    }
1078
    if (size < 0) {
1079
        fprintf(stderr, "Could not load option rom '%s'\n", oprom);
1080
        exit(1);
1081
    }
1082
    /* Round up optiom rom size to the next 2k boundary */
1083
    size = (size + 2047) & ~2047;
1084
    option_rom_setup_reset(start, size);
1085
    return size;
1086
}
1087

    
1088
int cpu_is_bsp(CPUState *env)
1089
{
1090
    return env->cpuid_apic_id == 0;
1091
}
1092

    
1093
static CPUState *pc_new_cpu(const char *cpu_model)
1094
{
1095
    CPUState *env;
1096

    
1097
    env = cpu_init(cpu_model);
1098
    if (!env) {
1099
        fprintf(stderr, "Unable to find x86 CPU definition\n");
1100
        exit(1);
1101
    }
1102
    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1103
        env->cpuid_apic_id = env->cpu_index;
1104
        /* APIC reset callback resets cpu */
1105
        apic_init(env);
1106
    } else {
1107
        qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1108
    }
1109
    return env;
1110
}
1111

    
1112
/* PC hardware initialisation */
1113
static void pc_init1(ram_addr_t ram_size,
1114
                     const char *boot_device,
1115
                     const char *kernel_filename,
1116
                     const char *kernel_cmdline,
1117
                     const char *initrd_filename,
1118
                     const char *cpu_model,
1119
                     int pci_enabled)
1120
{
1121
    char *filename;
1122
    int ret, linux_boot, i;
1123
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
1124
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1125
    int bios_size, isa_bios_size, oprom_area_size;
1126
    PCIBus *pci_bus;
1127
    ISADevice *isa_dev;
1128
    int piix3_devfn = -1;
1129
    CPUState *env;
1130
    qemu_irq *cpu_irq;
1131
    qemu_irq *isa_irq;
1132
    qemu_irq *i8259;
1133
    IsaIrqState *isa_irq_state;
1134
    DriveInfo *dinfo;
1135
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1136
    BlockDriverState *fd[MAX_FD];
1137
    int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
1138
    void *fw_cfg;
1139

    
1140
    if (ram_size >= 0xe0000000 ) {
1141
        above_4g_mem_size = ram_size - 0xe0000000;
1142
        below_4g_mem_size = 0xe0000000;
1143
    } else {
1144
        below_4g_mem_size = ram_size;
1145
    }
1146

    
1147
    linux_boot = (kernel_filename != NULL);
1148

    
1149
    /* init CPUs */
1150
    if (cpu_model == NULL) {
1151
#ifdef TARGET_X86_64
1152
        cpu_model = "qemu64";
1153
#else
1154
        cpu_model = "qemu32";
1155
#endif
1156
    }
1157

    
1158
    for (i = 0; i < smp_cpus; i++) {
1159
        env = pc_new_cpu(cpu_model);
1160
    }
1161

    
1162
    vmport_init();
1163

    
1164
    /* allocate RAM */
1165
    ram_addr = qemu_ram_alloc(0xa0000);
1166
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
1167

    
1168
    /* Allocate, even though we won't register, so we don't break the
1169
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1170
     * and some bios areas, which will be registered later
1171
     */
1172
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1173
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1174
    cpu_register_physical_memory(0x100000,
1175
                 below_4g_mem_size - 0x100000,
1176
                 ram_addr);
1177

    
1178
    /* above 4giga memory allocation */
1179
    if (above_4g_mem_size > 0) {
1180
#if TARGET_PHYS_ADDR_BITS == 32
1181
        hw_error("To much RAM for 32-bit physical address");
1182
#else
1183
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
1184
        cpu_register_physical_memory(0x100000000ULL,
1185
                                     above_4g_mem_size,
1186
                                     ram_addr);
1187
#endif
1188
    }
1189

    
1190

    
1191
    /* BIOS load */
1192
    if (bios_name == NULL)
1193
        bios_name = BIOS_FILENAME;
1194
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1195
    if (filename) {
1196
        bios_size = get_image_size(filename);
1197
    } else {
1198
        bios_size = -1;
1199
    }
1200
    if (bios_size <= 0 ||
1201
        (bios_size % 65536) != 0) {
1202
        goto bios_error;
1203
    }
1204
    bios_offset = qemu_ram_alloc(bios_size);
1205
    ret = load_image(filename, qemu_get_ram_ptr(bios_offset));
1206
    if (ret != bios_size) {
1207
    bios_error:
1208
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1209
        exit(1);
1210
    }
1211
    if (filename) {
1212
        qemu_free(filename);
1213
    }
1214
    /* map the last 128KB of the BIOS in ISA space */
1215
    isa_bios_size = bios_size;
1216
    if (isa_bios_size > (128 * 1024))
1217
        isa_bios_size = 128 * 1024;
1218
    cpu_register_physical_memory(0x100000 - isa_bios_size,
1219
                                 isa_bios_size,
1220
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1221

    
1222

    
1223

    
1224
    option_rom_offset = qemu_ram_alloc(0x20000);
1225
    oprom_area_size = 0;
1226
    cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
1227

    
1228
    if (using_vga) {
1229
        const char *vgabios_filename;
1230
        /* VGA BIOS load */
1231
        if (cirrus_vga_enabled) {
1232
            vgabios_filename = VGABIOS_CIRRUS_FILENAME;
1233
        } else {
1234
            vgabios_filename = VGABIOS_FILENAME;
1235
        }
1236
        oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000);
1237
    }
1238
    /* Although video roms can grow larger than 0x8000, the area between
1239
     * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
1240
     * for any other kind of option rom inside this area */
1241
    if (oprom_area_size < 0x8000)
1242
        oprom_area_size = 0x8000;
1243

    
1244
    /* map all the bios at the top of memory */
1245
    cpu_register_physical_memory((uint32_t)(-bios_size),
1246
                                 bios_size, bios_offset | IO_MEM_ROM);
1247

    
1248
    fw_cfg = bochs_bios_init();
1249

    
1250
    if (linux_boot) {
1251
        load_linux(fw_cfg, 0xc0000 + oprom_area_size,
1252
                   kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1253
        oprom_area_size += 2048;
1254
    }
1255

    
1256
    for (i = 0; i < nb_option_roms; i++) {
1257
        oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
1258
                                           0xe0000);
1259
    }
1260

    
1261
    for (i = 0; i < nb_nics; i++) {
1262
        char nic_oprom[1024];
1263
        const char *model = nd_table[i].model;
1264

    
1265
        if (!nd_table[i].bootable)
1266
            continue;
1267

    
1268
        if (model == NULL)
1269
            model = "e1000";
1270
        snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
1271

    
1272
        oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
1273
                                           0xe0000);
1274
    }
1275

    
1276
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1277
    i8259 = i8259_init(cpu_irq[0]);
1278
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1279
    isa_irq_state->i8259 = i8259;
1280
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1281

    
1282
    if (pci_enabled) {
1283
        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1284
    } else {
1285
        pci_bus = NULL;
1286
        isa_bus_new(NULL);
1287
    }
1288
    isa_bus_irqs(isa_irq);
1289

    
1290
    ferr_irq = isa_reserve_irq(13);
1291

    
1292
    /* init basic PC hardware */
1293
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1294

    
1295
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1296

    
1297
    if (cirrus_vga_enabled) {
1298
        if (pci_enabled) {
1299
            pci_cirrus_vga_init(pci_bus);
1300
        } else {
1301
            isa_cirrus_vga_init();
1302
        }
1303
    } else if (vmsvga_enabled) {
1304
        if (pci_enabled)
1305
            pci_vmsvga_init(pci_bus);
1306
        else
1307
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1308
    } else if (std_vga_enabled) {
1309
        if (pci_enabled) {
1310
            pci_vga_init(pci_bus, 0, 0);
1311
        } else {
1312
            isa_vga_init();
1313
        }
1314
    }
1315

    
1316
    rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
1317

    
1318
    qemu_register_boot_set(pc_boot_set, rtc_state);
1319

    
1320
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1321
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1322

    
1323
    if (pci_enabled) {
1324
        isa_irq_state->ioapic = ioapic_init();
1325
    }
1326
    pit = pit_init(0x40, isa_reserve_irq(0));
1327
    pcspk_init(pit);
1328
    if (!no_hpet) {
1329
        hpet_init(isa_irq);
1330
    }
1331

    
1332
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1333
        if (serial_hds[i]) {
1334
            serial_init(serial_io[i], isa_reserve_irq(serial_irq[i]), 115200,
1335
                        serial_hds[i]);
1336
        }
1337
    }
1338

    
1339
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1340
        if (parallel_hds[i]) {
1341
            parallel_init(parallel_io[i], isa_reserve_irq(parallel_irq[i]),
1342
                          parallel_hds[i]);
1343
        }
1344
    }
1345

    
1346
    for(i = 0; i < nb_nics; i++) {
1347
        NICInfo *nd = &nd_table[i];
1348

    
1349
        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1350
            pc_init_ne2k_isa(nd);
1351
        else
1352
            pci_nic_init(nd, "e1000", NULL);
1353
    }
1354

    
1355
    piix4_acpi_system_hot_add_init();
1356

    
1357
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1358
        fprintf(stderr, "qemu: too many IDE bus\n");
1359
        exit(1);
1360
    }
1361

    
1362
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1363
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1364
    }
1365

    
1366
    if (pci_enabled) {
1367
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1368
    } else {
1369
        for(i = 0; i < MAX_IDE_BUS; i++) {
1370
            isa_ide_init(ide_iobase[i], ide_iobase2[i],
1371
                         isa_reserve_irq(ide_irq[i]),
1372
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1373
        }
1374
    }
1375

    
1376
    isa_dev = isa_create_simple("i8042", 1, 12);
1377
    DMA_init(0);
1378
#ifdef HAS_AUDIO
1379
    audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1380
#endif
1381

    
1382
    for(i = 0; i < MAX_FD; i++) {
1383
        dinfo = drive_get(IF_FLOPPY, 0, i);
1384
        fd[i] = dinfo ? dinfo->bdrv : NULL;
1385
    }
1386
    floppy_controller = fdctrl_init_isa(fd);
1387

    
1388
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1389

    
1390
    if (pci_enabled && usb_enabled) {
1391
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1392
    }
1393

    
1394
    if (pci_enabled && acpi_enabled) {
1395
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1396
        i2c_bus *smbus;
1397

    
1398
        /* TODO: Populate SPD eeprom data.  */
1399
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1400
                              isa_reserve_irq(9));
1401
        for (i = 0; i < 8; i++) {
1402
            DeviceState *eeprom;
1403
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1404
            qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
1405
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1406
            qdev_init(eeprom);
1407
        }
1408
    }
1409

    
1410
    if (i440fx_state) {
1411
        i440fx_init_memory_mappings(i440fx_state);
1412
    }
1413

    
1414
    if (pci_enabled) {
1415
        int max_bus;
1416
        int bus;
1417

    
1418
        max_bus = drive_get_max_bus(IF_SCSI);
1419
        for (bus = 0; bus <= max_bus; bus++) {
1420
            pci_create_simple(pci_bus, -1, "lsi53c895a");
1421
        }
1422
    }
1423

    
1424
    /* Add virtio console devices */
1425
    if (pci_enabled) {
1426
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1427
            if (virtcon_hds[i]) {
1428
                pci_create_simple(pci_bus, -1, "virtio-console-pci");
1429
            }
1430
        }
1431
    }
1432
}
1433

    
1434
static void pc_init_pci(ram_addr_t ram_size,
1435
                        const char *boot_device,
1436
                        const char *kernel_filename,
1437
                        const char *kernel_cmdline,
1438
                        const char *initrd_filename,
1439
                        const char *cpu_model)
1440
{
1441
    pc_init1(ram_size, boot_device,
1442
             kernel_filename, kernel_cmdline,
1443
             initrd_filename, cpu_model, 1);
1444
}
1445

    
1446
static void pc_init_isa(ram_addr_t ram_size,
1447
                        const char *boot_device,
1448
                        const char *kernel_filename,
1449
                        const char *kernel_cmdline,
1450
                        const char *initrd_filename,
1451
                        const char *cpu_model)
1452
{
1453
    if (cpu_model == NULL)
1454
        cpu_model = "486";
1455
    pc_init1(ram_size, boot_device,
1456
             kernel_filename, kernel_cmdline,
1457
             initrd_filename, cpu_model, 0);
1458
}
1459

    
1460
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1461
   BIOS will read it and start S3 resume at POST Entry */
1462
void cmos_set_s3_resume(void)
1463
{
1464
    if (rtc_state)
1465
        rtc_set_memory(rtc_state, 0xF, 0xFE);
1466
}
1467

    
1468
static QEMUMachine pc_machine = {
1469
    .name = "pc-0.11",
1470
    .alias = "pc",
1471
    .desc = "Standard PC",
1472
    .init = pc_init_pci,
1473
    .max_cpus = 255,
1474
    .is_default = 1,
1475
};
1476

    
1477
static QEMUMachine pc_machine_v0_10 = {
1478
    .name = "pc-0.10",
1479
    .desc = "Standard PC, qemu 0.10",
1480
    .init = pc_init_pci,
1481
    .max_cpus = 255,
1482
    .compat_props = (CompatProperty[]) {
1483
        {
1484
            .driver   = "virtio-blk-pci",
1485
            .property = "class",
1486
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1487
        },{
1488
            .driver   = "virtio-console-pci",
1489
            .property = "class",
1490
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1491
        },{
1492
            .driver   = "virtio-net-pci",
1493
            .property = "vectors",
1494
            .value    = stringify(0),
1495
        },{
1496
            .driver   = "virtio-blk-pci",
1497
            .property = "vectors",
1498
            .value    = stringify(0),
1499
        },
1500
        { /* end of list */ }
1501
    },
1502
};
1503

    
1504
static QEMUMachine isapc_machine = {
1505
    .name = "isapc",
1506
    .desc = "ISA-only PC",
1507
    .init = pc_init_isa,
1508
    .max_cpus = 1,
1509
};
1510

    
1511
static void pc_machine_init(void)
1512
{
1513
    qemu_register_machine(&pc_machine);
1514
    qemu_register_machine(&pc_machine_v0_10);
1515
    qemu_register_machine(&isapc_machine);
1516
}
1517

    
1518
machine_init(pc_machine_init);