Revision 872929aa target-i386/translate.c
| b/target-i386/translate.c | ||
|---|---|---|
| 733 | 733 |
tcg_gen_helper_0_1(gen_check_io_func[ot], |
| 734 | 734 |
cpu_tmp2_i32); |
| 735 | 735 |
} |
| 736 |
if(s->flags & (1ULL << INTERCEPT_IOIO_PROT)) {
|
|
| 736 |
if(s->flags & HF_SVMI_MASK) {
|
|
| 737 | 737 |
if (!state_saved) {
|
| 738 | 738 |
if (s->cc_op != CC_OP_DYNAMIC) |
| 739 | 739 |
gen_op_set_cc_op(s->cc_op); |
| ... | ... | |
| 2322 | 2322 |
return ((prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) ? 8 : 0); |
| 2323 | 2323 |
} |
| 2324 | 2324 |
|
| 2325 |
static inline int
|
|
| 2325 |
static inline void
|
|
| 2326 | 2326 |
gen_svm_check_intercept_param(DisasContext *s, target_ulong pc_start, |
| 2327 | 2327 |
uint32_t type, uint64_t param) |
| 2328 | 2328 |
{
|
| 2329 |
if(!(s->flags & (INTERCEPT_SVM_MASK))) |
|
| 2330 |
/* no SVM activated */ |
|
| 2331 |
return 0; |
|
| 2332 |
switch(type) {
|
|
| 2333 |
/* CRx and DRx reads/writes */ |
|
| 2334 |
case SVM_EXIT_READ_CR0 ... SVM_EXIT_EXCP_BASE - 1: |
|
| 2335 |
if (s->cc_op != CC_OP_DYNAMIC) {
|
|
| 2336 |
gen_op_set_cc_op(s->cc_op); |
|
| 2337 |
} |
|
| 2338 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 2339 |
tcg_gen_helper_0_2(helper_svm_check_intercept_param, |
|
| 2340 |
tcg_const_i32(type), tcg_const_i64(param)); |
|
| 2341 |
/* this is a special case as we do not know if the interception occurs |
|
| 2342 |
so we assume there was none */ |
|
| 2343 |
return 0; |
|
| 2344 |
case SVM_EXIT_MSR: |
|
| 2345 |
if(s->flags & (1ULL << INTERCEPT_MSR_PROT)) {
|
|
| 2346 |
if (s->cc_op != CC_OP_DYNAMIC) {
|
|
| 2347 |
gen_op_set_cc_op(s->cc_op); |
|
| 2348 |
} |
|
| 2349 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 2350 |
tcg_gen_helper_0_2(helper_svm_check_intercept_param, |
|
| 2351 |
tcg_const_i32(type), tcg_const_i64(param)); |
|
| 2352 |
/* this is a special case as we do not know if the interception occurs |
|
| 2353 |
so we assume there was none */ |
|
| 2354 |
return 0; |
|
| 2355 |
} |
|
| 2356 |
break; |
|
| 2357 |
default: |
|
| 2358 |
if(s->flags & (1ULL << ((type - SVM_EXIT_INTR) + INTERCEPT_INTR))) {
|
|
| 2359 |
if (s->cc_op != CC_OP_DYNAMIC) {
|
|
| 2360 |
gen_op_set_cc_op(s->cc_op); |
|
| 2361 |
} |
|
| 2362 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 2363 |
tcg_gen_helper_0_2(helper_vmexit, |
|
| 2364 |
tcg_const_i32(type), tcg_const_i64(param)); |
|
| 2365 |
/* we can optimize this one so TBs don't get longer |
|
| 2366 |
than up to vmexit */ |
|
| 2367 |
gen_eob(s); |
|
| 2368 |
return 1; |
|
| 2369 |
} |
|
| 2370 |
} |
|
| 2371 |
return 0; |
|
| 2329 |
/* no SVM activated; fast case */ |
|
| 2330 |
if (likely(!(s->flags & HF_SVMI_MASK))) |
|
| 2331 |
return; |
|
| 2332 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 2333 |
gen_op_set_cc_op(s->cc_op); |
|
| 2334 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 2335 |
tcg_gen_helper_0_2(helper_svm_check_intercept_param, |
|
| 2336 |
tcg_const_i32(type), tcg_const_i64(param)); |
|
| 2372 | 2337 |
} |
| 2373 | 2338 |
|
| 2374 |
static inline int
|
|
| 2339 |
static inline void
|
|
| 2375 | 2340 |
gen_svm_check_intercept(DisasContext *s, target_ulong pc_start, uint64_t type) |
| 2376 | 2341 |
{
|
| 2377 |
return gen_svm_check_intercept_param(s, pc_start, type, 0);
|
|
| 2342 |
gen_svm_check_intercept_param(s, pc_start, type, 0); |
|
| 2378 | 2343 |
} |
| 2379 | 2344 |
|
| 2380 | 2345 |
static inline void gen_stack_update(DisasContext *s, int addend) |
| ... | ... | |
| 5743 | 5708 |
val = 0; |
| 5744 | 5709 |
goto do_lret; |
| 5745 | 5710 |
case 0xcf: /* iret */ |
| 5746 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET)) |
|
| 5747 |
break; |
|
| 5711 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET); |
|
| 5748 | 5712 |
if (!s->pe) {
|
| 5749 | 5713 |
/* real mode */ |
| 5750 | 5714 |
tcg_gen_helper_0_1(helper_iret_real, tcg_const_i32(s->dflag)); |
| ... | ... | |
| 5890 | 5854 |
/************************/ |
| 5891 | 5855 |
/* flags */ |
| 5892 | 5856 |
case 0x9c: /* pushf */ |
| 5893 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF)) |
|
| 5894 |
break; |
|
| 5857 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF); |
|
| 5895 | 5858 |
if (s->vm86 && s->iopl != 3) {
|
| 5896 | 5859 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 5897 | 5860 |
} else {
|
| ... | ... | |
| 5902 | 5865 |
} |
| 5903 | 5866 |
break; |
| 5904 | 5867 |
case 0x9d: /* popf */ |
| 5905 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF)) |
|
| 5906 |
break; |
|
| 5868 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF); |
|
| 5907 | 5869 |
if (s->vm86 && s->iopl != 3) {
|
| 5908 | 5870 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 5909 | 5871 |
} else {
|
| ... | ... | |
| 6187 | 6149 |
} |
| 6188 | 6150 |
break; |
| 6189 | 6151 |
case 0xcc: /* int3 */ |
| 6190 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) |
|
| 6191 |
break; |
|
| 6192 | 6152 |
gen_interrupt(s, EXCP03_INT3, pc_start - s->cs_base, s->pc - s->cs_base); |
| 6193 | 6153 |
break; |
| 6194 | 6154 |
case 0xcd: /* int N */ |
| 6195 | 6155 |
val = ldub_code(s->pc++); |
| 6196 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) |
|
| 6197 |
break; |
|
| 6198 | 6156 |
if (s->vm86 && s->iopl != 3) {
|
| 6199 | 6157 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6200 | 6158 |
} else {
|
| ... | ... | |
| 6204 | 6162 |
case 0xce: /* into */ |
| 6205 | 6163 |
if (CODE64(s)) |
| 6206 | 6164 |
goto illegal_op; |
| 6207 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SWINT)) |
|
| 6208 |
break; |
|
| 6209 | 6165 |
if (s->cc_op != CC_OP_DYNAMIC) |
| 6210 | 6166 |
gen_op_set_cc_op(s->cc_op); |
| 6211 | 6167 |
gen_jmp_im(pc_start - s->cs_base); |
| 6212 | 6168 |
tcg_gen_helper_0_1(helper_into, tcg_const_i32(s->pc - pc_start)); |
| 6213 | 6169 |
break; |
| 6214 | 6170 |
case 0xf1: /* icebp (undocumented, exits to external debugger) */ |
| 6215 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_ICEBP)) |
|
| 6216 |
break; |
|
| 6171 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_ICEBP); |
|
| 6217 | 6172 |
#if 1 |
| 6218 | 6173 |
gen_debug(s, pc_start - s->cs_base); |
| 6219 | 6174 |
#else |
| ... | ... | |
| 6371 | 6326 |
if (s->cpl != 0) {
|
| 6372 | 6327 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6373 | 6328 |
} else {
|
| 6374 |
int retval = 0; |
|
| 6329 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 6330 |
gen_op_set_cc_op(s->cc_op); |
|
| 6331 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 6375 | 6332 |
if (b & 2) {
|
| 6376 |
retval = gen_svm_check_intercept_param(s, pc_start, SVM_EXIT_MSR, 0); |
|
| 6377 | 6333 |
tcg_gen_helper_0_0(helper_rdmsr); |
| 6378 | 6334 |
} else {
|
| 6379 |
retval = gen_svm_check_intercept_param(s, pc_start, SVM_EXIT_MSR, 1); |
|
| 6380 | 6335 |
tcg_gen_helper_0_0(helper_wrmsr); |
| 6381 | 6336 |
} |
| 6382 |
if(retval) |
|
| 6383 |
gen_eob(s); |
|
| 6384 | 6337 |
} |
| 6385 | 6338 |
break; |
| 6386 | 6339 |
case 0x131: /* rdtsc */ |
| 6387 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_RDTSC))
|
|
| 6388 |
break;
|
|
| 6340 |
if (s->cc_op != CC_OP_DYNAMIC)
|
|
| 6341 |
gen_op_set_cc_op(s->cc_op);
|
|
| 6389 | 6342 |
gen_jmp_im(pc_start - s->cs_base); |
| 6390 | 6343 |
tcg_gen_helper_0_0(helper_rdtsc); |
| 6391 | 6344 |
break; |
| 6392 | 6345 |
case 0x133: /* rdpmc */ |
| 6346 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 6347 |
gen_op_set_cc_op(s->cc_op); |
|
| 6393 | 6348 |
gen_jmp_im(pc_start - s->cs_base); |
| 6394 | 6349 |
tcg_gen_helper_0_0(helper_rdpmc); |
| 6395 | 6350 |
break; |
| ... | ... | |
| 6452 | 6407 |
break; |
| 6453 | 6408 |
#endif |
| 6454 | 6409 |
case 0x1a2: /* cpuid */ |
| 6455 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_CPUID)) |
|
| 6456 |
break; |
|
| 6457 | 6410 |
tcg_gen_helper_0_0(helper_cpuid); |
| 6458 | 6411 |
break; |
| 6459 | 6412 |
case 0xf4: /* hlt */ |
| 6460 | 6413 |
if (s->cpl != 0) {
|
| 6461 | 6414 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6462 | 6415 |
} else {
|
| 6463 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_HLT)) |
|
| 6464 |
break; |
|
| 6465 | 6416 |
if (s->cc_op != CC_OP_DYNAMIC) |
| 6466 | 6417 |
gen_op_set_cc_op(s->cc_op); |
| 6467 | 6418 |
gen_jmp_im(s->pc - s->cs_base); |
| ... | ... | |
| 6477 | 6428 |
case 0: /* sldt */ |
| 6478 | 6429 |
if (!s->pe || s->vm86) |
| 6479 | 6430 |
goto illegal_op; |
| 6480 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ)) |
|
| 6481 |
break; |
|
| 6431 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ); |
|
| 6482 | 6432 |
tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,ldt.selector)); |
| 6483 | 6433 |
ot = OT_WORD; |
| 6484 | 6434 |
if (mod == 3) |
| ... | ... | |
| 6491 | 6441 |
if (s->cpl != 0) {
|
| 6492 | 6442 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6493 | 6443 |
} else {
|
| 6494 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE)) |
|
| 6495 |
break; |
|
| 6444 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE); |
|
| 6496 | 6445 |
gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); |
| 6497 | 6446 |
gen_jmp_im(pc_start - s->cs_base); |
| 6498 | 6447 |
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); |
| ... | ... | |
| 6502 | 6451 |
case 1: /* str */ |
| 6503 | 6452 |
if (!s->pe || s->vm86) |
| 6504 | 6453 |
goto illegal_op; |
| 6505 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ)) |
|
| 6506 |
break; |
|
| 6454 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ); |
|
| 6507 | 6455 |
tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,tr.selector)); |
| 6508 | 6456 |
ot = OT_WORD; |
| 6509 | 6457 |
if (mod == 3) |
| ... | ... | |
| 6516 | 6464 |
if (s->cpl != 0) {
|
| 6517 | 6465 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6518 | 6466 |
} else {
|
| 6519 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE)) |
|
| 6520 |
break; |
|
| 6467 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE); |
|
| 6521 | 6468 |
gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); |
| 6522 | 6469 |
gen_jmp_im(pc_start - s->cs_base); |
| 6523 | 6470 |
tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); |
| ... | ... | |
| 6550 | 6497 |
case 0: /* sgdt */ |
| 6551 | 6498 |
if (mod == 3) |
| 6552 | 6499 |
goto illegal_op; |
| 6553 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_READ)) |
|
| 6554 |
break; |
|
| 6500 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_READ); |
|
| 6555 | 6501 |
gen_lea_modrm(s, modrm, ®_addr, &offset_addr); |
| 6556 | 6502 |
tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, gdt.limit)); |
| 6557 | 6503 |
gen_op_st_T0_A0(OT_WORD + s->mem_index); |
| ... | ... | |
| 6568 | 6514 |
if (!(s->cpuid_ext_features & CPUID_EXT_MONITOR) || |
| 6569 | 6515 |
s->cpl != 0) |
| 6570 | 6516 |
goto illegal_op; |
| 6571 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_MONITOR)) |
|
| 6572 |
break; |
|
| 6573 | 6517 |
gen_jmp_im(pc_start - s->cs_base); |
| 6574 | 6518 |
#ifdef TARGET_X86_64 |
| 6575 | 6519 |
if (s->aflag == 2) {
|
| ... | ... | |
| 6592 | 6536 |
gen_op_set_cc_op(s->cc_op); |
| 6593 | 6537 |
s->cc_op = CC_OP_DYNAMIC; |
| 6594 | 6538 |
} |
| 6595 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_MWAIT)) |
|
| 6596 |
break; |
|
| 6597 | 6539 |
gen_jmp_im(s->pc - s->cs_base); |
| 6598 | 6540 |
tcg_gen_helper_0_0(helper_mwait); |
| 6599 | 6541 |
gen_eob(s); |
| ... | ... | |
| 6602 | 6544 |
goto illegal_op; |
| 6603 | 6545 |
} |
| 6604 | 6546 |
} else { /* sidt */
|
| 6605 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_READ)) |
|
| 6606 |
break; |
|
| 6547 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_READ); |
|
| 6607 | 6548 |
gen_lea_modrm(s, modrm, ®_addr, &offset_addr); |
| 6608 | 6549 |
tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, idt.limit)); |
| 6609 | 6550 |
gen_op_st_T0_A0(OT_WORD + s->mem_index); |
| ... | ... | |
| 6617 | 6558 |
case 2: /* lgdt */ |
| 6618 | 6559 |
case 3: /* lidt */ |
| 6619 | 6560 |
if (mod == 3) {
|
| 6561 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 6562 |
gen_op_set_cc_op(s->cc_op); |
|
| 6563 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 6620 | 6564 |
switch(rm) {
|
| 6621 | 6565 |
case 0: /* VMRUN */ |
| 6622 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMRUN)) |
|
| 6566 |
if (!(s->flags & HF_SVME_MASK) || !s->pe) |
|
| 6567 |
goto illegal_op; |
|
| 6568 |
if (s->cpl != 0) {
|
|
| 6569 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6623 | 6570 |
break; |
| 6624 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 6625 |
gen_op_set_cc_op(s->cc_op); |
|
| 6626 |
gen_jmp_im(s->pc - s->cs_base); |
|
| 6627 |
tcg_gen_helper_0_0(helper_vmrun); |
|
| 6628 |
s->cc_op = CC_OP_EFLAGS; |
|
| 6629 |
gen_eob(s); |
|
| 6571 |
} else {
|
|
| 6572 |
tcg_gen_helper_0_0(helper_vmrun); |
|
| 6573 |
s->cc_op = CC_OP_EFLAGS; |
|
| 6574 |
gen_eob(s); |
|
| 6575 |
} |
|
| 6630 | 6576 |
break; |
| 6631 | 6577 |
case 1: /* VMMCALL */ |
| 6632 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMMCALL)) |
|
| 6633 |
break; |
|
| 6634 |
/* FIXME: cause #UD if hflags & SVM */ |
|
| 6578 |
if (!(s->flags & HF_SVME_MASK)) |
|
| 6579 |
goto illegal_op; |
|
| 6635 | 6580 |
tcg_gen_helper_0_0(helper_vmmcall); |
| 6636 | 6581 |
break; |
| 6637 | 6582 |
case 2: /* VMLOAD */ |
| 6638 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMLOAD)) |
|
| 6639 |
break; |
|
| 6640 |
tcg_gen_helper_0_0(helper_vmload); |
|
| 6583 |
if (!(s->flags & HF_SVME_MASK) || !s->pe) |
|
| 6584 |
goto illegal_op; |
|
| 6585 |
if (s->cpl != 0) {
|
|
| 6586 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6587 |
break; |
|
| 6588 |
} else {
|
|
| 6589 |
tcg_gen_helper_0_0(helper_vmload); |
|
| 6590 |
} |
|
| 6641 | 6591 |
break; |
| 6642 | 6592 |
case 3: /* VMSAVE */ |
| 6643 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_VMSAVE)) |
|
| 6644 |
break; |
|
| 6645 |
tcg_gen_helper_0_0(helper_vmsave); |
|
| 6593 |
if (!(s->flags & HF_SVME_MASK) || !s->pe) |
|
| 6594 |
goto illegal_op; |
|
| 6595 |
if (s->cpl != 0) {
|
|
| 6596 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6597 |
break; |
|
| 6598 |
} else {
|
|
| 6599 |
tcg_gen_helper_0_0(helper_vmsave); |
|
| 6600 |
} |
|
| 6646 | 6601 |
break; |
| 6647 | 6602 |
case 4: /* STGI */ |
| 6648 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_STGI)) |
|
| 6649 |
break; |
|
| 6650 |
tcg_gen_helper_0_0(helper_stgi); |
|
| 6603 |
if ((!(s->flags & HF_SVME_MASK) && |
|
| 6604 |
!(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) || |
|
| 6605 |
!s->pe) |
|
| 6606 |
goto illegal_op; |
|
| 6607 |
if (s->cpl != 0) {
|
|
| 6608 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6609 |
break; |
|
| 6610 |
} else {
|
|
| 6611 |
tcg_gen_helper_0_0(helper_stgi); |
|
| 6612 |
} |
|
| 6651 | 6613 |
break; |
| 6652 | 6614 |
case 5: /* CLGI */ |
| 6653 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_CLGI)) |
|
| 6654 |
break; |
|
| 6655 |
tcg_gen_helper_0_0(helper_clgi); |
|
| 6615 |
if (!(s->flags & HF_SVME_MASK) || !s->pe) |
|
| 6616 |
goto illegal_op; |
|
| 6617 |
if (s->cpl != 0) {
|
|
| 6618 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6619 |
break; |
|
| 6620 |
} else {
|
|
| 6621 |
tcg_gen_helper_0_0(helper_clgi); |
|
| 6622 |
} |
|
| 6656 | 6623 |
break; |
| 6657 | 6624 |
case 6: /* SKINIT */ |
| 6658 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_SKINIT)) |
|
| 6659 |
break; |
|
| 6625 |
if ((!(s->flags & HF_SVME_MASK) && |
|
| 6626 |
!(s->cpuid_ext3_features & CPUID_EXT3_SKINIT)) || |
|
| 6627 |
!s->pe) |
|
| 6628 |
goto illegal_op; |
|
| 6660 | 6629 |
tcg_gen_helper_0_0(helper_skinit); |
| 6661 | 6630 |
break; |
| 6662 | 6631 |
case 7: /* INVLPGA */ |
| 6663 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_INVLPGA)) |
|
| 6664 |
break; |
|
| 6665 |
tcg_gen_helper_0_0(helper_invlpga); |
|
| 6632 |
if (!(s->flags & HF_SVME_MASK) || !s->pe) |
|
| 6633 |
goto illegal_op; |
|
| 6634 |
if (s->cpl != 0) {
|
|
| 6635 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
|
| 6636 |
break; |
|
| 6637 |
} else {
|
|
| 6638 |
tcg_gen_helper_0_0(helper_invlpga); |
|
| 6639 |
} |
|
| 6666 | 6640 |
break; |
| 6667 | 6641 |
default: |
| 6668 | 6642 |
goto illegal_op; |
| ... | ... | |
| 6670 | 6644 |
} else if (s->cpl != 0) {
|
| 6671 | 6645 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6672 | 6646 |
} else {
|
| 6673 |
if (gen_svm_check_intercept(s, pc_start, |
|
| 6674 |
op==2 ? SVM_EXIT_GDTR_WRITE : SVM_EXIT_IDTR_WRITE)) |
|
| 6675 |
break; |
|
| 6647 |
gen_svm_check_intercept(s, pc_start, |
|
| 6648 |
op==2 ? SVM_EXIT_GDTR_WRITE : SVM_EXIT_IDTR_WRITE); |
|
| 6676 | 6649 |
gen_lea_modrm(s, modrm, ®_addr, &offset_addr); |
| 6677 | 6650 |
gen_op_ld_T1_A0(OT_WORD + s->mem_index); |
| 6678 | 6651 |
gen_add_A0_im(s, 2); |
| ... | ... | |
| 6689 | 6662 |
} |
| 6690 | 6663 |
break; |
| 6691 | 6664 |
case 4: /* smsw */ |
| 6692 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0)) |
|
| 6693 |
break; |
|
| 6665 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0); |
|
| 6694 | 6666 |
tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0])); |
| 6695 | 6667 |
gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 1); |
| 6696 | 6668 |
break; |
| ... | ... | |
| 6698 | 6670 |
if (s->cpl != 0) {
|
| 6699 | 6671 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6700 | 6672 |
} else {
|
| 6701 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0)) |
|
| 6702 |
break; |
|
| 6673 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); |
|
| 6703 | 6674 |
gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0); |
| 6704 | 6675 |
tcg_gen_helper_0_1(helper_lmsw, cpu_T[0]); |
| 6705 | 6676 |
gen_jmp_im(s->pc - s->cs_base); |
| ... | ... | |
| 6724 | 6695 |
goto illegal_op; |
| 6725 | 6696 |
} |
| 6726 | 6697 |
} else {
|
| 6727 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_INVLPG)) |
|
| 6728 |
break; |
|
| 6729 | 6698 |
gen_lea_modrm(s, modrm, ®_addr, &offset_addr); |
| 6730 | 6699 |
tcg_gen_helper_0_1(helper_invlpg, cpu_A0); |
| 6731 | 6700 |
gen_jmp_im(s->pc - s->cs_base); |
| ... | ... | |
| 6742 | 6711 |
if (s->cpl != 0) {
|
| 6743 | 6712 |
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); |
| 6744 | 6713 |
} else {
|
| 6745 |
if (gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD)) |
|
| 6746 |
break; |
|
| 6714 |
gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD); |
|
| 6747 | 6715 |
/* nothing to do */ |
| 6748 | 6716 |
} |
| 6749 | 6717 |
break; |
| ... | ... | |
| 6892 | 6860 |
case 3: |
| 6893 | 6861 |
case 4: |
| 6894 | 6862 |
case 8: |
| 6863 |
if (s->cc_op != CC_OP_DYNAMIC) |
|
| 6864 |
gen_op_set_cc_op(s->cc_op); |
|
| 6865 |
gen_jmp_im(pc_start - s->cs_base); |
|
| 6895 | 6866 |
if (b & 2) {
|
| 6896 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0 + reg); |
|
| 6897 | 6867 |
gen_op_mov_TN_reg(ot, 0, rm); |
| 6898 |
tcg_gen_helper_0_2(helper_movl_crN_T0,
|
|
| 6868 |
tcg_gen_helper_0_2(helper_write_crN,
|
|
| 6899 | 6869 |
tcg_const_i32(reg), cpu_T[0]); |
| 6900 | 6870 |
gen_jmp_im(s->pc - s->cs_base); |
| 6901 | 6871 |
gen_eob(s); |
| 6902 | 6872 |
} else {
|
| 6903 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0 + reg); |
|
| 6904 |
#if !defined(CONFIG_USER_ONLY) |
|
| 6905 |
if (reg == 8) |
|
| 6906 |
tcg_gen_helper_1_0(helper_movtl_T0_cr8, cpu_T[0]); |
|
| 6907 |
else |
|
| 6908 |
#endif |
|
| 6909 |
tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[reg])); |
|
| 6873 |
tcg_gen_helper_1_1(helper_read_crN, |
|
| 6874 |
cpu_T[0], tcg_const_i32(reg)); |
|
| 6910 | 6875 |
gen_op_mov_reg_T0(ot, rm); |
| 6911 | 6876 |
} |
| 6912 | 6877 |
break; |
| ... | ... | |
| 7054 | 7019 |
/* ignore for now */ |
| 7055 | 7020 |
break; |
| 7056 | 7021 |
case 0x1aa: /* rsm */ |
| 7057 |
if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_RSM)) |
|
| 7058 |
break; |
|
| 7022 |
gen_svm_check_intercept(s, pc_start, SVM_EXIT_RSM); |
|
| 7059 | 7023 |
if (!(s->flags & HF_SMM_MASK)) |
| 7060 | 7024 |
goto illegal_op; |
| 7061 | 7025 |
if (s->cc_op != CC_OP_DYNAMIC) {
|
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