Revision 873eb012 target-mips/op_helper.c

b/target-mips/op_helper.c
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#endif
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#if defined(CONFIG_USER_ONLY) 
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void do_mfc0 (int reg, int sel)
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void do_mfc0_random (void)
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{
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    cpu_abort(env, "mfc0 reg=%d sel=%d\n", reg, sel);
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    cpu_abort(env, "mfc0 random\n");
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}
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void do_mfc0_count (void)
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{
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    cpu_abort(env, "mfc0 count\n");
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}
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void do_mtc0 (int reg, int sel)
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{
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    cpu_abort(env, "mtc0 reg=%d sel=%d\n", reg, sel);
......
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{
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    cpu_abort(env, "tlbr\n");
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}
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#else
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/* CP0 helpers */
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void do_mfc0 (int reg, int sel)
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void do_mfc0_random (void)
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{
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    const unsigned char *rn;
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    T0 = cpu_mips_get_random(env);
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}
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    if (sel != 0 && reg != 16 && reg != 28) {
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        rn = "invalid";
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        goto print;
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    }
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    switch (reg) {
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    case 0:
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        T0 = env->CP0_index;
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        rn = "Index";
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        break;
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    case 1:
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        T0 = cpu_mips_get_random(env);
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        rn = "Random";
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        break;
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    case 2:
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        T0 = env->CP0_EntryLo0;
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        rn = "EntryLo0";
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        break;
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    case 3:
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        T0 = env->CP0_EntryLo1;
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        rn = "EntryLo1";
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        break;
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    case 4:
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        T0 = env->CP0_Context;
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        rn = "Context";
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        break;
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    case 5:
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        T0 = env->CP0_PageMask;
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        rn = "PageMask";
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        break;
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    case 6:
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        T0 = env->CP0_Wired;
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        rn = "Wired";
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        break;
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    case 8:
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        T0 = env->CP0_BadVAddr;
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        rn = "BadVaddr";
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        break;
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    case 9:
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        T0 = cpu_mips_get_count(env);
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        rn = "Count";
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        break;
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    case 10:
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        T0 = env->CP0_EntryHi;
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        rn = "EntryHi";
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        break;
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    case 11:
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        T0 = env->CP0_Compare;
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        rn = "Compare";
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        break;
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    case 12:
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        T0 = env->CP0_Status;
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        if (env->hflags & MIPS_HFLAG_UM)
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            T0 |= (1 << CP0St_UM);
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        rn = "Status";
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        break;
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    case 13:
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        T0 = env->CP0_Cause;
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        rn = "Cause";
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        break;
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    case 14:
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        T0 = env->CP0_EPC;
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        rn = "EPC";
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        break;
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    case 15:
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        T0 = env->CP0_PRid;
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        rn = "PRid";
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        break;
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    case 16:
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        switch (sel) {
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        case 0:
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            T0 = env->CP0_Config0;
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            rn = "Config";
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            break;
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        case 1:
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            T0 = env->CP0_Config1;
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            rn = "Config1";
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            break;
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        default:
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            rn = "Unknown config register";
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            break;
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        }
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        break;
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    case 17:
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        T0 = env->CP0_LLAddr >> 4;
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        rn = "LLAddr";
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        break;
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    case 18:
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        T0 = env->CP0_WatchLo;
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        rn = "WatchLo";
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        break;
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    case 19:
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        T0 = env->CP0_WatchHi;
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        rn = "WatchHi";
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        break;
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    case 23:
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        T0 = env->CP0_Debug;
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        if (env->hflags & MIPS_HFLAG_DM)
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            T0 |= 1 << CP0DB_DM;
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        rn = "Debug";
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        break;
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    case 24:
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        T0 = env->CP0_DEPC;
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        rn = "DEPC";
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        break;
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    case 28:
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        switch (sel) {
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        case 0:
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            T0 = env->CP0_TagLo;
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            rn = "TagLo";
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            break;
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        case 1:
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            T0 = env->CP0_DataLo;
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            rn = "DataLo";
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            break;
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        default:
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            rn = "unknown sel";
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            break;
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        }
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        break;
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    case 30:
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        T0 = env->CP0_ErrorEPC;
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        rn = "ErrorEPC";
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        break;
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    case 31:
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        T0 = env->CP0_DESAVE;
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        rn = "DESAVE";
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        break;
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    default:
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        rn = "unknown";
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        break;
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    }
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 print:
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#if defined MIPS_DEBUG_DISAS
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    if (loglevel & CPU_LOG_TB_IN_ASM) {
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        fprintf(logfile, "%08x mfc0 %s => %08x (%d %d)\n",
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                env->PC, rn, T0, reg, sel);
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    }
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#endif
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    return;
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void do_mfc0_count (void)
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{
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    T0 = cpu_mips_get_count(env);
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}
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void do_mtc0 (int reg, int sel)

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