Revision 87b0b705 target-s390x/translate.c
| b/target-s390x/translate.c | ||
|---|---|---|
| 2334 | 2334 |
case 0x0: /* IIHH R1,I2 [RI] */ |
| 2335 | 2335 |
tmp = tcg_const_i64(i2); |
| 2336 | 2336 |
tcg_gen_deposit_i64(regs[r1], regs[r1], tmp, 48, 16); |
| 2337 |
tcg_temp_free_i64(tmp); |
|
| 2337 | 2338 |
break; |
| 2338 | 2339 |
case 0x1: /* IIHL R1,I2 [RI] */ |
| 2339 | 2340 |
tmp = tcg_const_i64(i2); |
| 2340 | 2341 |
tcg_gen_deposit_i64(regs[r1], regs[r1], tmp, 32, 16); |
| 2342 |
tcg_temp_free_i64(tmp); |
|
| 2341 | 2343 |
break; |
| 2342 | 2344 |
case 0x2: /* IILH R1,I2 [RI] */ |
| 2343 | 2345 |
tmp = tcg_const_i64(i2); |
| 2344 | 2346 |
tcg_gen_deposit_i64(regs[r1], regs[r1], tmp, 16, 16); |
| 2347 |
tcg_temp_free_i64(tmp); |
|
| 2345 | 2348 |
break; |
| 2346 | 2349 |
case 0x3: /* IILL R1,I2 [RI] */ |
| 2347 | 2350 |
tmp = tcg_const_i64(i2); |
| 2348 | 2351 |
tcg_gen_deposit_i64(regs[r1], regs[r1], tmp, 0, 16); |
| 2352 |
tcg_temp_free_i64(tmp); |
|
| 2349 | 2353 |
break; |
| 2350 | 2354 |
case 0x4: /* NIHH R1,I2 [RI] */ |
| 2351 | 2355 |
case 0x8: /* OIHH R1,I2 [RI] */ |
| ... | ... | |
| 2370 | 2374 |
set_cc_nz_u32(s, tmp32); |
| 2371 | 2375 |
tcg_temp_free_i64(tmp2); |
| 2372 | 2376 |
tcg_temp_free_i32(tmp32); |
| 2377 |
tcg_temp_free_i64(tmp); |
|
| 2373 | 2378 |
break; |
| 2374 | 2379 |
case 0x5: /* NIHL R1,I2 [RI] */ |
| 2375 | 2380 |
case 0x9: /* OIHL R1,I2 [RI] */ |
| ... | ... | |
| 2395 | 2400 |
set_cc_nz_u32(s, tmp32); |
| 2396 | 2401 |
tcg_temp_free_i64(tmp2); |
| 2397 | 2402 |
tcg_temp_free_i32(tmp32); |
| 2403 |
tcg_temp_free_i64(tmp); |
|
| 2398 | 2404 |
break; |
| 2399 | 2405 |
case 0x6: /* NILH R1,I2 [RI] */ |
| 2400 | 2406 |
case 0xa: /* OILH R1,I2 [RI] */ |
| ... | ... | |
| 2420 | 2426 |
set_cc_nz_u32(s, tmp32); |
| 2421 | 2427 |
tcg_temp_free_i64(tmp2); |
| 2422 | 2428 |
tcg_temp_free_i32(tmp32); |
| 2429 |
tcg_temp_free_i64(tmp); |
|
| 2423 | 2430 |
break; |
| 2424 | 2431 |
case 0x7: /* NILL R1,I2 [RI] */ |
| 2425 | 2432 |
case 0xb: /* OILL R1,I2 [RI] */ |
| ... | ... | |
| 2443 | 2450 |
set_cc_nz_u32(s, tmp32); /* signedness should not matter here */ |
| 2444 | 2451 |
tcg_temp_free_i64(tmp2); |
| 2445 | 2452 |
tcg_temp_free_i32(tmp32); |
| 2453 |
tcg_temp_free_i64(tmp); |
|
| 2446 | 2454 |
break; |
| 2447 | 2455 |
case 0xc: /* LLIHH R1,I2 [RI] */ |
| 2448 | 2456 |
tmp = tcg_const_i64( ((uint64_t)i2) << 48 ); |
| 2449 | 2457 |
store_reg(r1, tmp); |
| 2458 |
tcg_temp_free_i64(tmp); |
|
| 2450 | 2459 |
break; |
| 2451 | 2460 |
case 0xd: /* LLIHL R1,I2 [RI] */ |
| 2452 | 2461 |
tmp = tcg_const_i64( ((uint64_t)i2) << 32 ); |
| 2453 | 2462 |
store_reg(r1, tmp); |
| 2463 |
tcg_temp_free_i64(tmp); |
|
| 2454 | 2464 |
break; |
| 2455 | 2465 |
case 0xe: /* LLILH R1,I2 [RI] */ |
| 2456 | 2466 |
tmp = tcg_const_i64( ((uint64_t)i2) << 16 ); |
| 2457 | 2467 |
store_reg(r1, tmp); |
| 2468 |
tcg_temp_free_i64(tmp); |
|
| 2458 | 2469 |
break; |
| 2459 | 2470 |
case 0xf: /* LLILL R1,I2 [RI] */ |
| 2460 | 2471 |
tmp = tcg_const_i64(i2); |
| 2461 | 2472 |
store_reg(r1, tmp); |
| 2473 |
tcg_temp_free_i64(tmp); |
|
| 2462 | 2474 |
break; |
| 2463 | 2475 |
default: |
| 2464 | 2476 |
LOG_DISAS("illegal a5 operation 0x%x\n", op);
|
| 2465 | 2477 |
gen_illegal_opcode(s, 2); |
| 2466 | 2478 |
return; |
| 2467 | 2479 |
} |
| 2468 |
tcg_temp_free_i64(tmp); |
|
| 2469 | 2480 |
} |
| 2470 | 2481 |
|
| 2471 | 2482 |
static void disas_a7(DisasContext *s, int op, int r1, int i2) |
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